1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * comedi/drivers/dyna_pci10xx.c
4 * Copyright (C) 2011 Prashant Shah, pshah.mumbai@gmail.com
5 */
6
7 /*
8 * Driver: dyna_pci10xx
9 * Description: Dynalog India PCI DAQ Cards, http://www.dynalogindia.com/
10 * Devices: [Dynalog] PCI-1050 (dyna_pci1050)
11 * Author: Prashant Shah <pshah.mumbai@gmail.com>
12 * Status: Stable
13 *
14 * Developed at Automation Labs, Chemical Dept., IIT Bombay, India.
15 * Prof. Kannan Moudgalya <kannan@iitb.ac.in>
16 * http://www.iitb.ac.in
17 *
18 * Notes :
19 * - Dynalog India Pvt. Ltd. does not have a registered PCI Vendor ID and
20 * they are using the PLX Technlogies Vendor ID since that is the PCI Chip
21 * used in the card.
22 * - Dynalog India Pvt. Ltd. has provided the internal register specification
23 * for their cards in their manuals.
24 */
25
26 #include <linux/module.h>
27 #include <linux/delay.h>
28 #include <linux/mutex.h>
29
30 #include "../comedi_pci.h"
31
32 #define READ_TIMEOUT 50
33
34 static const struct comedi_lrange range_pci1050_ai = {
35 3, {
36 BIP_RANGE(10),
37 BIP_RANGE(5),
38 UNI_RANGE(10)
39 }
40 };
41
42 static const char range_codes_pci1050_ai[] = { 0x00, 0x10, 0x30 };
43
44 struct dyna_pci10xx_private {
45 struct mutex mutex;
46 unsigned long BADR3;
47 };
48
dyna_pci10xx_ai_eoc(struct comedi_device * dev,struct comedi_subdevice * s,struct comedi_insn * insn,unsigned long context)49 static int dyna_pci10xx_ai_eoc(struct comedi_device *dev,
50 struct comedi_subdevice *s,
51 struct comedi_insn *insn,
52 unsigned long context)
53 {
54 unsigned int status;
55
56 status = inw_p(dev->iobase);
57 if (status & (1 << 15))
58 return 0;
59 return -EBUSY;
60 }
61
dyna_pci10xx_insn_read_ai(struct comedi_device * dev,struct comedi_subdevice * s,struct comedi_insn * insn,unsigned int * data)62 static int dyna_pci10xx_insn_read_ai(struct comedi_device *dev,
63 struct comedi_subdevice *s,
64 struct comedi_insn *insn,
65 unsigned int *data)
66 {
67 struct dyna_pci10xx_private *devpriv = dev->private;
68 int n;
69 u16 d = 0;
70 int ret = 0;
71 unsigned int chan, range;
72
73 /* get the channel number and range */
74 chan = CR_CHAN(insn->chanspec);
75 range = range_codes_pci1050_ai[CR_RANGE((insn->chanspec))];
76
77 mutex_lock(&devpriv->mutex);
78 /* convert n samples */
79 for (n = 0; n < insn->n; n++) {
80 /* trigger conversion */
81 smp_mb();
82 outw_p(0x0000 + range + chan, dev->iobase + 2);
83 usleep_range(10, 20);
84
85 ret = comedi_timeout(dev, s, insn, dyna_pci10xx_ai_eoc, 0);
86 if (ret)
87 break;
88
89 /* read data */
90 d = inw_p(dev->iobase);
91 /* mask the first 4 bits - EOC bits */
92 d &= 0x0FFF;
93 data[n] = d;
94 }
95 mutex_unlock(&devpriv->mutex);
96
97 /* return the number of samples read/written */
98 return ret ? ret : n;
99 }
100
101 /* analog output callback */
dyna_pci10xx_insn_write_ao(struct comedi_device * dev,struct comedi_subdevice * s,struct comedi_insn * insn,unsigned int * data)102 static int dyna_pci10xx_insn_write_ao(struct comedi_device *dev,
103 struct comedi_subdevice *s,
104 struct comedi_insn *insn,
105 unsigned int *data)
106 {
107 struct dyna_pci10xx_private *devpriv = dev->private;
108 int n;
109 unsigned int chan, range;
110
111 chan = CR_CHAN(insn->chanspec);
112 range = range_codes_pci1050_ai[CR_RANGE((insn->chanspec))];
113
114 mutex_lock(&devpriv->mutex);
115 for (n = 0; n < insn->n; n++) {
116 smp_mb();
117 /* trigger conversion and write data */
118 outw_p(data[n], dev->iobase);
119 usleep_range(10, 20);
120 }
121 mutex_unlock(&devpriv->mutex);
122 return n;
123 }
124
125 /* digital input bit interface */
dyna_pci10xx_di_insn_bits(struct comedi_device * dev,struct comedi_subdevice * s,struct comedi_insn * insn,unsigned int * data)126 static int dyna_pci10xx_di_insn_bits(struct comedi_device *dev,
127 struct comedi_subdevice *s,
128 struct comedi_insn *insn,
129 unsigned int *data)
130 {
131 struct dyna_pci10xx_private *devpriv = dev->private;
132 u16 d = 0;
133
134 mutex_lock(&devpriv->mutex);
135 smp_mb();
136 d = inw_p(devpriv->BADR3);
137 usleep_range(10, 100);
138
139 /* on return the data[0] contains output and data[1] contains input */
140 data[1] = d;
141 data[0] = s->state;
142 mutex_unlock(&devpriv->mutex);
143 return insn->n;
144 }
145
dyna_pci10xx_do_insn_bits(struct comedi_device * dev,struct comedi_subdevice * s,struct comedi_insn * insn,unsigned int * data)146 static int dyna_pci10xx_do_insn_bits(struct comedi_device *dev,
147 struct comedi_subdevice *s,
148 struct comedi_insn *insn,
149 unsigned int *data)
150 {
151 struct dyna_pci10xx_private *devpriv = dev->private;
152
153 mutex_lock(&devpriv->mutex);
154 if (comedi_dio_update_state(s, data)) {
155 smp_mb();
156 outw_p(s->state, devpriv->BADR3);
157 usleep_range(10, 100);
158 }
159
160 data[1] = s->state;
161 mutex_unlock(&devpriv->mutex);
162
163 return insn->n;
164 }
165
dyna_pci10xx_auto_attach(struct comedi_device * dev,unsigned long context_unused)166 static int dyna_pci10xx_auto_attach(struct comedi_device *dev,
167 unsigned long context_unused)
168 {
169 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
170 struct dyna_pci10xx_private *devpriv;
171 struct comedi_subdevice *s;
172 int ret;
173
174 devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
175 if (!devpriv)
176 return -ENOMEM;
177
178 ret = comedi_pci_enable(dev);
179 if (ret)
180 return ret;
181 dev->iobase = pci_resource_start(pcidev, 2);
182 devpriv->BADR3 = pci_resource_start(pcidev, 3);
183
184 mutex_init(&devpriv->mutex);
185
186 ret = comedi_alloc_subdevices(dev, 4);
187 if (ret)
188 return ret;
189
190 /* analog input */
191 s = &dev->subdevices[0];
192 s->type = COMEDI_SUBD_AI;
193 s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_DIFF;
194 s->n_chan = 16;
195 s->maxdata = 0x0FFF;
196 s->range_table = &range_pci1050_ai;
197 s->len_chanlist = 16;
198 s->insn_read = dyna_pci10xx_insn_read_ai;
199
200 /* analog output */
201 s = &dev->subdevices[1];
202 s->type = COMEDI_SUBD_AO;
203 s->subdev_flags = SDF_WRITABLE;
204 s->n_chan = 16;
205 s->maxdata = 0x0FFF;
206 s->range_table = &range_unipolar10;
207 s->len_chanlist = 16;
208 s->insn_write = dyna_pci10xx_insn_write_ao;
209
210 /* digital input */
211 s = &dev->subdevices[2];
212 s->type = COMEDI_SUBD_DI;
213 s->subdev_flags = SDF_READABLE;
214 s->n_chan = 16;
215 s->maxdata = 1;
216 s->range_table = &range_digital;
217 s->len_chanlist = 16;
218 s->insn_bits = dyna_pci10xx_di_insn_bits;
219
220 /* digital output */
221 s = &dev->subdevices[3];
222 s->type = COMEDI_SUBD_DO;
223 s->subdev_flags = SDF_WRITABLE;
224 s->n_chan = 16;
225 s->maxdata = 1;
226 s->range_table = &range_digital;
227 s->len_chanlist = 16;
228 s->state = 0;
229 s->insn_bits = dyna_pci10xx_do_insn_bits;
230
231 return 0;
232 }
233
dyna_pci10xx_detach(struct comedi_device * dev)234 static void dyna_pci10xx_detach(struct comedi_device *dev)
235 {
236 struct dyna_pci10xx_private *devpriv = dev->private;
237
238 comedi_pci_detach(dev);
239 if (devpriv)
240 mutex_destroy(&devpriv->mutex);
241 }
242
243 static struct comedi_driver dyna_pci10xx_driver = {
244 .driver_name = "dyna_pci10xx",
245 .module = THIS_MODULE,
246 .auto_attach = dyna_pci10xx_auto_attach,
247 .detach = dyna_pci10xx_detach,
248 };
249
dyna_pci10xx_pci_probe(struct pci_dev * dev,const struct pci_device_id * id)250 static int dyna_pci10xx_pci_probe(struct pci_dev *dev,
251 const struct pci_device_id *id)
252 {
253 return comedi_pci_auto_config(dev, &dyna_pci10xx_driver,
254 id->driver_data);
255 }
256
257 static const struct pci_device_id dyna_pci10xx_pci_table[] = {
258 { PCI_DEVICE(PCI_VENDOR_ID_PLX, 0x1050) },
259 { 0 }
260 };
261 MODULE_DEVICE_TABLE(pci, dyna_pci10xx_pci_table);
262
263 static struct pci_driver dyna_pci10xx_pci_driver = {
264 .name = "dyna_pci10xx",
265 .id_table = dyna_pci10xx_pci_table,
266 .probe = dyna_pci10xx_pci_probe,
267 .remove = comedi_pci_auto_unconfig,
268 };
269 module_comedi_pci_driver(dyna_pci10xx_driver, dyna_pci10xx_pci_driver);
270
271 MODULE_LICENSE("GPL");
272 MODULE_AUTHOR("Prashant Shah <pshah.mumbai@gmail.com>");
273 MODULE_DESCRIPTION("Comedi based drivers for Dynalog PCI DAQ cards");
274
