1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ 2 /* 3 * Copyright (C) 2012-2014, 2018-2020 Intel Corporation 4 * Copyright (C) 2017 Intel Deutschland GmbH 5 */ 6 #ifndef __iwl_fw_api_rs_h__ 7 #define __iwl_fw_api_rs_h__ 8 9 #include "mac.h" 10 11 /** 12 * enum iwl_tlc_mng_cfg_flags_enum - options for TLC config flags 13 * @IWL_TLC_MNG_CFG_FLAGS_STBC_MSK: enable STBC. For HE this enables STBC for 14 * bandwidths <= 80MHz 15 * @IWL_TLC_MNG_CFG_FLAGS_LDPC_MSK: enable LDPC 16 * @IWL_TLC_MNG_CFG_FLAGS_HE_STBC_160MHZ_MSK: enable STBC in HE at 160MHz 17 * bandwidth 18 * @IWL_TLC_MNG_CFG_FLAGS_HE_DCM_NSS_1_MSK: enable HE Dual Carrier Modulation 19 * for BPSK (MCS 0) with 1 spatial 20 * stream 21 * @IWL_TLC_MNG_CFG_FLAGS_HE_DCM_NSS_2_MSK: enable HE Dual Carrier Modulation 22 * for BPSK (MCS 0) with 2 spatial 23 * streams 24 */ 25 enum iwl_tlc_mng_cfg_flags { 26 IWL_TLC_MNG_CFG_FLAGS_STBC_MSK = BIT(0), 27 IWL_TLC_MNG_CFG_FLAGS_LDPC_MSK = BIT(1), 28 IWL_TLC_MNG_CFG_FLAGS_HE_STBC_160MHZ_MSK = BIT(2), 29 IWL_TLC_MNG_CFG_FLAGS_HE_DCM_NSS_1_MSK = BIT(3), 30 IWL_TLC_MNG_CFG_FLAGS_HE_DCM_NSS_2_MSK = BIT(4), 31 }; 32 33 /** 34 * enum iwl_tlc_mng_cfg_cw - channel width options 35 * @IWL_TLC_MNG_CH_WIDTH_20MHZ: 20MHZ channel 36 * @IWL_TLC_MNG_CH_WIDTH_40MHZ: 40MHZ channel 37 * @IWL_TLC_MNG_CH_WIDTH_80MHZ: 80MHZ channel 38 * @IWL_TLC_MNG_CH_WIDTH_160MHZ: 160MHZ channel 39 * @IWL_TLC_MNG_CH_WIDTH_LAST: maximum value 40 */ 41 enum iwl_tlc_mng_cfg_cw { 42 IWL_TLC_MNG_CH_WIDTH_20MHZ, 43 IWL_TLC_MNG_CH_WIDTH_40MHZ, 44 IWL_TLC_MNG_CH_WIDTH_80MHZ, 45 IWL_TLC_MNG_CH_WIDTH_160MHZ, 46 IWL_TLC_MNG_CH_WIDTH_LAST = IWL_TLC_MNG_CH_WIDTH_160MHZ, 47 }; 48 49 /** 50 * enum iwl_tlc_mng_cfg_chains - possible chains 51 * @IWL_TLC_MNG_CHAIN_A_MSK: chain A 52 * @IWL_TLC_MNG_CHAIN_B_MSK: chain B 53 */ 54 enum iwl_tlc_mng_cfg_chains { 55 IWL_TLC_MNG_CHAIN_A_MSK = BIT(0), 56 IWL_TLC_MNG_CHAIN_B_MSK = BIT(1), 57 }; 58 59 /** 60 * enum iwl_tlc_mng_cfg_mode - supported modes 61 * @IWL_TLC_MNG_MODE_CCK: enable CCK 62 * @IWL_TLC_MNG_MODE_OFDM_NON_HT: enable OFDM (non HT) 63 * @IWL_TLC_MNG_MODE_NON_HT: enable non HT 64 * @IWL_TLC_MNG_MODE_HT: enable HT 65 * @IWL_TLC_MNG_MODE_VHT: enable VHT 66 * @IWL_TLC_MNG_MODE_HE: enable HE 67 * @IWL_TLC_MNG_MODE_INVALID: invalid value 68 * @IWL_TLC_MNG_MODE_NUM: a count of possible modes 69 */ 70 enum iwl_tlc_mng_cfg_mode { 71 IWL_TLC_MNG_MODE_CCK = 0, 72 IWL_TLC_MNG_MODE_OFDM_NON_HT = IWL_TLC_MNG_MODE_CCK, 73 IWL_TLC_MNG_MODE_NON_HT = IWL_TLC_MNG_MODE_CCK, 74 IWL_TLC_MNG_MODE_HT, 75 IWL_TLC_MNG_MODE_VHT, 76 IWL_TLC_MNG_MODE_HE, 77 IWL_TLC_MNG_MODE_INVALID, 78 IWL_TLC_MNG_MODE_NUM = IWL_TLC_MNG_MODE_INVALID, 79 }; 80 81 /** 82 * enum iwl_tlc_mng_ht_rates - HT/VHT/HE rates 83 * @IWL_TLC_MNG_HT_RATE_MCS0: index of MCS0 84 * @IWL_TLC_MNG_HT_RATE_MCS1: index of MCS1 85 * @IWL_TLC_MNG_HT_RATE_MCS2: index of MCS2 86 * @IWL_TLC_MNG_HT_RATE_MCS3: index of MCS3 87 * @IWL_TLC_MNG_HT_RATE_MCS4: index of MCS4 88 * @IWL_TLC_MNG_HT_RATE_MCS5: index of MCS5 89 * @IWL_TLC_MNG_HT_RATE_MCS6: index of MCS6 90 * @IWL_TLC_MNG_HT_RATE_MCS7: index of MCS7 91 * @IWL_TLC_MNG_HT_RATE_MCS8: index of MCS8 92 * @IWL_TLC_MNG_HT_RATE_MCS9: index of MCS9 93 * @IWL_TLC_MNG_HT_RATE_MCS10: index of MCS10 94 * @IWL_TLC_MNG_HT_RATE_MCS11: index of MCS11 95 * @IWL_TLC_MNG_HT_RATE_MAX: maximal rate for HT/VHT 96 */ 97 enum iwl_tlc_mng_ht_rates { 98 IWL_TLC_MNG_HT_RATE_MCS0 = 0, 99 IWL_TLC_MNG_HT_RATE_MCS1, 100 IWL_TLC_MNG_HT_RATE_MCS2, 101 IWL_TLC_MNG_HT_RATE_MCS3, 102 IWL_TLC_MNG_HT_RATE_MCS4, 103 IWL_TLC_MNG_HT_RATE_MCS5, 104 IWL_TLC_MNG_HT_RATE_MCS6, 105 IWL_TLC_MNG_HT_RATE_MCS7, 106 IWL_TLC_MNG_HT_RATE_MCS8, 107 IWL_TLC_MNG_HT_RATE_MCS9, 108 IWL_TLC_MNG_HT_RATE_MCS10, 109 IWL_TLC_MNG_HT_RATE_MCS11, 110 IWL_TLC_MNG_HT_RATE_MAX = IWL_TLC_MNG_HT_RATE_MCS11, 111 }; 112 113 enum IWL_TLC_MNG_NSS { 114 IWL_TLC_NSS_1, 115 IWL_TLC_NSS_2, 116 IWL_TLC_NSS_MAX 117 }; 118 119 enum IWL_TLC_HT_BW_RATES { 120 IWL_TLC_HT_BW_NONE_160, 121 IWL_TLC_HT_BW_160, 122 }; 123 124 /** 125 * struct tlc_config_cmd - TLC configuration 126 * @sta_id: station id 127 * @reserved1: reserved 128 * @max_ch_width: max supported channel width from @enum iwl_tlc_mng_cfg_cw 129 * @mode: &enum iwl_tlc_mng_cfg_mode 130 * @chains: bitmask of &enum iwl_tlc_mng_cfg_chains 131 * @amsdu: TX amsdu is supported 132 * @flags: bitmask of &enum iwl_tlc_mng_cfg_flags 133 * @non_ht_rates: bitmap of supported legacy rates 134 * @ht_rates: bitmap of &enum iwl_tlc_mng_ht_rates, per <nss, channel-width> 135 * pair (0 - 80mhz width and below, 1 - 160mhz). 136 * @max_mpdu_len: max MPDU length, in bytes 137 * @sgi_ch_width_supp: bitmap of SGI support per channel width 138 * use BIT(@enum iwl_tlc_mng_cfg_cw) 139 * @reserved2: reserved 140 * @max_tx_op: max TXOP in uSecs for all AC (BK, BE, VO, VI), 141 * set zero for no limit. 142 */ 143 struct iwl_tlc_config_cmd { 144 u8 sta_id; 145 u8 reserved1[3]; 146 u8 max_ch_width; 147 u8 mode; 148 u8 chains; 149 u8 amsdu; 150 __le16 flags; 151 __le16 non_ht_rates; 152 __le16 ht_rates[IWL_TLC_NSS_MAX][2]; 153 __le16 max_mpdu_len; 154 u8 sgi_ch_width_supp; 155 u8 reserved2; 156 __le32 max_tx_op; 157 } __packed; /* TLC_MNG_CONFIG_CMD_API_S_VER_3 */ 158 159 /** 160 * enum iwl_tlc_update_flags - updated fields 161 * @IWL_TLC_NOTIF_FLAG_RATE: last initial rate update 162 * @IWL_TLC_NOTIF_FLAG_AMSDU: umsdu parameters update 163 */ 164 enum iwl_tlc_update_flags { 165 IWL_TLC_NOTIF_FLAG_RATE = BIT(0), 166 IWL_TLC_NOTIF_FLAG_AMSDU = BIT(1), 167 }; 168 169 /** 170 * struct iwl_tlc_update_notif - TLC notification from FW 171 * @sta_id: station id 172 * @reserved: reserved 173 * @flags: bitmap of notifications reported 174 * @rate: current initial rate 175 * @amsdu_size: Max AMSDU size, in bytes 176 * @amsdu_enabled: bitmap for per-TID AMSDU enablement 177 */ 178 struct iwl_tlc_update_notif { 179 u8 sta_id; 180 u8 reserved[3]; 181 __le32 flags; 182 __le32 rate; 183 __le32 amsdu_size; 184 __le32 amsdu_enabled; 185 } __packed; /* TLC_MNG_UPDATE_NTFY_API_S_VER_2 */ 186 187 /* 188 * These serve as indexes into 189 * struct iwl_rate_info fw_rate_idx_to_plcp[IWL_RATE_COUNT]; 190 * TODO: avoid overlap between legacy and HT rates 191 */ 192 enum { 193 IWL_RATE_1M_INDEX = 0, 194 IWL_FIRST_CCK_RATE = IWL_RATE_1M_INDEX, 195 IWL_RATE_2M_INDEX, 196 IWL_RATE_5M_INDEX, 197 IWL_RATE_11M_INDEX, 198 IWL_LAST_CCK_RATE = IWL_RATE_11M_INDEX, 199 IWL_RATE_6M_INDEX, 200 IWL_FIRST_OFDM_RATE = IWL_RATE_6M_INDEX, 201 IWL_RATE_MCS_0_INDEX = IWL_RATE_6M_INDEX, 202 IWL_FIRST_HT_RATE = IWL_RATE_MCS_0_INDEX, 203 IWL_FIRST_VHT_RATE = IWL_RATE_MCS_0_INDEX, 204 IWL_RATE_9M_INDEX, 205 IWL_RATE_12M_INDEX, 206 IWL_RATE_MCS_1_INDEX = IWL_RATE_12M_INDEX, 207 IWL_RATE_18M_INDEX, 208 IWL_RATE_MCS_2_INDEX = IWL_RATE_18M_INDEX, 209 IWL_RATE_24M_INDEX, 210 IWL_RATE_MCS_3_INDEX = IWL_RATE_24M_INDEX, 211 IWL_RATE_36M_INDEX, 212 IWL_RATE_MCS_4_INDEX = IWL_RATE_36M_INDEX, 213 IWL_RATE_48M_INDEX, 214 IWL_RATE_MCS_5_INDEX = IWL_RATE_48M_INDEX, 215 IWL_RATE_54M_INDEX, 216 IWL_RATE_MCS_6_INDEX = IWL_RATE_54M_INDEX, 217 IWL_LAST_NON_HT_RATE = IWL_RATE_54M_INDEX, 218 IWL_RATE_60M_INDEX, 219 IWL_RATE_MCS_7_INDEX = IWL_RATE_60M_INDEX, 220 IWL_LAST_HT_RATE = IWL_RATE_MCS_7_INDEX, 221 IWL_RATE_MCS_8_INDEX, 222 IWL_RATE_MCS_9_INDEX, 223 IWL_LAST_VHT_RATE = IWL_RATE_MCS_9_INDEX, 224 IWL_RATE_MCS_10_INDEX, 225 IWL_RATE_MCS_11_INDEX, 226 IWL_LAST_HE_RATE = IWL_RATE_MCS_11_INDEX, 227 IWL_RATE_COUNT_LEGACY = IWL_LAST_NON_HT_RATE + 1, 228 IWL_RATE_COUNT = IWL_LAST_HE_RATE + 1, 229 }; 230 231 #define IWL_RATE_BIT_MSK(r) BIT(IWL_RATE_##r##M_INDEX) 232 233 /* fw API values for legacy bit rates, both OFDM and CCK */ 234 enum { 235 IWL_RATE_6M_PLCP = 13, 236 IWL_RATE_9M_PLCP = 15, 237 IWL_RATE_12M_PLCP = 5, 238 IWL_RATE_18M_PLCP = 7, 239 IWL_RATE_24M_PLCP = 9, 240 IWL_RATE_36M_PLCP = 11, 241 IWL_RATE_48M_PLCP = 1, 242 IWL_RATE_54M_PLCP = 3, 243 IWL_RATE_1M_PLCP = 10, 244 IWL_RATE_2M_PLCP = 20, 245 IWL_RATE_5M_PLCP = 55, 246 IWL_RATE_11M_PLCP = 110, 247 IWL_RATE_INVM_PLCP = -1, 248 }; 249 250 /* 251 * rate_n_flags bit fields 252 * 253 * The 32-bit value has different layouts in the low 8 bites depending on the 254 * format. There are three formats, HT, VHT and legacy (11abg, with subformats 255 * for CCK and OFDM). 256 * 257 * High-throughput (HT) rate format 258 * bit 8 is 1, bit 26 is 0, bit 9 is 0 (OFDM) 259 * Very High-throughput (VHT) rate format 260 * bit 8 is 0, bit 26 is 1, bit 9 is 0 (OFDM) 261 * Legacy OFDM rate format for bits 7:0 262 * bit 8 is 0, bit 26 is 0, bit 9 is 0 (OFDM) 263 * Legacy CCK rate format for bits 7:0: 264 * bit 8 is 0, bit 26 is 0, bit 9 is 1 (CCK) 265 */ 266 267 /* Bit 8: (1) HT format, (0) legacy or VHT format */ 268 #define RATE_MCS_HT_POS 8 269 #define RATE_MCS_HT_MSK (1 << RATE_MCS_HT_POS) 270 271 /* Bit 9: (1) CCK, (0) OFDM. HT (bit 8) must be "0" for this bit to be valid */ 272 #define RATE_MCS_CCK_POS 9 273 #define RATE_MCS_CCK_MSK (1 << RATE_MCS_CCK_POS) 274 275 /* Bit 26: (1) VHT format, (0) legacy format in bits 8:0 */ 276 #define RATE_MCS_VHT_POS 26 277 #define RATE_MCS_VHT_MSK (1 << RATE_MCS_VHT_POS) 278 279 280 /* 281 * High-throughput (HT) rate format for bits 7:0 282 * 283 * 2-0: MCS rate base 284 * 0) 6 Mbps 285 * 1) 12 Mbps 286 * 2) 18 Mbps 287 * 3) 24 Mbps 288 * 4) 36 Mbps 289 * 5) 48 Mbps 290 * 6) 54 Mbps 291 * 7) 60 Mbps 292 * 4-3: 0) Single stream (SISO) 293 * 1) Dual stream (MIMO) 294 * 2) Triple stream (MIMO) 295 * 5: Value of 0x20 in bits 7:0 indicates 6 Mbps HT40 duplicate data 296 * (bits 7-6 are zero) 297 * 298 * Together the low 5 bits work out to the MCS index because we don't 299 * support MCSes above 15/23, and 0-7 have one stream, 8-15 have two 300 * streams and 16-23 have three streams. We could also support MCS 32 301 * which is the duplicate 20 MHz MCS (bit 5 set, all others zero.) 302 */ 303 #define RATE_HT_MCS_RATE_CODE_MSK 0x7 304 #define RATE_HT_MCS_NSS_POS 3 305 #define RATE_HT_MCS_NSS_MSK (3 << RATE_HT_MCS_NSS_POS) 306 307 /* Bit 10: (1) Use Green Field preamble */ 308 #define RATE_HT_MCS_GF_POS 10 309 #define RATE_HT_MCS_GF_MSK (1 << RATE_HT_MCS_GF_POS) 310 311 #define RATE_HT_MCS_INDEX_MSK 0x3f 312 313 /* 314 * Very High-throughput (VHT) rate format for bits 7:0 315 * 316 * 3-0: VHT MCS (0-9) 317 * 5-4: number of streams - 1: 318 * 0) Single stream (SISO) 319 * 1) Dual stream (MIMO) 320 * 2) Triple stream (MIMO) 321 */ 322 323 /* Bit 4-5: (0) SISO, (1) MIMO2 (2) MIMO3 */ 324 #define RATE_VHT_MCS_RATE_CODE_MSK 0xf 325 #define RATE_VHT_MCS_NSS_POS 4 326 #define RATE_VHT_MCS_NSS_MSK (3 << RATE_VHT_MCS_NSS_POS) 327 328 /* 329 * Legacy OFDM rate format for bits 7:0 330 * 331 * 3-0: 0xD) 6 Mbps 332 * 0xF) 9 Mbps 333 * 0x5) 12 Mbps 334 * 0x7) 18 Mbps 335 * 0x9) 24 Mbps 336 * 0xB) 36 Mbps 337 * 0x1) 48 Mbps 338 * 0x3) 54 Mbps 339 * (bits 7-4 are 0) 340 * 341 * Legacy CCK rate format for bits 7:0: 342 * bit 8 is 0, bit 26 is 0, bit 9 is 1 (CCK): 343 * 344 * 6-0: 10) 1 Mbps 345 * 20) 2 Mbps 346 * 55) 5.5 Mbps 347 * 110) 11 Mbps 348 * (bit 7 is 0) 349 */ 350 #define RATE_LEGACY_RATE_MSK 0xff 351 352 /* Bit 10 - OFDM HE */ 353 #define RATE_MCS_HE_POS 10 354 #define RATE_MCS_HE_MSK BIT(RATE_MCS_HE_POS) 355 356 /* 357 * Bit 11-12: (0) 20MHz, (1) 40MHz, (2) 80MHz, (3) 160MHz 358 * 0 and 1 are valid for HT and VHT, 2 and 3 only for VHT 359 */ 360 #define RATE_MCS_CHAN_WIDTH_POS 11 361 #define RATE_MCS_CHAN_WIDTH_MSK (3 << RATE_MCS_CHAN_WIDTH_POS) 362 #define RATE_MCS_CHAN_WIDTH_20 (0 << RATE_MCS_CHAN_WIDTH_POS) 363 #define RATE_MCS_CHAN_WIDTH_40 (1 << RATE_MCS_CHAN_WIDTH_POS) 364 #define RATE_MCS_CHAN_WIDTH_80 (2 << RATE_MCS_CHAN_WIDTH_POS) 365 #define RATE_MCS_CHAN_WIDTH_160 (3 << RATE_MCS_CHAN_WIDTH_POS) 366 367 /* Bit 13: (1) Short guard interval (0.4 usec), (0) normal GI (0.8 usec) */ 368 #define RATE_MCS_SGI_POS 13 369 #define RATE_MCS_SGI_MSK (1 << RATE_MCS_SGI_POS) 370 371 /* Bit 14-16: Antenna selection (1) Ant A, (2) Ant B, (4) Ant C */ 372 #define RATE_MCS_ANT_POS 14 373 #define RATE_MCS_ANT_A_MSK (1 << RATE_MCS_ANT_POS) 374 #define RATE_MCS_ANT_B_MSK (2 << RATE_MCS_ANT_POS) 375 #define RATE_MCS_ANT_C_MSK (4 << RATE_MCS_ANT_POS) 376 #define RATE_MCS_ANT_AB_MSK (RATE_MCS_ANT_A_MSK | \ 377 RATE_MCS_ANT_B_MSK) 378 #define RATE_MCS_ANT_ABC_MSK (RATE_MCS_ANT_AB_MSK | \ 379 RATE_MCS_ANT_C_MSK) 380 #define RATE_MCS_ANT_MSK RATE_MCS_ANT_ABC_MSK 381 382 /* Bit 17: (0) SS, (1) SS*2 */ 383 #define RATE_MCS_STBC_POS 17 384 #define RATE_MCS_STBC_MSK BIT(RATE_MCS_STBC_POS) 385 386 /* Bit 18: OFDM-HE dual carrier mode */ 387 #define RATE_HE_DUAL_CARRIER_MODE 18 388 #define RATE_HE_DUAL_CARRIER_MODE_MSK BIT(RATE_HE_DUAL_CARRIER_MODE) 389 390 /* Bit 19: (0) Beamforming is off, (1) Beamforming is on */ 391 #define RATE_MCS_BF_POS 19 392 #define RATE_MCS_BF_MSK (1 << RATE_MCS_BF_POS) 393 394 /* 395 * Bit 20-21: HE LTF type and guard interval 396 * HE (ext) SU: 397 * 0 1xLTF+0.8us 398 * 1 2xLTF+0.8us 399 * 2 2xLTF+1.6us 400 * 3 & SGI (bit 13) clear 4xLTF+3.2us 401 * 3 & SGI (bit 13) set 4xLTF+0.8us 402 * HE MU: 403 * 0 4xLTF+0.8us 404 * 1 2xLTF+0.8us 405 * 2 2xLTF+1.6us 406 * 3 4xLTF+3.2us 407 * HE TRIG: 408 * 0 1xLTF+1.6us 409 * 1 2xLTF+1.6us 410 * 2 4xLTF+3.2us 411 * 3 (does not occur) 412 */ 413 #define RATE_MCS_HE_GI_LTF_POS 20 414 #define RATE_MCS_HE_GI_LTF_MSK (3 << RATE_MCS_HE_GI_LTF_POS) 415 416 /* Bit 22-23: HE type. (0) SU, (1) SU_EXT, (2) MU, (3) trigger based */ 417 #define RATE_MCS_HE_TYPE_POS 22 418 #define RATE_MCS_HE_TYPE_SU (0 << RATE_MCS_HE_TYPE_POS) 419 #define RATE_MCS_HE_TYPE_EXT_SU (1 << RATE_MCS_HE_TYPE_POS) 420 #define RATE_MCS_HE_TYPE_MU (2 << RATE_MCS_HE_TYPE_POS) 421 #define RATE_MCS_HE_TYPE_TRIG (3 << RATE_MCS_HE_TYPE_POS) 422 #define RATE_MCS_HE_TYPE_MSK (3 << RATE_MCS_HE_TYPE_POS) 423 424 /* Bit 24-25: (0) 20MHz (no dup), (1) 2x20MHz, (2) 4x20MHz, 3 8x20MHz */ 425 #define RATE_MCS_DUP_POS 24 426 #define RATE_MCS_DUP_MSK (3 << RATE_MCS_DUP_POS) 427 428 /* Bit 27: (1) LDPC enabled, (0) LDPC disabled */ 429 #define RATE_MCS_LDPC_POS 27 430 #define RATE_MCS_LDPC_MSK (1 << RATE_MCS_LDPC_POS) 431 432 /* Bit 28: (1) 106-tone RX (8 MHz RU), (0) normal bandwidth */ 433 #define RATE_MCS_HE_106T_POS 28 434 #define RATE_MCS_HE_106T_MSK (1 << RATE_MCS_HE_106T_POS) 435 436 /* Bit 30-31: (1) RTS, (2) CTS */ 437 #define RATE_MCS_RTS_REQUIRED_POS (30) 438 #define RATE_MCS_RTS_REQUIRED_MSK (0x1 << RATE_MCS_RTS_REQUIRED_POS) 439 440 #define RATE_MCS_CTS_REQUIRED_POS (31) 441 #define RATE_MCS_CTS_REQUIRED_MSK (0x1 << RATE_MCS_CTS_REQUIRED_POS) 442 443 /* Link Quality definitions */ 444 445 /* # entries in rate scale table to support Tx retries */ 446 #define LQ_MAX_RETRY_NUM 16 447 448 /* Link quality command flags bit fields */ 449 450 /* Bit 0: (0) Don't use RTS (1) Use RTS */ 451 #define LQ_FLAG_USE_RTS_POS 0 452 #define LQ_FLAG_USE_RTS_MSK (1 << LQ_FLAG_USE_RTS_POS) 453 454 /* Bit 1-3: LQ command color. Used to match responses to LQ commands */ 455 #define LQ_FLAG_COLOR_POS 1 456 #define LQ_FLAG_COLOR_MSK (7 << LQ_FLAG_COLOR_POS) 457 #define LQ_FLAG_COLOR_GET(_f) (((_f) & LQ_FLAG_COLOR_MSK) >>\ 458 LQ_FLAG_COLOR_POS) 459 #define LQ_FLAGS_COLOR_INC(_c) ((((_c) + 1) << LQ_FLAG_COLOR_POS) &\ 460 LQ_FLAG_COLOR_MSK) 461 #define LQ_FLAG_COLOR_SET(_f, _c) ((_c) | ((_f) & ~LQ_FLAG_COLOR_MSK)) 462 463 /* Bit 4-5: Tx RTS BW Signalling 464 * (0) No RTS BW signalling 465 * (1) Static BW signalling 466 * (2) Dynamic BW signalling 467 */ 468 #define LQ_FLAG_RTS_BW_SIG_POS 4 469 #define LQ_FLAG_RTS_BW_SIG_NONE (0 << LQ_FLAG_RTS_BW_SIG_POS) 470 #define LQ_FLAG_RTS_BW_SIG_STATIC (1 << LQ_FLAG_RTS_BW_SIG_POS) 471 #define LQ_FLAG_RTS_BW_SIG_DYNAMIC (2 << LQ_FLAG_RTS_BW_SIG_POS) 472 473 /* Bit 6: (0) No dynamic BW selection (1) Allow dynamic BW selection 474 * Dyanmic BW selection allows Tx with narrower BW then requested in rates 475 */ 476 #define LQ_FLAG_DYNAMIC_BW_POS 6 477 #define LQ_FLAG_DYNAMIC_BW_MSK (1 << LQ_FLAG_DYNAMIC_BW_POS) 478 479 /* Single Stream Tx Parameters (lq_cmd->ss_params) 480 * Flags to control a smart FW decision about whether BFER/STBC/SISO will be 481 * used for single stream Tx. 482 */ 483 484 /* Bit 0-1: Max STBC streams allowed. Can be 0-3. 485 * (0) - No STBC allowed 486 * (1) - 2x1 STBC allowed (HT/VHT) 487 * (2) - 4x2 STBC allowed (HT/VHT) 488 * (3) - 3x2 STBC allowed (HT only) 489 * All our chips are at most 2 antennas so only (1) is valid for now. 490 */ 491 #define LQ_SS_STBC_ALLOWED_POS 0 492 #define LQ_SS_STBC_ALLOWED_MSK (3 << LQ_SS_STBC_ALLOWED_MSK) 493 494 /* 2x1 STBC is allowed */ 495 #define LQ_SS_STBC_1SS_ALLOWED (1 << LQ_SS_STBC_ALLOWED_POS) 496 497 /* Bit 2: Beamformer (VHT only) is allowed */ 498 #define LQ_SS_BFER_ALLOWED_POS 2 499 #define LQ_SS_BFER_ALLOWED (1 << LQ_SS_BFER_ALLOWED_POS) 500 501 /* Bit 3: Force BFER or STBC for testing 502 * If this is set: 503 * If BFER is allowed then force the ucode to choose BFER else 504 * If STBC is allowed then force the ucode to choose STBC over SISO 505 */ 506 #define LQ_SS_FORCE_POS 3 507 #define LQ_SS_FORCE (1 << LQ_SS_FORCE_POS) 508 509 /* Bit 31: ss_params field is valid. Used for FW backward compatibility 510 * with other drivers which don't support the ss_params API yet 511 */ 512 #define LQ_SS_PARAMS_VALID_POS 31 513 #define LQ_SS_PARAMS_VALID (1 << LQ_SS_PARAMS_VALID_POS) 514 515 /** 516 * struct iwl_lq_cmd - link quality command 517 * @sta_id: station to update 518 * @reduced_tpc: reduced transmit power control value 519 * @control: not used 520 * @flags: combination of LQ_FLAG_* 521 * @mimo_delim: the first SISO index in rs_table, which separates MIMO 522 * and SISO rates 523 * @single_stream_ant_msk: best antenna for SISO (can be dual in CDD). 524 * Should be ANT_[ABC] 525 * @dual_stream_ant_msk: best antennas for MIMO, combination of ANT_[ABC] 526 * @initial_rate_index: first index from rs_table per AC category 527 * @agg_time_limit: aggregation max time threshold in usec/100, meaning 528 * value of 100 is one usec. Range is 100 to 8000 529 * @agg_disable_start_th: try-count threshold for starting aggregation. 530 * If a frame has higher try-count, it should not be selected for 531 * starting an aggregation sequence. 532 * @agg_frame_cnt_limit: max frame count in an aggregation. 533 * 0: no limit 534 * 1: no aggregation (one frame per aggregation) 535 * 2 - 0x3f: maximal number of frames (up to 3f == 63) 536 * @reserved2: reserved 537 * @rs_table: array of rates for each TX try, each is rate_n_flags, 538 * meaning it is a combination of RATE_MCS_* and IWL_RATE_*_PLCP 539 * @ss_params: single stream features. declare whether STBC or BFER are allowed. 540 */ 541 struct iwl_lq_cmd { 542 u8 sta_id; 543 u8 reduced_tpc; 544 __le16 control; 545 /* LINK_QUAL_GENERAL_PARAMS_API_S_VER_1 */ 546 u8 flags; 547 u8 mimo_delim; 548 u8 single_stream_ant_msk; 549 u8 dual_stream_ant_msk; 550 u8 initial_rate_index[AC_NUM]; 551 /* LINK_QUAL_AGG_PARAMS_API_S_VER_1 */ 552 __le16 agg_time_limit; 553 u8 agg_disable_start_th; 554 u8 agg_frame_cnt_limit; 555 __le32 reserved2; 556 __le32 rs_table[LQ_MAX_RETRY_NUM]; 557 __le32 ss_params; 558 }; /* LINK_QUALITY_CMD_API_S_VER_1 */ 559 560 #endif /* __iwl_fw_api_rs_h__ */ 561
