1 /* 2 * pmbus.h - Common defines and structures for PMBus devices 3 * 4 * Copyright (c) 2010, 2011 Ericsson AB. 5 * Copyright (c) 2012 Guenter Roeck 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 20 */ 21 22 #ifndef PMBUS_H 23 #define PMBUS_H 24 25 #include <linux/bitops.h> 26 #include <linux/regulator/driver.h> 27 28 /* 29 * Registers 30 */ 31 enum pmbus_regs { 32 PMBUS_PAGE = 0x00, 33 PMBUS_OPERATION = 0x01, 34 PMBUS_ON_OFF_CONFIG = 0x02, 35 PMBUS_CLEAR_FAULTS = 0x03, 36 PMBUS_PHASE = 0x04, 37 38 PMBUS_CAPABILITY = 0x19, 39 PMBUS_QUERY = 0x1A, 40 41 PMBUS_VOUT_MODE = 0x20, 42 PMBUS_VOUT_COMMAND = 0x21, 43 PMBUS_VOUT_TRIM = 0x22, 44 PMBUS_VOUT_CAL_OFFSET = 0x23, 45 PMBUS_VOUT_MAX = 0x24, 46 PMBUS_VOUT_MARGIN_HIGH = 0x25, 47 PMBUS_VOUT_MARGIN_LOW = 0x26, 48 PMBUS_VOUT_TRANSITION_RATE = 0x27, 49 PMBUS_VOUT_DROOP = 0x28, 50 PMBUS_VOUT_SCALE_LOOP = 0x29, 51 PMBUS_VOUT_SCALE_MONITOR = 0x2A, 52 53 PMBUS_COEFFICIENTS = 0x30, 54 PMBUS_POUT_MAX = 0x31, 55 56 PMBUS_FAN_CONFIG_12 = 0x3A, 57 PMBUS_FAN_COMMAND_1 = 0x3B, 58 PMBUS_FAN_COMMAND_2 = 0x3C, 59 PMBUS_FAN_CONFIG_34 = 0x3D, 60 PMBUS_FAN_COMMAND_3 = 0x3E, 61 PMBUS_FAN_COMMAND_4 = 0x3F, 62 63 PMBUS_VOUT_OV_FAULT_LIMIT = 0x40, 64 PMBUS_VOUT_OV_FAULT_RESPONSE = 0x41, 65 PMBUS_VOUT_OV_WARN_LIMIT = 0x42, 66 PMBUS_VOUT_UV_WARN_LIMIT = 0x43, 67 PMBUS_VOUT_UV_FAULT_LIMIT = 0x44, 68 PMBUS_VOUT_UV_FAULT_RESPONSE = 0x45, 69 PMBUS_IOUT_OC_FAULT_LIMIT = 0x46, 70 PMBUS_IOUT_OC_FAULT_RESPONSE = 0x47, 71 PMBUS_IOUT_OC_LV_FAULT_LIMIT = 0x48, 72 PMBUS_IOUT_OC_LV_FAULT_RESPONSE = 0x49, 73 PMBUS_IOUT_OC_WARN_LIMIT = 0x4A, 74 PMBUS_IOUT_UC_FAULT_LIMIT = 0x4B, 75 PMBUS_IOUT_UC_FAULT_RESPONSE = 0x4C, 76 77 PMBUS_OT_FAULT_LIMIT = 0x4F, 78 PMBUS_OT_FAULT_RESPONSE = 0x50, 79 PMBUS_OT_WARN_LIMIT = 0x51, 80 PMBUS_UT_WARN_LIMIT = 0x52, 81 PMBUS_UT_FAULT_LIMIT = 0x53, 82 PMBUS_UT_FAULT_RESPONSE = 0x54, 83 PMBUS_VIN_OV_FAULT_LIMIT = 0x55, 84 PMBUS_VIN_OV_FAULT_RESPONSE = 0x56, 85 PMBUS_VIN_OV_WARN_LIMIT = 0x57, 86 PMBUS_VIN_UV_WARN_LIMIT = 0x58, 87 PMBUS_VIN_UV_FAULT_LIMIT = 0x59, 88 89 PMBUS_IIN_OC_FAULT_LIMIT = 0x5B, 90 PMBUS_IIN_OC_WARN_LIMIT = 0x5D, 91 92 PMBUS_POUT_OP_FAULT_LIMIT = 0x68, 93 PMBUS_POUT_OP_WARN_LIMIT = 0x6A, 94 PMBUS_PIN_OP_WARN_LIMIT = 0x6B, 95 96 PMBUS_STATUS_BYTE = 0x78, 97 PMBUS_STATUS_WORD = 0x79, 98 PMBUS_STATUS_VOUT = 0x7A, 99 PMBUS_STATUS_IOUT = 0x7B, 100 PMBUS_STATUS_INPUT = 0x7C, 101 PMBUS_STATUS_TEMPERATURE = 0x7D, 102 PMBUS_STATUS_CML = 0x7E, 103 PMBUS_STATUS_OTHER = 0x7F, 104 PMBUS_STATUS_MFR_SPECIFIC = 0x80, 105 PMBUS_STATUS_FAN_12 = 0x81, 106 PMBUS_STATUS_FAN_34 = 0x82, 107 108 PMBUS_READ_VIN = 0x88, 109 PMBUS_READ_IIN = 0x89, 110 PMBUS_READ_VCAP = 0x8A, 111 PMBUS_READ_VOUT = 0x8B, 112 PMBUS_READ_IOUT = 0x8C, 113 PMBUS_READ_TEMPERATURE_1 = 0x8D, 114 PMBUS_READ_TEMPERATURE_2 = 0x8E, 115 PMBUS_READ_TEMPERATURE_3 = 0x8F, 116 PMBUS_READ_FAN_SPEED_1 = 0x90, 117 PMBUS_READ_FAN_SPEED_2 = 0x91, 118 PMBUS_READ_FAN_SPEED_3 = 0x92, 119 PMBUS_READ_FAN_SPEED_4 = 0x93, 120 PMBUS_READ_DUTY_CYCLE = 0x94, 121 PMBUS_READ_FREQUENCY = 0x95, 122 PMBUS_READ_POUT = 0x96, 123 PMBUS_READ_PIN = 0x97, 124 125 PMBUS_REVISION = 0x98, 126 PMBUS_MFR_ID = 0x99, 127 PMBUS_MFR_MODEL = 0x9A, 128 PMBUS_MFR_REVISION = 0x9B, 129 PMBUS_MFR_LOCATION = 0x9C, 130 PMBUS_MFR_DATE = 0x9D, 131 PMBUS_MFR_SERIAL = 0x9E, 132 133 /* 134 * Virtual registers. 135 * Useful to support attributes which are not supported by standard PMBus 136 * registers but exist as manufacturer specific registers on individual chips. 137 * Must be mapped to real registers in device specific code. 138 * 139 * Semantics: 140 * Virtual registers are all word size. 141 * READ registers are read-only; writes are either ignored or return an error. 142 * RESET registers are read/write. Reading reset registers returns zero 143 * (used for detection), writing any value causes the associated history to be 144 * reset. 145 * Virtual registers have to be handled in device specific driver code. Chip 146 * driver code returns non-negative register values if a virtual register is 147 * supported, or a negative error code if not. The chip driver may return 148 * -ENODATA or any other error code in this case, though an error code other 149 * than -ENODATA is handled more efficiently and thus preferred. Either case, 150 * the calling PMBus core code will abort if the chip driver returns an error 151 * code when reading or writing virtual registers. 152 */ 153 PMBUS_VIRT_BASE = 0x100, 154 PMBUS_VIRT_READ_TEMP_AVG, 155 PMBUS_VIRT_READ_TEMP_MIN, 156 PMBUS_VIRT_READ_TEMP_MAX, 157 PMBUS_VIRT_RESET_TEMP_HISTORY, 158 PMBUS_VIRT_READ_VIN_AVG, 159 PMBUS_VIRT_READ_VIN_MIN, 160 PMBUS_VIRT_READ_VIN_MAX, 161 PMBUS_VIRT_RESET_VIN_HISTORY, 162 PMBUS_VIRT_READ_IIN_AVG, 163 PMBUS_VIRT_READ_IIN_MIN, 164 PMBUS_VIRT_READ_IIN_MAX, 165 PMBUS_VIRT_RESET_IIN_HISTORY, 166 PMBUS_VIRT_READ_PIN_AVG, 167 PMBUS_VIRT_READ_PIN_MIN, 168 PMBUS_VIRT_READ_PIN_MAX, 169 PMBUS_VIRT_RESET_PIN_HISTORY, 170 PMBUS_VIRT_READ_POUT_AVG, 171 PMBUS_VIRT_READ_POUT_MIN, 172 PMBUS_VIRT_READ_POUT_MAX, 173 PMBUS_VIRT_RESET_POUT_HISTORY, 174 PMBUS_VIRT_READ_VOUT_AVG, 175 PMBUS_VIRT_READ_VOUT_MIN, 176 PMBUS_VIRT_READ_VOUT_MAX, 177 PMBUS_VIRT_RESET_VOUT_HISTORY, 178 PMBUS_VIRT_READ_IOUT_AVG, 179 PMBUS_VIRT_READ_IOUT_MIN, 180 PMBUS_VIRT_READ_IOUT_MAX, 181 PMBUS_VIRT_RESET_IOUT_HISTORY, 182 PMBUS_VIRT_READ_TEMP2_AVG, 183 PMBUS_VIRT_READ_TEMP2_MIN, 184 PMBUS_VIRT_READ_TEMP2_MAX, 185 PMBUS_VIRT_RESET_TEMP2_HISTORY, 186 187 PMBUS_VIRT_READ_VMON, 188 PMBUS_VIRT_VMON_UV_WARN_LIMIT, 189 PMBUS_VIRT_VMON_OV_WARN_LIMIT, 190 PMBUS_VIRT_VMON_UV_FAULT_LIMIT, 191 PMBUS_VIRT_VMON_OV_FAULT_LIMIT, 192 PMBUS_VIRT_STATUS_VMON, 193 194 /* 195 * RPM and PWM Fan control 196 * 197 * Drivers wanting to expose PWM control must define the behaviour of 198 * PMBUS_VIRT_PWM_[1-4] and PMBUS_VIRT_PWM_ENABLE_[1-4] in the 199 * {read,write}_word_data callback. 200 * 201 * pmbus core provides a default implementation for 202 * PMBUS_VIRT_FAN_TARGET_[1-4]. 203 * 204 * TARGET, PWM and PWM_ENABLE members must be defined sequentially; 205 * pmbus core uses the difference between the provided register and 206 * it's _1 counterpart to calculate the FAN/PWM ID. 207 */ 208 PMBUS_VIRT_FAN_TARGET_1, 209 PMBUS_VIRT_FAN_TARGET_2, 210 PMBUS_VIRT_FAN_TARGET_3, 211 PMBUS_VIRT_FAN_TARGET_4, 212 PMBUS_VIRT_PWM_1, 213 PMBUS_VIRT_PWM_2, 214 PMBUS_VIRT_PWM_3, 215 PMBUS_VIRT_PWM_4, 216 PMBUS_VIRT_PWM_ENABLE_1, 217 PMBUS_VIRT_PWM_ENABLE_2, 218 PMBUS_VIRT_PWM_ENABLE_3, 219 PMBUS_VIRT_PWM_ENABLE_4, 220 }; 221 222 /* 223 * OPERATION 224 */ 225 #define PB_OPERATION_CONTROL_ON BIT(7) 226 227 /* 228 * CAPABILITY 229 */ 230 #define PB_CAPABILITY_SMBALERT BIT(4) 231 #define PB_CAPABILITY_ERROR_CHECK BIT(7) 232 233 /* 234 * VOUT_MODE 235 */ 236 #define PB_VOUT_MODE_MODE_MASK 0xe0 237 #define PB_VOUT_MODE_PARAM_MASK 0x1f 238 239 #define PB_VOUT_MODE_LINEAR 0x00 240 #define PB_VOUT_MODE_VID 0x20 241 #define PB_VOUT_MODE_DIRECT 0x40 242 243 /* 244 * Fan configuration 245 */ 246 #define PB_FAN_2_PULSE_MASK (BIT(0) | BIT(1)) 247 #define PB_FAN_2_RPM BIT(2) 248 #define PB_FAN_2_INSTALLED BIT(3) 249 #define PB_FAN_1_PULSE_MASK (BIT(4) | BIT(5)) 250 #define PB_FAN_1_RPM BIT(6) 251 #define PB_FAN_1_INSTALLED BIT(7) 252 253 enum pmbus_fan_mode { percent = 0, rpm }; 254 255 /* 256 * STATUS_BYTE, STATUS_WORD (lower) 257 */ 258 #define PB_STATUS_NONE_ABOVE BIT(0) 259 #define PB_STATUS_CML BIT(1) 260 #define PB_STATUS_TEMPERATURE BIT(2) 261 #define PB_STATUS_VIN_UV BIT(3) 262 #define PB_STATUS_IOUT_OC BIT(4) 263 #define PB_STATUS_VOUT_OV BIT(5) 264 #define PB_STATUS_OFF BIT(6) 265 #define PB_STATUS_BUSY BIT(7) 266 267 /* 268 * STATUS_WORD (upper) 269 */ 270 #define PB_STATUS_UNKNOWN BIT(8) 271 #define PB_STATUS_OTHER BIT(9) 272 #define PB_STATUS_FANS BIT(10) 273 #define PB_STATUS_POWER_GOOD_N BIT(11) 274 #define PB_STATUS_WORD_MFR BIT(12) 275 #define PB_STATUS_INPUT BIT(13) 276 #define PB_STATUS_IOUT_POUT BIT(14) 277 #define PB_STATUS_VOUT BIT(15) 278 279 /* 280 * STATUS_IOUT 281 */ 282 #define PB_POUT_OP_WARNING BIT(0) 283 #define PB_POUT_OP_FAULT BIT(1) 284 #define PB_POWER_LIMITING BIT(2) 285 #define PB_CURRENT_SHARE_FAULT BIT(3) 286 #define PB_IOUT_UC_FAULT BIT(4) 287 #define PB_IOUT_OC_WARNING BIT(5) 288 #define PB_IOUT_OC_LV_FAULT BIT(6) 289 #define PB_IOUT_OC_FAULT BIT(7) 290 291 /* 292 * STATUS_VOUT, STATUS_INPUT 293 */ 294 #define PB_VOLTAGE_UV_FAULT BIT(4) 295 #define PB_VOLTAGE_UV_WARNING BIT(5) 296 #define PB_VOLTAGE_OV_WARNING BIT(6) 297 #define PB_VOLTAGE_OV_FAULT BIT(7) 298 299 /* 300 * STATUS_INPUT 301 */ 302 #define PB_PIN_OP_WARNING BIT(0) 303 #define PB_IIN_OC_WARNING BIT(1) 304 #define PB_IIN_OC_FAULT BIT(2) 305 306 /* 307 * STATUS_TEMPERATURE 308 */ 309 #define PB_TEMP_UT_FAULT BIT(4) 310 #define PB_TEMP_UT_WARNING BIT(5) 311 #define PB_TEMP_OT_WARNING BIT(6) 312 #define PB_TEMP_OT_FAULT BIT(7) 313 314 /* 315 * STATUS_FAN 316 */ 317 #define PB_FAN_AIRFLOW_WARNING BIT(0) 318 #define PB_FAN_AIRFLOW_FAULT BIT(1) 319 #define PB_FAN_FAN2_SPEED_OVERRIDE BIT(2) 320 #define PB_FAN_FAN1_SPEED_OVERRIDE BIT(3) 321 #define PB_FAN_FAN2_WARNING BIT(4) 322 #define PB_FAN_FAN1_WARNING BIT(5) 323 #define PB_FAN_FAN2_FAULT BIT(6) 324 #define PB_FAN_FAN1_FAULT BIT(7) 325 326 /* 327 * CML_FAULT_STATUS 328 */ 329 #define PB_CML_FAULT_OTHER_MEM_LOGIC BIT(0) 330 #define PB_CML_FAULT_OTHER_COMM BIT(1) 331 #define PB_CML_FAULT_PROCESSOR BIT(3) 332 #define PB_CML_FAULT_MEMORY BIT(4) 333 #define PB_CML_FAULT_PACKET_ERROR BIT(5) 334 #define PB_CML_FAULT_INVALID_DATA BIT(6) 335 #define PB_CML_FAULT_INVALID_COMMAND BIT(7) 336 337 enum pmbus_sensor_classes { 338 PSC_VOLTAGE_IN = 0, 339 PSC_VOLTAGE_OUT, 340 PSC_CURRENT_IN, 341 PSC_CURRENT_OUT, 342 PSC_POWER, 343 PSC_TEMPERATURE, 344 PSC_FAN, 345 PSC_PWM, 346 PSC_NUM_CLASSES /* Number of power sensor classes */ 347 }; 348 349 #define PMBUS_PAGES 32 /* Per PMBus specification */ 350 351 /* Functionality bit mask */ 352 #define PMBUS_HAVE_VIN BIT(0) 353 #define PMBUS_HAVE_VCAP BIT(1) 354 #define PMBUS_HAVE_VOUT BIT(2) 355 #define PMBUS_HAVE_IIN BIT(3) 356 #define PMBUS_HAVE_IOUT BIT(4) 357 #define PMBUS_HAVE_PIN BIT(5) 358 #define PMBUS_HAVE_POUT BIT(6) 359 #define PMBUS_HAVE_FAN12 BIT(7) 360 #define PMBUS_HAVE_FAN34 BIT(8) 361 #define PMBUS_HAVE_TEMP BIT(9) 362 #define PMBUS_HAVE_TEMP2 BIT(10) 363 #define PMBUS_HAVE_TEMP3 BIT(11) 364 #define PMBUS_HAVE_STATUS_VOUT BIT(12) 365 #define PMBUS_HAVE_STATUS_IOUT BIT(13) 366 #define PMBUS_HAVE_STATUS_INPUT BIT(14) 367 #define PMBUS_HAVE_STATUS_TEMP BIT(15) 368 #define PMBUS_HAVE_STATUS_FAN12 BIT(16) 369 #define PMBUS_HAVE_STATUS_FAN34 BIT(17) 370 #define PMBUS_HAVE_VMON BIT(18) 371 #define PMBUS_HAVE_STATUS_VMON BIT(19) 372 #define PMBUS_HAVE_PWM12 BIT(20) 373 #define PMBUS_HAVE_PWM34 BIT(21) 374 375 #define PMBUS_PAGE_VIRTUAL BIT(31) 376 377 enum pmbus_data_format { linear = 0, direct, vid }; 378 enum vrm_version { vr11 = 0, vr12, vr13 }; 379 380 struct pmbus_driver_info { 381 int pages; /* Total number of pages */ 382 enum pmbus_data_format format[PSC_NUM_CLASSES]; 383 enum vrm_version vrm_version; 384 /* 385 * Support one set of coefficients for each sensor type 386 * Used for chips providing data in direct mode. 387 */ 388 int m[PSC_NUM_CLASSES]; /* mantissa for direct data format */ 389 int b[PSC_NUM_CLASSES]; /* offset */ 390 int R[PSC_NUM_CLASSES]; /* exponent */ 391 392 u32 func[PMBUS_PAGES]; /* Functionality, per page */ 393 /* 394 * The following functions map manufacturing specific register values 395 * to PMBus standard register values. Specify only if mapping is 396 * necessary. 397 * Functions return the register value (read) or zero (write) if 398 * successful. A return value of -ENODATA indicates that there is no 399 * manufacturer specific register, but that a standard PMBus register 400 * may exist. Any other negative return value indicates that the 401 * register does not exist, and that no attempt should be made to read 402 * the standard register. 403 */ 404 int (*read_byte_data)(struct i2c_client *client, int page, int reg); 405 int (*read_word_data)(struct i2c_client *client, int page, int reg); 406 int (*write_word_data)(struct i2c_client *client, int page, int reg, 407 u16 word); 408 int (*write_byte)(struct i2c_client *client, int page, u8 value); 409 /* 410 * The identify function determines supported PMBus functionality. 411 * This function is only necessary if a chip driver supports multiple 412 * chips, and the chip functionality is not pre-determined. 413 */ 414 int (*identify)(struct i2c_client *client, 415 struct pmbus_driver_info *info); 416 417 /* Regulator functionality, if supported by this chip driver. */ 418 int num_regulators; 419 const struct regulator_desc *reg_desc; 420 }; 421 422 /* Regulator ops */ 423 424 extern const struct regulator_ops pmbus_regulator_ops; 425 426 /* Macro for filling in array of struct regulator_desc */ 427 #define PMBUS_REGULATOR(_name, _id) \ 428 [_id] = { \ 429 .name = (_name # _id), \ 430 .id = (_id), \ 431 .of_match = of_match_ptr(_name # _id), \ 432 .regulators_node = of_match_ptr("regulators"), \ 433 .ops = &pmbus_regulator_ops, \ 434 .type = REGULATOR_VOLTAGE, \ 435 .owner = THIS_MODULE, \ 436 } 437 438 /* Function declarations */ 439 440 void pmbus_clear_cache(struct i2c_client *client); 441 int pmbus_set_page(struct i2c_client *client, int page); 442 int pmbus_read_word_data(struct i2c_client *client, int page, u8 reg); 443 int pmbus_write_word_data(struct i2c_client *client, int page, u8 reg, u16 word); 444 int pmbus_read_byte_data(struct i2c_client *client, int page, u8 reg); 445 int pmbus_write_byte(struct i2c_client *client, int page, u8 value); 446 int pmbus_write_byte_data(struct i2c_client *client, int page, u8 reg, 447 u8 value); 448 int pmbus_update_byte_data(struct i2c_client *client, int page, u8 reg, 449 u8 mask, u8 value); 450 void pmbus_clear_faults(struct i2c_client *client); 451 bool pmbus_check_byte_register(struct i2c_client *client, int page, int reg); 452 bool pmbus_check_word_register(struct i2c_client *client, int page, int reg); 453 int pmbus_do_probe(struct i2c_client *client, const struct i2c_device_id *id, 454 struct pmbus_driver_info *info); 455 int pmbus_do_remove(struct i2c_client *client); 456 const struct pmbus_driver_info *pmbus_get_driver_info(struct i2c_client 457 *client); 458 int pmbus_get_fan_rate_device(struct i2c_client *client, int page, int id, 459 enum pmbus_fan_mode mode); 460 int pmbus_get_fan_rate_cached(struct i2c_client *client, int page, int id, 461 enum pmbus_fan_mode mode); 462 int pmbus_update_fan(struct i2c_client *client, int page, int id, 463 u8 config, u8 mask, u16 command); 464 struct dentry *pmbus_get_debugfs_dir(struct i2c_client *client); 465 466 #endif /* PMBUS_H */ 467
