1 /******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
8 * Copyright(c) 2007 - 2014 Intel Corporation. All rights reserved.
9 * Copyright (C) 2016 - 2017 Intel Deutschland GmbH
10 * Copyright(c) 2018 Intel Corporation
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30 * Intel Linux Wireless <linuxwifi@intel.com>
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32 *
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34 *
35 * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
36 * Copyright (C) 2016 - 2017 Intel Deutschland GmbH
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66 *****************************************************************************/
67 #ifndef __IWL_CONFIG_H__
68 #define __IWL_CONFIG_H__
69
70 #include <linux/types.h>
71 #include <linux/netdevice.h>
72 #include <linux/ieee80211.h>
73 #include <linux/nl80211.h>
74 #include "iwl-csr.h"
75
76 enum iwl_device_family {
77 IWL_DEVICE_FAMILY_UNDEFINED,
78 IWL_DEVICE_FAMILY_1000,
79 IWL_DEVICE_FAMILY_100,
80 IWL_DEVICE_FAMILY_2000,
81 IWL_DEVICE_FAMILY_2030,
82 IWL_DEVICE_FAMILY_105,
83 IWL_DEVICE_FAMILY_135,
84 IWL_DEVICE_FAMILY_5000,
85 IWL_DEVICE_FAMILY_5150,
86 IWL_DEVICE_FAMILY_6000,
87 IWL_DEVICE_FAMILY_6000i,
88 IWL_DEVICE_FAMILY_6005,
89 IWL_DEVICE_FAMILY_6030,
90 IWL_DEVICE_FAMILY_6050,
91 IWL_DEVICE_FAMILY_6150,
92 IWL_DEVICE_FAMILY_7000,
93 IWL_DEVICE_FAMILY_8000,
94 IWL_DEVICE_FAMILY_9000,
95 IWL_DEVICE_FAMILY_22000,
96 IWL_DEVICE_FAMILY_22560,
97 };
98
99 /*
100 * LED mode
101 * IWL_LED_DEFAULT: use device default
102 * IWL_LED_RF_STATE: turn LED on/off based on RF state
103 * LED ON = RF ON
104 * LED OFF = RF OFF
105 * IWL_LED_BLINK: adjust led blink rate based on blink table
106 * IWL_LED_DISABLE: led disabled
107 */
108 enum iwl_led_mode {
109 IWL_LED_DEFAULT,
110 IWL_LED_RF_STATE,
111 IWL_LED_BLINK,
112 IWL_LED_DISABLE,
113 };
114
115 /**
116 * enum iwl_nvm_type - nvm formats
117 * @IWL_NVM: the regular format
118 * @IWL_NVM_EXT: extended NVM format
119 * @IWL_NVM_SDP: NVM format used by 3168 series
120 */
121 enum iwl_nvm_type {
122 IWL_NVM,
123 IWL_NVM_EXT,
124 IWL_NVM_SDP,
125 };
126
127 /*
128 * This is the threshold value of plcp error rate per 100mSecs. It is
129 * used to set and check for the validity of plcp_delta.
130 */
131 #define IWL_MAX_PLCP_ERR_THRESHOLD_MIN 1
132 #define IWL_MAX_PLCP_ERR_THRESHOLD_DEF 50
133 #define IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF 100
134 #define IWL_MAX_PLCP_ERR_EXT_LONG_THRESHOLD_DEF 200
135 #define IWL_MAX_PLCP_ERR_THRESHOLD_MAX 255
136 #define IWL_MAX_PLCP_ERR_THRESHOLD_DISABLE 0
137
138 /* TX queue watchdog timeouts in mSecs */
139 #define IWL_WATCHDOG_DISABLED 0
140 #define IWL_DEF_WD_TIMEOUT 2500
141 #define IWL_LONG_WD_TIMEOUT 10000
142 #define IWL_MAX_WD_TIMEOUT 120000
143
144 #define IWL_DEFAULT_MAX_TX_POWER 22
145 #define IWL_TX_CSUM_NETIF_FLAGS (NETIF_F_IPV6_CSUM | NETIF_F_IP_CSUM |\
146 NETIF_F_TSO | NETIF_F_TSO6)
147
148 /* Antenna presence definitions */
149 #define ANT_NONE 0x0
150 #define ANT_INVALID 0xff
151 #define ANT_A BIT(0)
152 #define ANT_B BIT(1)
153 #define ANT_C BIT(2)
154 #define ANT_AB (ANT_A | ANT_B)
155 #define ANT_AC (ANT_A | ANT_C)
156 #define ANT_BC (ANT_B | ANT_C)
157 #define ANT_ABC (ANT_A | ANT_B | ANT_C)
158 #define MAX_ANT_NUM 3
159
160
num_of_ant(u8 mask)161 static inline u8 num_of_ant(u8 mask)
162 {
163 return !!((mask) & ANT_A) +
164 !!((mask) & ANT_B) +
165 !!((mask) & ANT_C);
166 }
167
168 /*
169 * @max_ll_items: max number of OTP blocks
170 * @shadow_ram_support: shadow support for OTP memory
171 * @led_compensation: compensate on the led on/off time per HW according
172 * to the deviation to achieve the desired led frequency.
173 * The detail algorithm is described in iwl-led.c
174 * @wd_timeout: TX queues watchdog timeout
175 * @max_event_log_size: size of event log buffer size for ucode event logging
176 * @shadow_reg_enable: HW shadow register support
177 * @apmg_wake_up_wa: should the MAC access REQ be asserted when a command
178 * is in flight. This is due to a HW bug in 7260, 3160 and 7265.
179 * @scd_chain_ext_wa: should the chain extension feature in SCD be disabled.
180 * @max_tfd_queue_size: max number of entries in tfd queue.
181 */
182 struct iwl_base_params {
183 unsigned int wd_timeout;
184
185 u16 eeprom_size;
186 u16 max_event_log_size;
187
188 u8 pll_cfg:1, /* for iwl_pcie_apm_init() */
189 shadow_ram_support:1,
190 shadow_reg_enable:1,
191 pcie_l1_allowed:1,
192 apmg_wake_up_wa:1,
193 scd_chain_ext_wa:1;
194
195 u16 num_of_queues; /* def: HW dependent */
196 u32 max_tfd_queue_size; /* def: HW dependent */
197
198 u8 max_ll_items;
199 u8 led_compensation;
200 };
201
202 /*
203 * @stbc: support Tx STBC and 1*SS Rx STBC
204 * @ldpc: support Tx/Rx with LDPC
205 * @use_rts_for_aggregation: use rts/cts protection for HT traffic
206 * @ht40_bands: bitmap of bands (using %NL80211_BAND_*) that support HT40
207 */
208 struct iwl_ht_params {
209 u8 ht_greenfield_support:1,
210 stbc:1,
211 ldpc:1,
212 use_rts_for_aggregation:1;
213 u8 ht40_bands;
214 };
215
216 /*
217 * Tx-backoff threshold
218 * @temperature: The threshold in Celsius
219 * @backoff: The tx-backoff in uSec
220 */
221 struct iwl_tt_tx_backoff {
222 s32 temperature;
223 u32 backoff;
224 };
225
226 #define TT_TX_BACKOFF_SIZE 6
227
228 /**
229 * struct iwl_tt_params - thermal throttling parameters
230 * @ct_kill_entry: CT Kill entry threshold
231 * @ct_kill_exit: CT Kill exit threshold
232 * @ct_kill_duration: The time intervals (in uSec) in which the driver needs
233 * to checks whether to exit CT Kill.
234 * @dynamic_smps_entry: Dynamic SMPS entry threshold
235 * @dynamic_smps_exit: Dynamic SMPS exit threshold
236 * @tx_protection_entry: TX protection entry threshold
237 * @tx_protection_exit: TX protection exit threshold
238 * @tx_backoff: Array of thresholds for tx-backoff , in ascending order.
239 * @support_ct_kill: Support CT Kill?
240 * @support_dynamic_smps: Support dynamic SMPS?
241 * @support_tx_protection: Support tx protection?
242 * @support_tx_backoff: Support tx-backoff?
243 */
244 struct iwl_tt_params {
245 u32 ct_kill_entry;
246 u32 ct_kill_exit;
247 u32 ct_kill_duration;
248 u32 dynamic_smps_entry;
249 u32 dynamic_smps_exit;
250 u32 tx_protection_entry;
251 u32 tx_protection_exit;
252 struct iwl_tt_tx_backoff tx_backoff[TT_TX_BACKOFF_SIZE];
253 u8 support_ct_kill:1,
254 support_dynamic_smps:1,
255 support_tx_protection:1,
256 support_tx_backoff:1;
257 };
258
259 /*
260 * information on how to parse the EEPROM
261 */
262 #define EEPROM_REG_BAND_1_CHANNELS 0x08
263 #define EEPROM_REG_BAND_2_CHANNELS 0x26
264 #define EEPROM_REG_BAND_3_CHANNELS 0x42
265 #define EEPROM_REG_BAND_4_CHANNELS 0x5C
266 #define EEPROM_REG_BAND_5_CHANNELS 0x74
267 #define EEPROM_REG_BAND_24_HT40_CHANNELS 0x82
268 #define EEPROM_REG_BAND_52_HT40_CHANNELS 0x92
269 #define EEPROM_6000_REG_BAND_24_HT40_CHANNELS 0x80
270 #define EEPROM_REGULATORY_BAND_NO_HT40 0
271
272 /* lower blocks contain EEPROM image and calibration data */
273 #define OTP_LOW_IMAGE_SIZE (2 * 512 * sizeof(u16)) /* 2 KB */
274 #define OTP_LOW_IMAGE_SIZE_FAMILY_7000 (16 * 512 * sizeof(u16)) /* 16 KB */
275 #define OTP_LOW_IMAGE_SIZE_FAMILY_8000 (32 * 512 * sizeof(u16)) /* 32 KB */
276 #define OTP_LOW_IMAGE_SIZE_FAMILY_9000 OTP_LOW_IMAGE_SIZE_FAMILY_8000
277 #define OTP_LOW_IMAGE_SIZE_FAMILY_22000 OTP_LOW_IMAGE_SIZE_FAMILY_9000
278
279 struct iwl_eeprom_params {
280 const u8 regulatory_bands[7];
281 bool enhanced_txpower;
282 };
283
284 /* Tx-backoff power threshold
285 * @pwr: The power limit in mw
286 * @backoff: The tx-backoff in uSec
287 */
288 struct iwl_pwr_tx_backoff {
289 u32 pwr;
290 u32 backoff;
291 };
292
293 /**
294 * struct iwl_csr_params
295 *
296 * @flag_sw_reset: reset the device
297 * @flag_mac_clock_ready:
298 * Indicates MAC (ucode processor, etc.) is powered up and can run.
299 * Internal resources are accessible.
300 * NOTE: This does not indicate that the processor is actually running.
301 * NOTE: This does not indicate that device has completed
302 * init or post-power-down restore of internal SRAM memory.
303 * Use CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP as indication that
304 * SRAM is restored and uCode is in normal operation mode.
305 * This note is relevant only for pre 5xxx devices.
306 * NOTE: After device reset, this bit remains "0" until host sets
307 * INIT_DONE
308 * @flag_init_done: Host sets this to put device into fully operational
309 * D0 power mode. Host resets this after SW_RESET to put device into
310 * low power mode.
311 * @flag_mac_access_req: Host sets this to request and maintain MAC wakeup,
312 * to allow host access to device-internal resources. Host must wait for
313 * mac_clock_ready (and !GOING_TO_SLEEP) before accessing non-CSR device
314 * registers.
315 * @flag_val_mac_access_en: mac access is enabled
316 * @flag_master_dis: disable master
317 * @flag_stop_master: stop master
318 * @addr_sw_reset: address for resetting the device
319 * @mac_addr0_otp: first part of MAC address from OTP
320 * @mac_addr1_otp: second part of MAC address from OTP
321 * @mac_addr0_strap: first part of MAC address from strap
322 * @mac_addr1_strap: second part of MAC address from strap
323 */
324 struct iwl_csr_params {
325 u8 flag_sw_reset;
326 u8 flag_mac_clock_ready;
327 u8 flag_init_done;
328 u8 flag_mac_access_req;
329 u8 flag_val_mac_access_en;
330 u8 flag_master_dis;
331 u8 flag_stop_master;
332 u8 addr_sw_reset;
333 u32 mac_addr0_otp;
334 u32 mac_addr1_otp;
335 u32 mac_addr0_strap;
336 u32 mac_addr1_strap;
337 };
338
339 /**
340 * struct iwl_cfg
341 * @name: Official name of the device
342 * @fw_name_pre: Firmware filename prefix. The api version and extension
343 * (.ucode) will be added to filename before loading from disk. The
344 * filename is constructed as fw_name_pre<api>.ucode.
345 * @fw_name_pre_b_or_c_step: same as @fw_name_pre, only for b or c steps
346 * (if supported)
347 * @fw_name_pre_rf_next_step: same as @fw_name_pre_b_or_c_step, only for rf
348 * next step. Supported only in integrated solutions.
349 * @ucode_api_max: Highest version of uCode API supported by driver.
350 * @ucode_api_min: Lowest version of uCode API supported by driver.
351 * @max_inst_size: The maximal length of the fw inst section (only DVM)
352 * @max_data_size: The maximal length of the fw data section (only DVM)
353 * @valid_tx_ant: valid transmit antenna
354 * @valid_rx_ant: valid receive antenna
355 * @non_shared_ant: the antenna that is for WiFi only
356 * @nvm_ver: NVM version
357 * @nvm_calib_ver: NVM calibration version
358 * @lib: pointer to the lib ops
359 * @base_params: pointer to basic parameters
360 * @ht_params: point to ht parameters
361 * @led_mode: 0=blinking, 1=On(RF On)/Off(RF Off)
362 * @rx_with_siso_diversity: 1x1 device with rx antenna diversity
363 * @internal_wimax_coex: internal wifi/wimax combo device
364 * @high_temp: Is this NIC is designated to be in high temperature.
365 * @host_interrupt_operation_mode: device needs host interrupt operation
366 * mode set
367 * @nvm_hw_section_num: the ID of the HW NVM section
368 * @mac_addr_from_csr: read HW address from CSR registers
369 * @features: hw features, any combination of feature_whitelist
370 * @pwr_tx_backoffs: translation table between power limits and backoffs
371 * @csr: csr flags and addresses that are different across devices
372 * @max_rx_agg_size: max RX aggregation size of the ADDBA request/response
373 * @max_tx_agg_size: max TX aggregation size of the ADDBA request/response
374 * @max_ht_ampdu_factor: the exponent of the max length of A-MPDU that the
375 * station can receive in HT
376 * @max_vht_ampdu_exponent: the exponent of the max length of A-MPDU that the
377 * station can receive in VHT
378 * @dccm_offset: offset from which DCCM begins
379 * @dccm_len: length of DCCM (including runtime stack CCM)
380 * @dccm2_offset: offset from which the second DCCM begins
381 * @dccm2_len: length of the second DCCM
382 * @smem_offset: offset from which the SMEM begins
383 * @smem_len: the length of SMEM
384 * @mq_rx_supported: multi-queue rx support
385 * @vht_mu_mimo_supported: VHT MU-MIMO support
386 * @rf_id: need to read rf_id to determine the firmware image
387 * @integrated: discrete or integrated
388 * @gen2: 22000 and on transport operation
389 * @cdb: CDB support
390 * @nvm_type: see &enum iwl_nvm_type
391 *
392 * We enable the driver to be backward compatible wrt. hardware features.
393 * API differences in uCode shouldn't be handled here but through TLVs
394 * and/or the uCode API version instead.
395 */
396 struct iwl_cfg {
397 /* params specific to an individual device within a device family */
398 const char *name;
399 const char *fw_name_pre;
400 const char *fw_name_pre_b_or_c_step;
401 const char *fw_name_pre_rf_next_step;
402 /* params not likely to change within a device family */
403 const struct iwl_base_params *base_params;
404 /* params likely to change within a device family */
405 const struct iwl_ht_params *ht_params;
406 const struct iwl_eeprom_params *eeprom_params;
407 const struct iwl_pwr_tx_backoff *pwr_tx_backoffs;
408 const char *default_nvm_file_C_step;
409 const struct iwl_tt_params *thermal_params;
410 const struct iwl_csr_params *csr;
411 enum iwl_device_family device_family;
412 enum iwl_led_mode led_mode;
413 enum iwl_nvm_type nvm_type;
414 u32 max_data_size;
415 u32 max_inst_size;
416 netdev_features_t features;
417 u32 dccm_offset;
418 u32 dccm_len;
419 u32 dccm2_offset;
420 u32 dccm2_len;
421 u32 smem_offset;
422 u32 smem_len;
423 u32 soc_latency;
424 u16 nvm_ver;
425 u16 nvm_calib_ver;
426 u32 rx_with_siso_diversity:1,
427 bt_shared_single_ant:1,
428 internal_wimax_coex:1,
429 host_interrupt_operation_mode:1,
430 high_temp:1,
431 mac_addr_from_csr:1,
432 lp_xtal_workaround:1,
433 disable_dummy_notification:1,
434 apmg_not_supported:1,
435 mq_rx_supported:1,
436 vht_mu_mimo_supported:1,
437 rf_id:1,
438 integrated:1,
439 use_tfh:1,
440 gen2:1,
441 cdb:1,
442 dbgc_supported:1;
443 u8 valid_tx_ant;
444 u8 valid_rx_ant;
445 u8 non_shared_ant;
446 u8 nvm_hw_section_num;
447 u8 max_rx_agg_size;
448 u8 max_tx_agg_size;
449 u8 max_ht_ampdu_exponent;
450 u8 max_vht_ampdu_exponent;
451 u8 ucode_api_max;
452 u8 ucode_api_min;
453 u32 min_umac_error_event_table;
454 u32 extra_phy_cfg_flags;
455 };
456
457 static const struct iwl_csr_params iwl_csr_v1 = {
458 .flag_mac_clock_ready = 0,
459 .flag_val_mac_access_en = 0,
460 .flag_init_done = 2,
461 .flag_mac_access_req = 3,
462 .flag_sw_reset = 7,
463 .flag_master_dis = 8,
464 .flag_stop_master = 9,
465 .addr_sw_reset = (CSR_BASE + 0x020),
466 .mac_addr0_otp = 0x380,
467 .mac_addr1_otp = 0x384,
468 .mac_addr0_strap = 0x388,
469 .mac_addr1_strap = 0x38C
470 };
471
472 static const struct iwl_csr_params iwl_csr_v2 = {
473 .flag_init_done = 6,
474 .flag_mac_clock_ready = 20,
475 .flag_val_mac_access_en = 20,
476 .flag_mac_access_req = 21,
477 .flag_master_dis = 28,
478 .flag_stop_master = 29,
479 .flag_sw_reset = 31,
480 .addr_sw_reset = (CSR_BASE + 0x024),
481 .mac_addr0_otp = 0x30,
482 .mac_addr1_otp = 0x34,
483 .mac_addr0_strap = 0x38,
484 .mac_addr1_strap = 0x3C
485 };
486
487 /*
488 * This list declares the config structures for all devices.
489 */
490 #if IS_ENABLED(CONFIG_IWLDVM)
491 extern const struct iwl_cfg iwl5300_agn_cfg;
492 extern const struct iwl_cfg iwl5100_agn_cfg;
493 extern const struct iwl_cfg iwl5350_agn_cfg;
494 extern const struct iwl_cfg iwl5100_bgn_cfg;
495 extern const struct iwl_cfg iwl5100_abg_cfg;
496 extern const struct iwl_cfg iwl5150_agn_cfg;
497 extern const struct iwl_cfg iwl5150_abg_cfg;
498 extern const struct iwl_cfg iwl6005_2agn_cfg;
499 extern const struct iwl_cfg iwl6005_2abg_cfg;
500 extern const struct iwl_cfg iwl6005_2bg_cfg;
501 extern const struct iwl_cfg iwl6005_2agn_sff_cfg;
502 extern const struct iwl_cfg iwl6005_2agn_d_cfg;
503 extern const struct iwl_cfg iwl6005_2agn_mow1_cfg;
504 extern const struct iwl_cfg iwl6005_2agn_mow2_cfg;
505 extern const struct iwl_cfg iwl1030_bgn_cfg;
506 extern const struct iwl_cfg iwl1030_bg_cfg;
507 extern const struct iwl_cfg iwl6030_2agn_cfg;
508 extern const struct iwl_cfg iwl6030_2abg_cfg;
509 extern const struct iwl_cfg iwl6030_2bgn_cfg;
510 extern const struct iwl_cfg iwl6030_2bg_cfg;
511 extern const struct iwl_cfg iwl6000i_2agn_cfg;
512 extern const struct iwl_cfg iwl6000i_2abg_cfg;
513 extern const struct iwl_cfg iwl6000i_2bg_cfg;
514 extern const struct iwl_cfg iwl6000_3agn_cfg;
515 extern const struct iwl_cfg iwl6050_2agn_cfg;
516 extern const struct iwl_cfg iwl6050_2abg_cfg;
517 extern const struct iwl_cfg iwl6150_bgn_cfg;
518 extern const struct iwl_cfg iwl6150_bg_cfg;
519 extern const struct iwl_cfg iwl1000_bgn_cfg;
520 extern const struct iwl_cfg iwl1000_bg_cfg;
521 extern const struct iwl_cfg iwl100_bgn_cfg;
522 extern const struct iwl_cfg iwl100_bg_cfg;
523 extern const struct iwl_cfg iwl130_bgn_cfg;
524 extern const struct iwl_cfg iwl130_bg_cfg;
525 extern const struct iwl_cfg iwl2000_2bgn_cfg;
526 extern const struct iwl_cfg iwl2000_2bgn_d_cfg;
527 extern const struct iwl_cfg iwl2030_2bgn_cfg;
528 extern const struct iwl_cfg iwl6035_2agn_cfg;
529 extern const struct iwl_cfg iwl6035_2agn_sff_cfg;
530 extern const struct iwl_cfg iwl105_bgn_cfg;
531 extern const struct iwl_cfg iwl105_bgn_d_cfg;
532 extern const struct iwl_cfg iwl135_bgn_cfg;
533 #endif /* CONFIG_IWLDVM */
534 #if IS_ENABLED(CONFIG_IWLMVM)
535 extern const struct iwl_cfg iwl7260_2ac_cfg;
536 extern const struct iwl_cfg iwl7260_2ac_cfg_high_temp;
537 extern const struct iwl_cfg iwl7260_2n_cfg;
538 extern const struct iwl_cfg iwl7260_n_cfg;
539 extern const struct iwl_cfg iwl3160_2ac_cfg;
540 extern const struct iwl_cfg iwl3160_2n_cfg;
541 extern const struct iwl_cfg iwl3160_n_cfg;
542 extern const struct iwl_cfg iwl3165_2ac_cfg;
543 extern const struct iwl_cfg iwl3168_2ac_cfg;
544 extern const struct iwl_cfg iwl7265_2ac_cfg;
545 extern const struct iwl_cfg iwl7265_2n_cfg;
546 extern const struct iwl_cfg iwl7265_n_cfg;
547 extern const struct iwl_cfg iwl7265d_2ac_cfg;
548 extern const struct iwl_cfg iwl7265d_2n_cfg;
549 extern const struct iwl_cfg iwl7265d_n_cfg;
550 extern const struct iwl_cfg iwl8260_2n_cfg;
551 extern const struct iwl_cfg iwl8260_2ac_cfg;
552 extern const struct iwl_cfg iwl8265_2ac_cfg;
553 extern const struct iwl_cfg iwl8275_2ac_cfg;
554 extern const struct iwl_cfg iwl4165_2ac_cfg;
555 extern const struct iwl_cfg iwl9160_2ac_cfg;
556 extern const struct iwl_cfg iwl9260_2ac_cfg;
557 extern const struct iwl_cfg iwl9260_killer_2ac_cfg;
558 extern const struct iwl_cfg iwl9270_2ac_cfg;
559 extern const struct iwl_cfg iwl9460_2ac_cfg;
560 extern const struct iwl_cfg iwl9560_2ac_cfg;
561 extern const struct iwl_cfg iwl9460_2ac_cfg_soc;
562 extern const struct iwl_cfg iwl9461_2ac_cfg_soc;
563 extern const struct iwl_cfg iwl9462_2ac_cfg_soc;
564 extern const struct iwl_cfg iwl9560_2ac_cfg_soc;
565 extern const struct iwl_cfg iwl9560_killer_2ac_cfg_soc;
566 extern const struct iwl_cfg iwl9560_killer_s_2ac_cfg_soc;
567 extern const struct iwl_cfg iwl9460_2ac_cfg_shared_clk;
568 extern const struct iwl_cfg iwl9461_2ac_cfg_shared_clk;
569 extern const struct iwl_cfg iwl9462_2ac_cfg_shared_clk;
570 extern const struct iwl_cfg iwl9560_2ac_cfg_shared_clk;
571 extern const struct iwl_cfg iwl9560_killer_2ac_cfg_shared_clk;
572 extern const struct iwl_cfg iwl9560_killer_s_2ac_cfg_shared_clk;
573 extern const struct iwl_cfg iwl22000_2ac_cfg_hr;
574 extern const struct iwl_cfg iwl22000_2ac_cfg_hr_cdb;
575 extern const struct iwl_cfg iwl22000_2ac_cfg_jf;
576 extern const struct iwl_cfg iwl22000_2ax_cfg_hr;
577 extern const struct iwl_cfg iwl22000_2ax_cfg_qnj_hr_a0_f0;
578 extern const struct iwl_cfg iwl22000_2ax_cfg_qnj_hr_b0;
579 extern const struct iwl_cfg iwl22000_2ax_cfg_qnj_jf_b0;
580 extern const struct iwl_cfg iwl22000_2ax_cfg_qnj_hr_a0;
581 extern const struct iwl_cfg iwl22560_2ax_cfg_su_cdb;
582 #endif /* CONFIG_IWLMVM */
583
584 #endif /* __IWL_CONFIG_H__ */
585
