1 /*
2 * This is the Fusion MPT base driver providing common API layer interface
3 * for access to MPT (Message Passing Technology) firmware.
4 *
5 * This code is based on drivers/scsi/mpt3sas/mpt3sas_base.h
6 * Copyright (C) 2012-2014 LSI Corporation
7 * Copyright (C) 2013-2014 Avago Technologies
8 * (mailto: MPT-FusionLinux.pdl@avagotech.com)
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version 2
13 * of the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * NO WARRANTY
21 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
22 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
23 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
24 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
25 * solely responsible for determining the appropriateness of using and
26 * distributing the Program and assumes all risks associated with its
27 * exercise of rights under this Agreement, including but not limited to
28 * the risks and costs of program errors, damage to or loss of data,
29 * programs or equipment, and unavailability or interruption of operations.
30
31 * DISCLAIMER OF LIABILITY
32 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
33 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
34 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
35 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
36 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
37 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
38 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
39
40 * You should have received a copy of the GNU General Public License
41 * along with this program; if not, write to the Free Software
42 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
43 * USA.
44 */
45
46 #ifndef MPT3SAS_BASE_H_INCLUDED
47 #define MPT3SAS_BASE_H_INCLUDED
48
49 #include "mpi/mpi2_type.h"
50 #include "mpi/mpi2.h"
51 #include "mpi/mpi2_ioc.h"
52 #include "mpi/mpi2_cnfg.h"
53 #include "mpi/mpi2_init.h"
54 #include "mpi/mpi2_raid.h"
55 #include "mpi/mpi2_tool.h"
56 #include "mpi/mpi2_sas.h"
57 #include "mpi/mpi2_pci.h"
58 #include "mpi/mpi2_image.h"
59
60 #include <scsi/scsi.h>
61 #include <scsi/scsi_cmnd.h>
62 #include <scsi/scsi_device.h>
63 #include <scsi/scsi_host.h>
64 #include <scsi/scsi_tcq.h>
65 #include <scsi/scsi_transport_sas.h>
66 #include <scsi/scsi_dbg.h>
67 #include <scsi/scsi_eh.h>
68 #include <linux/pci.h>
69 #include <linux/poll.h>
70 #include <linux/irq_poll.h>
71
72 #include "mpt3sas_debug.h"
73 #include "mpt3sas_trigger_diag.h"
74
75 /* driver versioning info */
76 #define MPT3SAS_DRIVER_NAME "mpt3sas"
77 #define MPT3SAS_AUTHOR "Avago Technologies <MPT-FusionLinux.pdl@avagotech.com>"
78 #define MPT3SAS_DESCRIPTION "LSI MPT Fusion SAS 3.0 Device Driver"
79 #define MPT3SAS_DRIVER_VERSION "35.100.00.00"
80 #define MPT3SAS_MAJOR_VERSION 35
81 #define MPT3SAS_MINOR_VERSION 100
82 #define MPT3SAS_BUILD_VERSION 0
83 #define MPT3SAS_RELEASE_VERSION 00
84
85 #define MPT2SAS_DRIVER_NAME "mpt2sas"
86 #define MPT2SAS_DESCRIPTION "LSI MPT Fusion SAS 2.0 Device Driver"
87 #define MPT2SAS_DRIVER_VERSION "20.102.00.00"
88 #define MPT2SAS_MAJOR_VERSION 20
89 #define MPT2SAS_MINOR_VERSION 102
90 #define MPT2SAS_BUILD_VERSION 0
91 #define MPT2SAS_RELEASE_VERSION 00
92
93 /* CoreDump: Default timeout */
94 #define MPT3SAS_DEFAULT_COREDUMP_TIMEOUT_SECONDS (15) /*15 seconds*/
95 #define MPT3SAS_COREDUMP_LOOP_DONE (0xFF)
96
97 /*
98 * Set MPT3SAS_SG_DEPTH value based on user input.
99 */
100 #define MPT_MAX_PHYS_SEGMENTS SG_CHUNK_SIZE
101 #define MPT_MIN_PHYS_SEGMENTS 16
102 #define MPT_KDUMP_MIN_PHYS_SEGMENTS 32
103
104 #define MCPU_MAX_CHAINS_PER_IO 3
105
106 #ifdef CONFIG_SCSI_MPT3SAS_MAX_SGE
107 #define MPT3SAS_SG_DEPTH CONFIG_SCSI_MPT3SAS_MAX_SGE
108 #else
109 #define MPT3SAS_SG_DEPTH MPT_MAX_PHYS_SEGMENTS
110 #endif
111
112 #ifdef CONFIG_SCSI_MPT2SAS_MAX_SGE
113 #define MPT2SAS_SG_DEPTH CONFIG_SCSI_MPT2SAS_MAX_SGE
114 #else
115 #define MPT2SAS_SG_DEPTH MPT_MAX_PHYS_SEGMENTS
116 #endif
117
118 /*
119 * Generic Defines
120 */
121 #define MPT3SAS_SATA_QUEUE_DEPTH 32
122 #define MPT3SAS_SAS_QUEUE_DEPTH 254
123 #define MPT3SAS_RAID_QUEUE_DEPTH 128
124 #define MPT3SAS_KDUMP_SCSI_IO_DEPTH 200
125
126 #define MPT3SAS_RAID_MAX_SECTORS 8192
127 #define MPT3SAS_HOST_PAGE_SIZE_4K 12
128 #define MPT3SAS_NVME_QUEUE_DEPTH 128
129 #define MPT_NAME_LENGTH 32 /* generic length of strings */
130 #define MPT_STRING_LENGTH 64
131 #define MPI_FRAME_START_OFFSET 256
132 #define REPLY_FREE_POOL_SIZE 512 /*(32 maxcredix *4)*(4 times)*/
133
134 #define MPT_MAX_CALLBACKS 32
135
136 #define INTERNAL_CMDS_COUNT 10 /* reserved cmds */
137 /* reserved for issuing internally framed scsi io cmds */
138 #define INTERNAL_SCSIIO_CMDS_COUNT 3
139
140 #define MPI3_HIM_MASK 0xFFFFFFFF /* mask every bit*/
141
142 #define MPT3SAS_INVALID_DEVICE_HANDLE 0xFFFF
143
144 #define MAX_CHAIN_ELEMT_SZ 16
145 #define DEFAULT_NUM_FWCHAIN_ELEMTS 8
146
147 #define IO_UNIT_CONTROL_SHUTDOWN_TIMEOUT 6
148 #define FW_IMG_HDR_READ_TIMEOUT 15
149
150 #define IOC_OPERATIONAL_WAIT_COUNT 10
151
152 /*
153 * NVMe defines
154 */
155 #define NVME_PRP_SIZE 8 /* PRP size */
156 #define NVME_ERROR_RESPONSE_SIZE 16 /* Max NVME Error Response */
157 #define NVME_TASK_ABORT_MIN_TIMEOUT 6
158 #define NVME_TASK_ABORT_MAX_TIMEOUT 60
159 #define NVME_TASK_MNGT_CUSTOM_MASK (0x0010)
160 #define NVME_PRP_PAGE_SIZE 4096 /* Page size */
161
162 struct mpt3sas_nvme_cmd {
163 u8 rsvd[24];
164 __le64 prp1;
165 __le64 prp2;
166 };
167
168 /*
169 * logging format
170 */
171 #define ioc_err(ioc, fmt, ...) \
172 pr_err("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
173 #define ioc_notice(ioc, fmt, ...) \
174 pr_notice("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
175 #define ioc_warn(ioc, fmt, ...) \
176 pr_warn("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
177 #define ioc_info(ioc, fmt, ...) \
178 pr_info("%s: " fmt, (ioc)->name, ##__VA_ARGS__)
179
180 /*
181 * WarpDrive Specific Log codes
182 */
183
184 #define MPT2_WARPDRIVE_LOGENTRY (0x8002)
185 #define MPT2_WARPDRIVE_LC_SSDT (0x41)
186 #define MPT2_WARPDRIVE_LC_SSDLW (0x43)
187 #define MPT2_WARPDRIVE_LC_SSDLF (0x44)
188 #define MPT2_WARPDRIVE_LC_BRMF (0x4D)
189
190 /*
191 * per target private data
192 */
193 #define MPT_TARGET_FLAGS_RAID_COMPONENT 0x01
194 #define MPT_TARGET_FLAGS_VOLUME 0x02
195 #define MPT_TARGET_FLAGS_DELETED 0x04
196 #define MPT_TARGET_FASTPATH_IO 0x08
197 #define MPT_TARGET_FLAGS_PCIE_DEVICE 0x10
198
199 #define SAS2_PCI_DEVICE_B0_REVISION (0x01)
200 #define SAS3_PCI_DEVICE_C0_REVISION (0x02)
201
202 /* Atlas PCIe Switch Management Port */
203 #define MPI26_ATLAS_PCIe_SWITCH_DEVID (0x00B2)
204
205 /*
206 * Intel HBA branding
207 */
208 #define MPT2SAS_INTEL_RMS25JB080_BRANDING \
209 "Intel(R) Integrated RAID Module RMS25JB080"
210 #define MPT2SAS_INTEL_RMS25JB040_BRANDING \
211 "Intel(R) Integrated RAID Module RMS25JB040"
212 #define MPT2SAS_INTEL_RMS25KB080_BRANDING \
213 "Intel(R) Integrated RAID Module RMS25KB080"
214 #define MPT2SAS_INTEL_RMS25KB040_BRANDING \
215 "Intel(R) Integrated RAID Module RMS25KB040"
216 #define MPT2SAS_INTEL_RMS25LB040_BRANDING \
217 "Intel(R) Integrated RAID Module RMS25LB040"
218 #define MPT2SAS_INTEL_RMS25LB080_BRANDING \
219 "Intel(R) Integrated RAID Module RMS25LB080"
220 #define MPT2SAS_INTEL_RMS2LL080_BRANDING \
221 "Intel Integrated RAID Module RMS2LL080"
222 #define MPT2SAS_INTEL_RMS2LL040_BRANDING \
223 "Intel Integrated RAID Module RMS2LL040"
224 #define MPT2SAS_INTEL_RS25GB008_BRANDING \
225 "Intel(R) RAID Controller RS25GB008"
226 #define MPT2SAS_INTEL_SSD910_BRANDING \
227 "Intel(R) SSD 910 Series"
228
229 #define MPT3SAS_INTEL_RMS3JC080_BRANDING \
230 "Intel(R) Integrated RAID Module RMS3JC080"
231 #define MPT3SAS_INTEL_RS3GC008_BRANDING \
232 "Intel(R) RAID Controller RS3GC008"
233 #define MPT3SAS_INTEL_RS3FC044_BRANDING \
234 "Intel(R) RAID Controller RS3FC044"
235 #define MPT3SAS_INTEL_RS3UC080_BRANDING \
236 "Intel(R) RAID Controller RS3UC080"
237
238 /*
239 * Intel HBA SSDIDs
240 */
241 #define MPT2SAS_INTEL_RMS25JB080_SSDID 0x3516
242 #define MPT2SAS_INTEL_RMS25JB040_SSDID 0x3517
243 #define MPT2SAS_INTEL_RMS25KB080_SSDID 0x3518
244 #define MPT2SAS_INTEL_RMS25KB040_SSDID 0x3519
245 #define MPT2SAS_INTEL_RMS25LB040_SSDID 0x351A
246 #define MPT2SAS_INTEL_RMS25LB080_SSDID 0x351B
247 #define MPT2SAS_INTEL_RMS2LL080_SSDID 0x350E
248 #define MPT2SAS_INTEL_RMS2LL040_SSDID 0x350F
249 #define MPT2SAS_INTEL_RS25GB008_SSDID 0x3000
250 #define MPT2SAS_INTEL_SSD910_SSDID 0x3700
251
252 #define MPT3SAS_INTEL_RMS3JC080_SSDID 0x3521
253 #define MPT3SAS_INTEL_RS3GC008_SSDID 0x3522
254 #define MPT3SAS_INTEL_RS3FC044_SSDID 0x3523
255 #define MPT3SAS_INTEL_RS3UC080_SSDID 0x3524
256
257 /*
258 * Dell HBA branding
259 */
260 #define MPT2SAS_DELL_BRANDING_SIZE 32
261
262 #define MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING "Dell 6Gbps SAS HBA"
263 #define MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING "Dell PERC H200 Adapter"
264 #define MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING "Dell PERC H200 Integrated"
265 #define MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING "Dell PERC H200 Modular"
266 #define MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING "Dell PERC H200 Embedded"
267 #define MPT2SAS_DELL_PERC_H200_BRANDING "Dell PERC H200"
268 #define MPT2SAS_DELL_6GBPS_SAS_BRANDING "Dell 6Gbps SAS"
269
270 #define MPT3SAS_DELL_12G_HBA_BRANDING \
271 "Dell 12Gbps HBA"
272
273 /*
274 * Dell HBA SSDIDs
275 */
276 #define MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID 0x1F1C
277 #define MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID 0x1F1D
278 #define MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID 0x1F1E
279 #define MPT2SAS_DELL_PERC_H200_MODULAR_SSDID 0x1F1F
280 #define MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID 0x1F20
281 #define MPT2SAS_DELL_PERC_H200_SSDID 0x1F21
282 #define MPT2SAS_DELL_6GBPS_SAS_SSDID 0x1F22
283
284 #define MPT3SAS_DELL_12G_HBA_SSDID 0x1F46
285
286 /*
287 * Cisco HBA branding
288 */
289 #define MPT3SAS_CISCO_12G_8E_HBA_BRANDING \
290 "Cisco 9300-8E 12G SAS HBA"
291 #define MPT3SAS_CISCO_12G_8I_HBA_BRANDING \
292 "Cisco 9300-8i 12G SAS HBA"
293 #define MPT3SAS_CISCO_12G_AVILA_HBA_BRANDING \
294 "Cisco 12G Modular SAS Pass through Controller"
295 #define MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_BRANDING \
296 "UCS C3X60 12G SAS Pass through Controller"
297 /*
298 * Cisco HBA SSSDIDs
299 */
300 #define MPT3SAS_CISCO_12G_8E_HBA_SSDID 0x14C
301 #define MPT3SAS_CISCO_12G_8I_HBA_SSDID 0x154
302 #define MPT3SAS_CISCO_12G_AVILA_HBA_SSDID 0x155
303 #define MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_SSDID 0x156
304
305 /*
306 * status bits for ioc->diag_buffer_status
307 */
308 #define MPT3_DIAG_BUFFER_IS_REGISTERED (0x01)
309 #define MPT3_DIAG_BUFFER_IS_RELEASED (0x02)
310 #define MPT3_DIAG_BUFFER_IS_DIAG_RESET (0x04)
311 #define MPT3_DIAG_BUFFER_IS_DRIVER_ALLOCATED (0x08)
312 #define MPT3_DIAG_BUFFER_IS_APP_OWNED (0x10)
313
314 /*
315 * HP HBA branding
316 */
317 #define MPT2SAS_HP_3PAR_SSVID 0x1590
318
319 #define MPT2SAS_HP_2_4_INTERNAL_BRANDING \
320 "HP H220 Host Bus Adapter"
321 #define MPT2SAS_HP_2_4_EXTERNAL_BRANDING \
322 "HP H221 Host Bus Adapter"
323 #define MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING \
324 "HP H222 Host Bus Adapter"
325 #define MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING \
326 "HP H220i Host Bus Adapter"
327 #define MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING \
328 "HP H210i Host Bus Adapter"
329
330 /*
331 * HO HBA SSDIDs
332 */
333 #define MPT2SAS_HP_2_4_INTERNAL_SSDID 0x0041
334 #define MPT2SAS_HP_2_4_EXTERNAL_SSDID 0x0042
335 #define MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID 0x0043
336 #define MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID 0x0044
337 #define MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID 0x0046
338
339 /*
340 * Combined Reply Queue constants,
341 * There are twelve Supplemental Reply Post Host Index Registers
342 * and each register is at offset 0x10 bytes from the previous one.
343 */
344 #define MAX_COMBINED_MSIX_VECTORS(gen35) ((gen35 == 1) ? 16 : 8)
345 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G3 12
346 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G35 16
347 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_OFFSET (0x10)
348
349 /* OEM Identifiers */
350 #define MFG10_OEM_ID_INVALID (0x00000000)
351 #define MFG10_OEM_ID_DELL (0x00000001)
352 #define MFG10_OEM_ID_FSC (0x00000002)
353 #define MFG10_OEM_ID_SUN (0x00000003)
354 #define MFG10_OEM_ID_IBM (0x00000004)
355
356 /* GENERIC Flags 0*/
357 #define MFG10_GF0_OCE_DISABLED (0x00000001)
358 #define MFG10_GF0_R1E_DRIVE_COUNT (0x00000002)
359 #define MFG10_GF0_R10_DISPLAY (0x00000004)
360 #define MFG10_GF0_SSD_DATA_SCRUB_DISABLE (0x00000008)
361 #define MFG10_GF0_SINGLE_DRIVE_R0 (0x00000010)
362
363 #define VIRTUAL_IO_FAILED_RETRY (0x32010081)
364
365 /* High IOPs definitions */
366 #define MPT3SAS_DEVICE_HIGH_IOPS_DEPTH 8
367 #define MPT3SAS_HIGH_IOPS_REPLY_QUEUES 8
368 #define MPT3SAS_HIGH_IOPS_BATCH_COUNT 16
369 #define MPT3SAS_GEN35_MAX_MSIX_QUEUES 128
370 #define RDPQ_MAX_INDEX_IN_ONE_CHUNK 16
371
372 /* OEM Specific Flags will come from OEM specific header files */
373 struct Mpi2ManufacturingPage10_t {
374 MPI2_CONFIG_PAGE_HEADER Header; /* 00h */
375 U8 OEMIdentifier; /* 04h */
376 U8 Reserved1; /* 05h */
377 U16 Reserved2; /* 08h */
378 U32 Reserved3; /* 0Ch */
379 U32 GenericFlags0; /* 10h */
380 U32 GenericFlags1; /* 14h */
381 U32 Reserved4; /* 18h */
382 U32 OEMSpecificFlags0; /* 1Ch */
383 U32 OEMSpecificFlags1; /* 20h */
384 U32 Reserved5[18]; /* 24h - 60h*/
385 };
386
387
388 /* Miscellaneous options */
389 struct Mpi2ManufacturingPage11_t {
390 MPI2_CONFIG_PAGE_HEADER Header; /* 00h */
391 __le32 Reserved1; /* 04h */
392 u8 Reserved2; /* 08h */
393 u8 EEDPTagMode; /* 09h */
394 u8 Reserved3; /* 0Ah */
395 u8 Reserved4; /* 0Bh */
396 __le32 Reserved5[8]; /* 0Ch-2Ch */
397 u16 AddlFlags2; /* 2Ch */
398 u8 AddlFlags3; /* 2Eh */
399 u8 Reserved6; /* 2Fh */
400 __le32 Reserved7[7]; /* 30h - 4Bh */
401 u8 NVMeAbortTO; /* 4Ch */
402 u8 NumPerDevEvents; /* 4Dh */
403 u8 HostTraceBufferDecrementSizeKB; /* 4Eh */
404 u8 HostTraceBufferFlags; /* 4Fh */
405 u16 HostTraceBufferMaxSizeKB; /* 50h */
406 u16 HostTraceBufferMinSizeKB; /* 52h */
407 u8 CoreDumpTOSec; /* 54h */
408 u8 Reserved8; /* 55h */
409 u16 Reserved9; /* 56h */
410 __le32 Reserved10; /* 58h */
411 };
412
413 /**
414 * struct MPT3SAS_TARGET - starget private hostdata
415 * @starget: starget object
416 * @sas_address: target sas address
417 * @raid_device: raid_device pointer to access volume data
418 * @handle: device handle
419 * @num_luns: number luns
420 * @flags: MPT_TARGET_FLAGS_XXX flags
421 * @deleted: target flaged for deletion
422 * @tm_busy: target is busy with TM request.
423 * @sas_dev: The sas_device associated with this target
424 * @pcie_dev: The pcie device associated with this target
425 */
426 struct MPT3SAS_TARGET {
427 struct scsi_target *starget;
428 u64 sas_address;
429 struct _raid_device *raid_device;
430 u16 handle;
431 int num_luns;
432 u32 flags;
433 u8 deleted;
434 u8 tm_busy;
435 struct _sas_device *sas_dev;
436 struct _pcie_device *pcie_dev;
437 };
438
439
440 /*
441 * per device private data
442 */
443 #define MPT_DEVICE_FLAGS_INIT 0x01
444
445 #define MFG_PAGE10_HIDE_SSDS_MASK (0x00000003)
446 #define MFG_PAGE10_HIDE_ALL_DISKS (0x00)
447 #define MFG_PAGE10_EXPOSE_ALL_DISKS (0x01)
448 #define MFG_PAGE10_HIDE_IF_VOL_PRESENT (0x02)
449
450 /**
451 * struct MPT3SAS_DEVICE - sdev private hostdata
452 * @sas_target: starget private hostdata
453 * @lun: lun number
454 * @flags: MPT_DEVICE_XXX flags
455 * @configured_lun: lun is configured
456 * @block: device is in SDEV_BLOCK state
457 * @tlr_snoop_check: flag used in determining whether to disable TLR
458 * @eedp_enable: eedp support enable bit
459 * @eedp_type: 0(type_1), 1(type_2), 2(type_3)
460 * @eedp_block_length: block size
461 * @ata_command_pending: SATL passthrough outstanding for device
462 */
463 struct MPT3SAS_DEVICE {
464 struct MPT3SAS_TARGET *sas_target;
465 unsigned int lun;
466 u32 flags;
467 u8 configured_lun;
468 u8 block;
469 u8 tlr_snoop_check;
470 u8 ignore_delay_remove;
471 /* Iopriority Command Handling */
472 u8 ncq_prio_enable;
473 /*
474 * Bug workaround for SATL handling: the mpt2/3sas firmware
475 * doesn't return BUSY or TASK_SET_FULL for subsequent
476 * commands while a SATL pass through is in operation as the
477 * spec requires, it simply does nothing with them until the
478 * pass through completes, causing them possibly to timeout if
479 * the passthrough is a long executing command (like format or
480 * secure erase). This variable allows us to do the right
481 * thing while a SATL command is pending.
482 */
483 unsigned long ata_command_pending;
484
485 };
486
487 #define MPT3_CMD_NOT_USED 0x8000 /* free */
488 #define MPT3_CMD_COMPLETE 0x0001 /* completed */
489 #define MPT3_CMD_PENDING 0x0002 /* pending */
490 #define MPT3_CMD_REPLY_VALID 0x0004 /* reply is valid */
491 #define MPT3_CMD_RESET 0x0008 /* host reset dropped the command */
492
493 /**
494 * struct _internal_cmd - internal commands struct
495 * @mutex: mutex
496 * @done: completion
497 * @reply: reply message pointer
498 * @sense: sense data
499 * @status: MPT3_CMD_XXX status
500 * @smid: system message id
501 */
502 struct _internal_cmd {
503 struct mutex mutex;
504 struct completion done;
505 void *reply;
506 void *sense;
507 u16 status;
508 u16 smid;
509 };
510
511
512
513 /**
514 * struct _sas_device - attached device information
515 * @list: sas device list
516 * @starget: starget object
517 * @sas_address: device sas address
518 * @device_name: retrieved from the SAS IDENTIFY frame.
519 * @handle: device handle
520 * @sas_address_parent: sas address of parent expander or sas host
521 * @enclosure_handle: enclosure handle
522 * @enclosure_logical_id: enclosure logical identifier
523 * @volume_handle: volume handle (valid when hidden raid member)
524 * @volume_wwid: volume unique identifier
525 * @device_info: bitfield provides detailed info about the device
526 * @id: target id
527 * @channel: target channel
528 * @slot: number number
529 * @phy: phy identifier provided in sas device page 0
530 * @responding: used in _scsih_sas_device_mark_responding
531 * @fast_path: fast path feature enable bit
532 * @pfa_led_on: flag for PFA LED status
533 * @pend_sas_rphy_add: flag to check if device is in sas_rphy_add()
534 * addition routine.
535 * @chassis_slot: chassis slot
536 * @is_chassis_slot_valid: chassis slot valid or not
537 */
538 struct _sas_device {
539 struct list_head list;
540 struct scsi_target *starget;
541 u64 sas_address;
542 u64 device_name;
543 u16 handle;
544 u64 sas_address_parent;
545 u16 enclosure_handle;
546 u64 enclosure_logical_id;
547 u16 volume_handle;
548 u64 volume_wwid;
549 u32 device_info;
550 int id;
551 int channel;
552 u16 slot;
553 u8 phy;
554 u8 responding;
555 u8 fast_path;
556 u8 pfa_led_on;
557 u8 pend_sas_rphy_add;
558 u8 enclosure_level;
559 u8 chassis_slot;
560 u8 is_chassis_slot_valid;
561 u8 connector_name[5];
562 struct kref refcount;
563 };
564
sas_device_get(struct _sas_device * s)565 static inline void sas_device_get(struct _sas_device *s)
566 {
567 kref_get(&s->refcount);
568 }
569
sas_device_free(struct kref * r)570 static inline void sas_device_free(struct kref *r)
571 {
572 kfree(container_of(r, struct _sas_device, refcount));
573 }
574
sas_device_put(struct _sas_device * s)575 static inline void sas_device_put(struct _sas_device *s)
576 {
577 kref_put(&s->refcount, sas_device_free);
578 }
579
580 /*
581 * struct _pcie_device - attached PCIe device information
582 * @list: pcie device list
583 * @starget: starget object
584 * @wwid: device WWID
585 * @handle: device handle
586 * @device_info: bitfield provides detailed info about the device
587 * @id: target id
588 * @channel: target channel
589 * @slot: slot number
590 * @port_num: port number
591 * @responding: used in _scsih_pcie_device_mark_responding
592 * @fast_path: fast path feature enable bit
593 * @nvme_mdts: MaximumDataTransferSize from PCIe Device Page 2 for
594 * NVMe device only
595 * @enclosure_handle: enclosure handle
596 * @enclosure_logical_id: enclosure logical identifier
597 * @enclosure_level: The level of device's enclosure from the controller
598 * @connector_name: ASCII value of the Connector's name
599 * @serial_number: pointer of serial number string allocated runtime
600 * @access_status: Device's Access Status
601 * @shutdown_latency: NVMe device's RTD3 Entry Latency
602 * @refcount: reference count for deletion
603 */
604 struct _pcie_device {
605 struct list_head list;
606 struct scsi_target *starget;
607 u64 wwid;
608 u16 handle;
609 u32 device_info;
610 int id;
611 int channel;
612 u16 slot;
613 u8 port_num;
614 u8 responding;
615 u8 fast_path;
616 u32 nvme_mdts;
617 u16 enclosure_handle;
618 u64 enclosure_logical_id;
619 u8 enclosure_level;
620 u8 connector_name[4];
621 u8 *serial_number;
622 u8 reset_timeout;
623 u8 access_status;
624 u16 shutdown_latency;
625 struct kref refcount;
626 };
627 /**
628 * pcie_device_get - Increment the pcie device reference count
629 *
630 * @p: pcie_device object
631 *
632 * When ever this function called it will increment the
633 * reference count of the pcie device for which this function called.
634 *
635 */
pcie_device_get(struct _pcie_device * p)636 static inline void pcie_device_get(struct _pcie_device *p)
637 {
638 kref_get(&p->refcount);
639 }
640
641 /**
642 * pcie_device_free - Release the pcie device object
643 * @r - kref object
644 *
645 * Free's the pcie device object. It will be called when reference count
646 * reaches to zero.
647 */
pcie_device_free(struct kref * r)648 static inline void pcie_device_free(struct kref *r)
649 {
650 kfree(container_of(r, struct _pcie_device, refcount));
651 }
652
653 /**
654 * pcie_device_put - Decrement the pcie device reference count
655 *
656 * @p: pcie_device object
657 *
658 * When ever this function called it will decrement the
659 * reference count of the pcie device for which this function called.
660 *
661 * When refernce count reaches to Zero, this will call pcie_device_free to the
662 * pcie_device object.
663 */
pcie_device_put(struct _pcie_device * p)664 static inline void pcie_device_put(struct _pcie_device *p)
665 {
666 kref_put(&p->refcount, pcie_device_free);
667 }
668 /**
669 * struct _raid_device - raid volume link list
670 * @list: sas device list
671 * @starget: starget object
672 * @sdev: scsi device struct (volumes are single lun)
673 * @wwid: unique identifier for the volume
674 * @handle: device handle
675 * @block_size: Block size of the volume
676 * @id: target id
677 * @channel: target channel
678 * @volume_type: the raid level
679 * @device_info: bitfield provides detailed info about the hidden components
680 * @num_pds: number of hidden raid components
681 * @responding: used in _scsih_raid_device_mark_responding
682 * @percent_complete: resync percent complete
683 * @direct_io_enabled: Whether direct io to PDs are allowed or not
684 * @stripe_exponent: X where 2powX is the stripe sz in blocks
685 * @block_exponent: X where 2powX is the block sz in bytes
686 * @max_lba: Maximum number of LBA in the volume
687 * @stripe_sz: Stripe Size of the volume
688 * @device_info: Device info of the volume member disk
689 * @pd_handle: Array of handles of the physical drives for direct I/O in le16
690 */
691 #define MPT_MAX_WARPDRIVE_PDS 8
692 struct _raid_device {
693 struct list_head list;
694 struct scsi_target *starget;
695 struct scsi_device *sdev;
696 u64 wwid;
697 u16 handle;
698 u16 block_sz;
699 int id;
700 int channel;
701 u8 volume_type;
702 u8 num_pds;
703 u8 responding;
704 u8 percent_complete;
705 u8 direct_io_enabled;
706 u8 stripe_exponent;
707 u8 block_exponent;
708 u64 max_lba;
709 u32 stripe_sz;
710 u32 device_info;
711 u16 pd_handle[MPT_MAX_WARPDRIVE_PDS];
712 };
713
714 /**
715 * struct _boot_device - boot device info
716 *
717 * @channel: sas, raid, or pcie channel
718 * @device: holds pointer for struct _sas_device, struct _raid_device or
719 * struct _pcie_device
720 */
721 struct _boot_device {
722 int channel;
723 void *device;
724 };
725
726 /**
727 * struct _sas_port - wide/narrow sas port information
728 * @port_list: list of ports belonging to expander
729 * @num_phys: number of phys belonging to this port
730 * @remote_identify: attached device identification
731 * @rphy: sas transport rphy object
732 * @port: sas transport wide/narrow port object
733 * @phy_list: _sas_phy list objects belonging to this port
734 */
735 struct _sas_port {
736 struct list_head port_list;
737 u8 num_phys;
738 struct sas_identify remote_identify;
739 struct sas_rphy *rphy;
740 struct sas_port *port;
741 struct list_head phy_list;
742 };
743
744 /**
745 * struct _sas_phy - phy information
746 * @port_siblings: list of phys belonging to a port
747 * @identify: phy identification
748 * @remote_identify: attached device identification
749 * @phy: sas transport phy object
750 * @phy_id: unique phy id
751 * @handle: device handle for this phy
752 * @attached_handle: device handle for attached device
753 * @phy_belongs_to_port: port has been created for this phy
754 */
755 struct _sas_phy {
756 struct list_head port_siblings;
757 struct sas_identify identify;
758 struct sas_identify remote_identify;
759 struct sas_phy *phy;
760 u8 phy_id;
761 u16 handle;
762 u16 attached_handle;
763 u8 phy_belongs_to_port;
764 };
765
766 /**
767 * struct _sas_node - sas_host/expander information
768 * @list: list of expanders
769 * @parent_dev: parent device class
770 * @num_phys: number phys belonging to this sas_host/expander
771 * @sas_address: sas address of this sas_host/expander
772 * @handle: handle for this sas_host/expander
773 * @sas_address_parent: sas address of parent expander or sas host
774 * @enclosure_handle: handle for this a member of an enclosure
775 * @device_info: bitwise defining capabilities of this sas_host/expander
776 * @responding: used in _scsih_expander_device_mark_responding
777 * @phy: a list of phys that make up this sas_host/expander
778 * @sas_port_list: list of ports attached to this sas_host/expander
779 */
780 struct _sas_node {
781 struct list_head list;
782 struct device *parent_dev;
783 u8 num_phys;
784 u64 sas_address;
785 u16 handle;
786 u64 sas_address_parent;
787 u16 enclosure_handle;
788 u64 enclosure_logical_id;
789 u8 responding;
790 struct _sas_phy *phy;
791 struct list_head sas_port_list;
792 };
793
794
795 /**
796 * struct _enclosure_node - enclosure information
797 * @list: list of enclosures
798 * @pg0: enclosure pg0;
799 */
800 struct _enclosure_node {
801 struct list_head list;
802 Mpi2SasEnclosurePage0_t pg0;
803 };
804
805 /**
806 * enum reset_type - reset state
807 * @FORCE_BIG_HAMMER: issue diagnostic reset
808 * @SOFT_RESET: issue message_unit_reset, if fails to to big hammer
809 */
810 enum reset_type {
811 FORCE_BIG_HAMMER,
812 SOFT_RESET,
813 };
814
815 /**
816 * struct pcie_sg_list - PCIe SGL buffer (contiguous per I/O)
817 * @pcie_sgl: PCIe native SGL for NVMe devices
818 * @pcie_sgl_dma: physical address
819 */
820 struct pcie_sg_list {
821 void *pcie_sgl;
822 dma_addr_t pcie_sgl_dma;
823 };
824
825 /**
826 * struct chain_tracker - firmware chain tracker
827 * @chain_buffer: chain buffer
828 * @chain_buffer_dma: physical address
829 * @tracker_list: list of free request (ioc->free_chain_list)
830 */
831 struct chain_tracker {
832 void *chain_buffer;
833 dma_addr_t chain_buffer_dma;
834 };
835
836 struct chain_lookup {
837 struct chain_tracker *chains_per_smid;
838 atomic_t chain_offset;
839 };
840
841 /**
842 * struct scsiio_tracker - scsi mf request tracker
843 * @smid: system message id
844 * @cb_idx: callback index
845 * @direct_io: To indicate whether I/O is direct (WARPDRIVE)
846 * @chain_list: list of associated firmware chain tracker
847 * @msix_io: IO's msix
848 */
849 struct scsiio_tracker {
850 u16 smid;
851 struct scsi_cmnd *scmd;
852 u8 cb_idx;
853 u8 direct_io;
854 struct pcie_sg_list pcie_sg_list;
855 struct list_head chain_list;
856 u16 msix_io;
857 };
858
859 /**
860 * struct request_tracker - firmware request tracker
861 * @smid: system message id
862 * @cb_idx: callback index
863 * @tracker_list: list of free request (ioc->free_list)
864 */
865 struct request_tracker {
866 u16 smid;
867 u8 cb_idx;
868 struct list_head tracker_list;
869 };
870
871 /**
872 * struct _tr_list - target reset list
873 * @handle: device handle
874 * @state: state machine
875 */
876 struct _tr_list {
877 struct list_head list;
878 u16 handle;
879 u16 state;
880 };
881
882 /**
883 * struct _sc_list - delayed SAS_IO_UNIT_CONTROL message list
884 * @handle: device handle
885 */
886 struct _sc_list {
887 struct list_head list;
888 u16 handle;
889 };
890
891 /**
892 * struct _event_ack_list - delayed event acknowledgment list
893 * @Event: Event ID
894 * @EventContext: used to track the event uniquely
895 */
896 struct _event_ack_list {
897 struct list_head list;
898 U16 Event;
899 U32 EventContext;
900 };
901
902 /**
903 * struct adapter_reply_queue - the reply queue struct
904 * @ioc: per adapter object
905 * @msix_index: msix index into vector table
906 * @vector: irq vector
907 * @reply_post_host_index: head index in the pool where FW completes IO
908 * @reply_post_free: reply post base virt address
909 * @name: the name registered to request_irq()
910 * @busy: isr is actively processing replies on another cpu
911 * @os_irq: irq number
912 * @irqpoll: irq_poll object
913 * @irq_poll_scheduled: Tells whether irq poll is scheduled or not
914 * @list: this list
915 */
916 struct adapter_reply_queue {
917 struct MPT3SAS_ADAPTER *ioc;
918 u8 msix_index;
919 u32 reply_post_host_index;
920 Mpi2ReplyDescriptorsUnion_t *reply_post_free;
921 char name[MPT_NAME_LENGTH];
922 atomic_t busy;
923 u32 os_irq;
924 struct irq_poll irqpoll;
925 bool irq_poll_scheduled;
926 bool irq_line_enable;
927 struct list_head list;
928 };
929
930 typedef void (*MPT_ADD_SGE)(void *paddr, u32 flags_length, dma_addr_t dma_addr);
931
932 /* SAS3.0 support */
933 typedef int (*MPT_BUILD_SG_SCMD)(struct MPT3SAS_ADAPTER *ioc,
934 struct scsi_cmnd *scmd, u16 smid, struct _pcie_device *pcie_device);
935 typedef void (*MPT_BUILD_SG)(struct MPT3SAS_ADAPTER *ioc, void *psge,
936 dma_addr_t data_out_dma, size_t data_out_sz,
937 dma_addr_t data_in_dma, size_t data_in_sz);
938 typedef void (*MPT_BUILD_ZERO_LEN_SGE)(struct MPT3SAS_ADAPTER *ioc,
939 void *paddr);
940
941 /* SAS3.5 support */
942 typedef void (*NVME_BUILD_PRP)(struct MPT3SAS_ADAPTER *ioc, u16 smid,
943 Mpi26NVMeEncapsulatedRequest_t *nvme_encap_request,
944 dma_addr_t data_out_dma, size_t data_out_sz, dma_addr_t data_in_dma,
945 size_t data_in_sz);
946
947 /* To support atomic and non atomic descriptors*/
948 typedef void (*PUT_SMID_IO_FP_HIP) (struct MPT3SAS_ADAPTER *ioc, u16 smid,
949 u16 funcdep);
950 typedef void (*PUT_SMID_DEFAULT) (struct MPT3SAS_ADAPTER *ioc, u16 smid);
951 typedef u32 (*BASE_READ_REG) (const volatile void __iomem *addr);
952 /*
953 * To get high iops reply queue's msix index when high iops mode is enabled
954 * else get the msix index of general reply queues.
955 */
956 typedef u8 (*GET_MSIX_INDEX) (struct MPT3SAS_ADAPTER *ioc,
957 struct scsi_cmnd *scmd);
958
959 /* IOC Facts and Port Facts converted from little endian to cpu */
960 union mpi3_version_union {
961 MPI2_VERSION_STRUCT Struct;
962 u32 Word;
963 };
964
965 struct mpt3sas_facts {
966 u16 MsgVersion;
967 u16 HeaderVersion;
968 u8 IOCNumber;
969 u8 VP_ID;
970 u8 VF_ID;
971 u16 IOCExceptions;
972 u16 IOCStatus;
973 u32 IOCLogInfo;
974 u8 MaxChainDepth;
975 u8 WhoInit;
976 u8 NumberOfPorts;
977 u8 MaxMSIxVectors;
978 u16 RequestCredit;
979 u16 ProductID;
980 u32 IOCCapabilities;
981 union mpi3_version_union FWVersion;
982 u16 IOCRequestFrameSize;
983 u16 IOCMaxChainSegmentSize;
984 u16 MaxInitiators;
985 u16 MaxTargets;
986 u16 MaxSasExpanders;
987 u16 MaxEnclosures;
988 u16 ProtocolFlags;
989 u16 HighPriorityCredit;
990 u16 MaxReplyDescriptorPostQueueDepth;
991 u8 ReplyFrameSize;
992 u8 MaxVolumes;
993 u16 MaxDevHandle;
994 u16 MaxPersistentEntries;
995 u16 MinDevHandle;
996 u8 CurrentHostPageSize;
997 };
998
999 struct mpt3sas_port_facts {
1000 u8 PortNumber;
1001 u8 VP_ID;
1002 u8 VF_ID;
1003 u8 PortType;
1004 u16 MaxPostedCmdBuffers;
1005 };
1006
1007 struct reply_post_struct {
1008 Mpi2ReplyDescriptorsUnion_t *reply_post_free;
1009 dma_addr_t reply_post_free_dma;
1010 };
1011
1012 typedef void (*MPT3SAS_FLUSH_RUNNING_CMDS)(struct MPT3SAS_ADAPTER *ioc);
1013 /**
1014 * struct MPT3SAS_ADAPTER - per adapter struct
1015 * @list: ioc_list
1016 * @shost: shost object
1017 * @id: unique adapter id
1018 * @cpu_count: number online cpus
1019 * @name: generic ioc string
1020 * @tmp_string: tmp string used for logging
1021 * @pdev: pci pdev object
1022 * @pio_chip: physical io register space
1023 * @chip: memory mapped register space
1024 * @chip_phys: physical addrss prior to mapping
1025 * @logging_level: see mpt3sas_debug.h
1026 * @fwfault_debug: debuging FW timeouts
1027 * @ir_firmware: IR firmware present
1028 * @bars: bitmask of BAR's that must be configured
1029 * @mask_interrupts: ignore interrupt
1030 * @pci_access_mutex: Mutex to synchronize ioctl, sysfs show path and
1031 * pci resource handling
1032 * @fault_reset_work_q_name: fw fault work queue
1033 * @fault_reset_work_q: ""
1034 * @fault_reset_work: ""
1035 * @firmware_event_name: fw event work queue
1036 * @firmware_event_thread: ""
1037 * @fw_event_lock:
1038 * @fw_event_list: list of fw events
1039 * @current_evet: current processing firmware event
1040 * @fw_event_cleanup: set to one while cleaning up the fw events
1041 * @aen_event_read_flag: event log was read
1042 * @broadcast_aen_busy: broadcast aen waiting to be serviced
1043 * @shost_recovery: host reset in progress
1044 * @ioc_reset_in_progress_lock:
1045 * @ioc_link_reset_in_progress: phy/hard reset in progress
1046 * @ignore_loginfos: ignore loginfos during task management
1047 * @remove_host: flag for when driver unloads, to avoid sending dev resets
1048 * @pci_error_recovery: flag to prevent ioc access until slot reset completes
1049 * @wait_for_discovery_to_complete: flag set at driver load time when
1050 * waiting on reporting devices
1051 * @is_driver_loading: flag set at driver load time
1052 * @port_enable_failed: flag set when port enable has failed
1053 * @start_scan: flag set from scan_start callback, cleared from _mpt3sas_fw_work
1054 * @start_scan_failed: means port enable failed, return's the ioc_status
1055 * @msix_enable: flag indicating msix is enabled
1056 * @msix_vector_count: number msix vectors
1057 * @cpu_msix_table: table for mapping cpus to msix index
1058 * @cpu_msix_table_sz: table size
1059 * @total_io_cnt: Gives total IO count, used to load balance the interrupts
1060 * @ioc_coredump_loop: will have non-zero value when FW is in CoreDump state
1061 * @high_iops_outstanding: used to load balance the interrupts
1062 * within high iops reply queues
1063 * @msix_load_balance: Enables load balancing of interrupts across
1064 * the multiple MSIXs
1065 * @schedule_dead_ioc_flush_running_cmds: callback to flush pending commands
1066 * @thresh_hold: Max number of reply descriptors processed
1067 * before updating Host Index
1068 * @drv_support_bitmap: driver's supported feature bit map
1069 * @use_32bit_dma: Flag to use 32 bit consistent dma mask
1070 * @scsi_io_cb_idx: shost generated commands
1071 * @tm_cb_idx: task management commands
1072 * @scsih_cb_idx: scsih internal commands
1073 * @transport_cb_idx: transport internal commands
1074 * @ctl_cb_idx: clt internal commands
1075 * @base_cb_idx: base internal commands
1076 * @config_cb_idx: base internal commands
1077 * @tm_tr_cb_idx : device removal target reset handshake
1078 * @tm_tr_volume_cb_idx : volume removal target reset
1079 * @base_cmds:
1080 * @transport_cmds:
1081 * @scsih_cmds:
1082 * @tm_cmds:
1083 * @ctl_cmds:
1084 * @config_cmds:
1085 * @base_add_sg_single: handler for either 32/64 bit sgl's
1086 * @event_type: bits indicating which events to log
1087 * @event_context: unique id for each logged event
1088 * @event_log: event log pointer
1089 * @event_masks: events that are masked
1090 * @max_shutdown_latency: timeout value for NVMe shutdown operation,
1091 * which is equal that NVMe drive's RTD3 Entry Latency
1092 * which has reported maximum RTD3 Entry Latency value
1093 * among attached NVMe drives.
1094 * @facts: static facts data
1095 * @prev_fw_facts: previous fw facts data
1096 * @pfacts: static port facts data
1097 * @manu_pg0: static manufacturing page 0
1098 * @manu_pg10: static manufacturing page 10
1099 * @manu_pg11: static manufacturing page 11
1100 * @bios_pg2: static bios page 2
1101 * @bios_pg3: static bios page 3
1102 * @ioc_pg8: static ioc page 8
1103 * @iounit_pg0: static iounit page 0
1104 * @iounit_pg1: static iounit page 1
1105 * @iounit_pg8: static iounit page 8
1106 * @sas_hba: sas host object
1107 * @sas_expander_list: expander object list
1108 * @enclosure_list: enclosure object list
1109 * @sas_node_lock:
1110 * @sas_device_list: sas device object list
1111 * @sas_device_init_list: sas device object list (used only at init time)
1112 * @sas_device_lock:
1113 * @pcie_device_list: pcie device object list
1114 * @pcie_device_init_list: pcie device object list (used only at init time)
1115 * @pcie_device_lock:
1116 * @io_missing_delay: time for IO completed by fw when PDR enabled
1117 * @device_missing_delay: time for device missing by fw when PDR enabled
1118 * @sas_id : used for setting volume target IDs
1119 * @pcie_target_id: used for setting pcie target IDs
1120 * @blocking_handles: bitmask used to identify which devices need blocking
1121 * @pd_handles : bitmask for PD handles
1122 * @pd_handles_sz : size of pd_handle bitmask
1123 * @config_page_sz: config page size
1124 * @config_page: reserve memory for config page payload
1125 * @config_page_dma:
1126 * @hba_queue_depth: hba request queue depth
1127 * @sge_size: sg element size for either 32/64 bit
1128 * @scsiio_depth: SCSI_IO queue depth
1129 * @request_sz: per request frame size
1130 * @request: pool of request frames
1131 * @request_dma:
1132 * @request_dma_sz:
1133 * @scsi_lookup: firmware request tracker list
1134 * @scsi_lookup_lock:
1135 * @free_list: free list of request
1136 * @pending_io_count:
1137 * @reset_wq:
1138 * @chain: pool of chains
1139 * @chain_dma:
1140 * @max_sges_in_main_message: number sg elements in main message
1141 * @max_sges_in_chain_message: number sg elements per chain
1142 * @chains_needed_per_io: max chains per io
1143 * @chain_depth: total chains allocated
1144 * @chain_segment_sz: gives the max number of
1145 * SGEs accommodate on single chain buffer
1146 * @hi_priority_smid:
1147 * @hi_priority:
1148 * @hi_priority_dma:
1149 * @hi_priority_depth:
1150 * @hpr_lookup:
1151 * @hpr_free_list:
1152 * @internal_smid:
1153 * @internal:
1154 * @internal_dma:
1155 * @internal_depth:
1156 * @internal_lookup:
1157 * @internal_free_list:
1158 * @sense: pool of sense
1159 * @sense_dma:
1160 * @sense_dma_pool:
1161 * @reply_depth: hba reply queue depth:
1162 * @reply_sz: per reply frame size:
1163 * @reply: pool of replys:
1164 * @reply_dma:
1165 * @reply_dma_pool:
1166 * @reply_free_queue_depth: reply free depth
1167 * @reply_free: pool for reply free queue (32 bit addr)
1168 * @reply_free_dma:
1169 * @reply_free_dma_pool:
1170 * @reply_free_host_index: tail index in pool to insert free replys
1171 * @reply_post_queue_depth: reply post queue depth
1172 * @reply_post_struct: struct for reply_post_free physical & virt address
1173 * @rdpq_array_capable: FW supports multiple reply queue addresses in ioc_init
1174 * @rdpq_array_enable: rdpq_array support is enabled in the driver
1175 * @rdpq_array_enable_assigned: this ensures that rdpq_array_enable flag
1176 * is assigned only ones
1177 * @reply_queue_count: number of reply queue's
1178 * @reply_queue_list: link list contaning the reply queue info
1179 * @msix96_vector: 96 MSI-X vector support
1180 * @replyPostRegisterIndex: index of next position in Reply Desc Post Queue
1181 * @delayed_tr_list: target reset link list
1182 * @delayed_tr_volume_list: volume target reset link list
1183 * @delayed_sc_list:
1184 * @delayed_event_ack_list:
1185 * @temp_sensors_count: flag to carry the number of temperature sensors
1186 * @pci_access_mutex: Mutex to synchronize ioctl,sysfs show path and
1187 * pci resource handling. PCI resource freeing will lead to free
1188 * vital hardware/memory resource, which might be in use by cli/sysfs
1189 * path functions resulting in Null pointer reference followed by kernel
1190 * crash. To avoid the above race condition we use mutex syncrhonization
1191 * which ensures the syncrhonization between cli/sysfs_show path.
1192 * @atomic_desc_capable: Atomic Request Descriptor support.
1193 * @GET_MSIX_INDEX: Get the msix index of high iops queues.
1194 */
1195 struct MPT3SAS_ADAPTER {
1196 struct list_head list;
1197 struct Scsi_Host *shost;
1198 u8 id;
1199 int cpu_count;
1200 char name[MPT_NAME_LENGTH];
1201 char driver_name[MPT_NAME_LENGTH - 8];
1202 char tmp_string[MPT_STRING_LENGTH];
1203 struct pci_dev *pdev;
1204 Mpi2SystemInterfaceRegs_t __iomem *chip;
1205 phys_addr_t chip_phys;
1206 int logging_level;
1207 int fwfault_debug;
1208 u8 ir_firmware;
1209 int bars;
1210 u8 mask_interrupts;
1211
1212 /* fw fault handler */
1213 char fault_reset_work_q_name[20];
1214 struct workqueue_struct *fault_reset_work_q;
1215 struct delayed_work fault_reset_work;
1216
1217 /* fw event handler */
1218 char firmware_event_name[20];
1219 struct workqueue_struct *firmware_event_thread;
1220 spinlock_t fw_event_lock;
1221 struct list_head fw_event_list;
1222 struct fw_event_work *current_event;
1223 u8 fw_events_cleanup;
1224
1225 /* misc flags */
1226 int aen_event_read_flag;
1227 u8 broadcast_aen_busy;
1228 u16 broadcast_aen_pending;
1229 u8 shost_recovery;
1230 u8 got_task_abort_from_ioctl;
1231
1232 struct mutex reset_in_progress_mutex;
1233 spinlock_t ioc_reset_in_progress_lock;
1234 u8 ioc_link_reset_in_progress;
1235
1236 u8 ignore_loginfos;
1237 u8 remove_host;
1238 u8 pci_error_recovery;
1239 u8 wait_for_discovery_to_complete;
1240 u8 is_driver_loading;
1241 u8 port_enable_failed;
1242 u8 start_scan;
1243 u16 start_scan_failed;
1244
1245 u8 msix_enable;
1246 u16 msix_vector_count;
1247 u8 *cpu_msix_table;
1248 u16 cpu_msix_table_sz;
1249 resource_size_t __iomem **reply_post_host_index;
1250 u32 ioc_reset_count;
1251 MPT3SAS_FLUSH_RUNNING_CMDS schedule_dead_ioc_flush_running_cmds;
1252 u32 non_operational_loop;
1253 u8 ioc_coredump_loop;
1254 atomic64_t total_io_cnt;
1255 atomic64_t high_iops_outstanding;
1256 bool msix_load_balance;
1257 u16 thresh_hold;
1258 u8 high_iops_queues;
1259 u32 drv_support_bitmap;
1260 bool enable_sdev_max_qd;
1261 bool use_32bit_dma;
1262
1263 /* internal commands, callback index */
1264 u8 scsi_io_cb_idx;
1265 u8 tm_cb_idx;
1266 u8 transport_cb_idx;
1267 u8 scsih_cb_idx;
1268 u8 ctl_cb_idx;
1269 u8 base_cb_idx;
1270 u8 port_enable_cb_idx;
1271 u8 config_cb_idx;
1272 u8 tm_tr_cb_idx;
1273 u8 tm_tr_volume_cb_idx;
1274 u8 tm_sas_control_cb_idx;
1275 struct _internal_cmd base_cmds;
1276 struct _internal_cmd port_enable_cmds;
1277 struct _internal_cmd transport_cmds;
1278 struct _internal_cmd scsih_cmds;
1279 struct _internal_cmd tm_cmds;
1280 struct _internal_cmd ctl_cmds;
1281 struct _internal_cmd config_cmds;
1282
1283 MPT_ADD_SGE base_add_sg_single;
1284
1285 /* function ptr for either IEEE or MPI sg elements */
1286 MPT_BUILD_SG_SCMD build_sg_scmd;
1287 MPT_BUILD_SG build_sg;
1288 MPT_BUILD_ZERO_LEN_SGE build_zero_len_sge;
1289 u16 sge_size_ieee;
1290 u16 hba_mpi_version_belonged;
1291
1292 /* function ptr for MPI sg elements only */
1293 MPT_BUILD_SG build_sg_mpi;
1294 MPT_BUILD_ZERO_LEN_SGE build_zero_len_sge_mpi;
1295
1296 /* function ptr for NVMe PRP elements only */
1297 NVME_BUILD_PRP build_nvme_prp;
1298
1299 /* event log */
1300 u32 event_type[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
1301 u32 event_context;
1302 void *event_log;
1303 u32 event_masks[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];
1304
1305 u8 tm_custom_handling;
1306 u8 nvme_abort_timeout;
1307 u16 max_shutdown_latency;
1308
1309 /* static config pages */
1310 struct mpt3sas_facts facts;
1311 struct mpt3sas_facts prev_fw_facts;
1312 struct mpt3sas_port_facts *pfacts;
1313 Mpi2ManufacturingPage0_t manu_pg0;
1314 struct Mpi2ManufacturingPage10_t manu_pg10;
1315 struct Mpi2ManufacturingPage11_t manu_pg11;
1316 Mpi2BiosPage2_t bios_pg2;
1317 Mpi2BiosPage3_t bios_pg3;
1318 Mpi2IOCPage8_t ioc_pg8;
1319 Mpi2IOUnitPage0_t iounit_pg0;
1320 Mpi2IOUnitPage1_t iounit_pg1;
1321 Mpi2IOUnitPage8_t iounit_pg8;
1322 Mpi2IOCPage1_t ioc_pg1_copy;
1323
1324 struct _boot_device req_boot_device;
1325 struct _boot_device req_alt_boot_device;
1326 struct _boot_device current_boot_device;
1327
1328 /* sas hba, expander, and device list */
1329 struct _sas_node sas_hba;
1330 struct list_head sas_expander_list;
1331 struct list_head enclosure_list;
1332 spinlock_t sas_node_lock;
1333 struct list_head sas_device_list;
1334 struct list_head sas_device_init_list;
1335 spinlock_t sas_device_lock;
1336 struct list_head pcie_device_list;
1337 struct list_head pcie_device_init_list;
1338 spinlock_t pcie_device_lock;
1339
1340 struct list_head raid_device_list;
1341 spinlock_t raid_device_lock;
1342 u8 io_missing_delay;
1343 u16 device_missing_delay;
1344 int sas_id;
1345 int pcie_target_id;
1346
1347 void *blocking_handles;
1348 void *pd_handles;
1349 u16 pd_handles_sz;
1350
1351 void *pend_os_device_add;
1352 u16 pend_os_device_add_sz;
1353
1354 /* config page */
1355 u16 config_page_sz;
1356 void *config_page;
1357 dma_addr_t config_page_dma;
1358 void *config_vaddr;
1359
1360 /* scsiio request */
1361 u16 hba_queue_depth;
1362 u16 sge_size;
1363 u16 scsiio_depth;
1364 u16 request_sz;
1365 u8 *request;
1366 dma_addr_t request_dma;
1367 u32 request_dma_sz;
1368 struct pcie_sg_list *pcie_sg_lookup;
1369 spinlock_t scsi_lookup_lock;
1370 int pending_io_count;
1371 wait_queue_head_t reset_wq;
1372
1373 /* PCIe SGL */
1374 struct dma_pool *pcie_sgl_dma_pool;
1375 /* Host Page Size */
1376 u32 page_size;
1377
1378 /* chain */
1379 struct chain_lookup *chain_lookup;
1380 struct list_head free_chain_list;
1381 struct dma_pool *chain_dma_pool;
1382 ulong chain_pages;
1383 u16 max_sges_in_main_message;
1384 u16 max_sges_in_chain_message;
1385 u16 chains_needed_per_io;
1386 u32 chain_depth;
1387 u16 chain_segment_sz;
1388 u16 chains_per_prp_buffer;
1389
1390 /* hi-priority queue */
1391 u16 hi_priority_smid;
1392 u8 *hi_priority;
1393 dma_addr_t hi_priority_dma;
1394 u16 hi_priority_depth;
1395 struct request_tracker *hpr_lookup;
1396 struct list_head hpr_free_list;
1397
1398 /* internal queue */
1399 u16 internal_smid;
1400 u8 *internal;
1401 dma_addr_t internal_dma;
1402 u16 internal_depth;
1403 struct request_tracker *internal_lookup;
1404 struct list_head internal_free_list;
1405
1406 /* sense */
1407 u8 *sense;
1408 dma_addr_t sense_dma;
1409 struct dma_pool *sense_dma_pool;
1410
1411 /* reply */
1412 u16 reply_sz;
1413 u8 *reply;
1414 dma_addr_t reply_dma;
1415 u32 reply_dma_max_address;
1416 u32 reply_dma_min_address;
1417 struct dma_pool *reply_dma_pool;
1418
1419 /* reply free queue */
1420 u16 reply_free_queue_depth;
1421 __le32 *reply_free;
1422 dma_addr_t reply_free_dma;
1423 struct dma_pool *reply_free_dma_pool;
1424 u32 reply_free_host_index;
1425
1426 /* reply post queue */
1427 u16 reply_post_queue_depth;
1428 struct reply_post_struct *reply_post;
1429 u8 rdpq_array_capable;
1430 u8 rdpq_array_enable;
1431 u8 rdpq_array_enable_assigned;
1432 struct dma_pool *reply_post_free_dma_pool;
1433 struct dma_pool *reply_post_free_array_dma_pool;
1434 Mpi2IOCInitRDPQArrayEntry *reply_post_free_array;
1435 dma_addr_t reply_post_free_array_dma;
1436 u8 reply_queue_count;
1437 struct list_head reply_queue_list;
1438
1439 u8 combined_reply_queue;
1440 u8 combined_reply_index_count;
1441 u8 smp_affinity_enable;
1442 /* reply post register index */
1443 resource_size_t **replyPostRegisterIndex;
1444
1445 struct list_head delayed_tr_list;
1446 struct list_head delayed_tr_volume_list;
1447 struct list_head delayed_sc_list;
1448 struct list_head delayed_event_ack_list;
1449 u8 temp_sensors_count;
1450 struct mutex pci_access_mutex;
1451
1452 /* diag buffer support */
1453 u8 *diag_buffer[MPI2_DIAG_BUF_TYPE_COUNT];
1454 u32 diag_buffer_sz[MPI2_DIAG_BUF_TYPE_COUNT];
1455 dma_addr_t diag_buffer_dma[MPI2_DIAG_BUF_TYPE_COUNT];
1456 u8 diag_buffer_status[MPI2_DIAG_BUF_TYPE_COUNT];
1457 u32 unique_id[MPI2_DIAG_BUF_TYPE_COUNT];
1458 u32 product_specific[MPI2_DIAG_BUF_TYPE_COUNT][23];
1459 u32 diagnostic_flags[MPI2_DIAG_BUF_TYPE_COUNT];
1460 u32 ring_buffer_offset;
1461 u32 ring_buffer_sz;
1462 u8 is_warpdrive;
1463 u8 is_mcpu_endpoint;
1464 u8 hide_ir_msg;
1465 u8 mfg_pg10_hide_flag;
1466 u8 hide_drives;
1467 spinlock_t diag_trigger_lock;
1468 u8 diag_trigger_active;
1469 u8 atomic_desc_capable;
1470 BASE_READ_REG base_readl;
1471 struct SL_WH_MASTER_TRIGGER_T diag_trigger_master;
1472 struct SL_WH_EVENT_TRIGGERS_T diag_trigger_event;
1473 struct SL_WH_SCSI_TRIGGERS_T diag_trigger_scsi;
1474 struct SL_WH_MPI_TRIGGERS_T diag_trigger_mpi;
1475 void *device_remove_in_progress;
1476 u16 device_remove_in_progress_sz;
1477 u8 is_gen35_ioc;
1478 u8 is_aero_ioc;
1479 struct dentry *debugfs_root;
1480 struct dentry *ioc_dump;
1481 PUT_SMID_IO_FP_HIP put_smid_scsi_io;
1482 PUT_SMID_IO_FP_HIP put_smid_fast_path;
1483 PUT_SMID_IO_FP_HIP put_smid_hi_priority;
1484 PUT_SMID_DEFAULT put_smid_default;
1485 GET_MSIX_INDEX get_msix_index_for_smlio;
1486 };
1487
1488 struct mpt3sas_debugfs_buffer {
1489 void *buf;
1490 u32 len;
1491 };
1492
1493 #define MPT_DRV_SUPPORT_BITMAP_MEMMOVE 0x00000001
1494
1495 typedef u8 (*MPT_CALLBACK)(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1496 u32 reply);
1497
1498
1499 /* base shared API */
1500 extern struct list_head mpt3sas_ioc_list;
1501 extern char driver_name[MPT_NAME_LENGTH];
1502 /* spinlock on list operations over IOCs
1503 * Case: when multiple warpdrive cards(IOCs) are in use
1504 * Each IOC will added to the ioc list structure on initialization.
1505 * Watchdog threads run at regular intervals to check IOC for any
1506 * fault conditions which will trigger the dead_ioc thread to
1507 * deallocate pci resource, resulting deleting the IOC netry from list,
1508 * this deletion need to protected by spinlock to enusre that
1509 * ioc removal is syncrhonized, if not synchronized it might lead to
1510 * list_del corruption as the ioc list is traversed in cli path.
1511 */
1512 extern spinlock_t gioc_lock;
1513
1514 void mpt3sas_base_start_watchdog(struct MPT3SAS_ADAPTER *ioc);
1515 void mpt3sas_base_stop_watchdog(struct MPT3SAS_ADAPTER *ioc);
1516
1517 int mpt3sas_base_attach(struct MPT3SAS_ADAPTER *ioc);
1518 void mpt3sas_base_detach(struct MPT3SAS_ADAPTER *ioc);
1519 int mpt3sas_base_map_resources(struct MPT3SAS_ADAPTER *ioc);
1520 void mpt3sas_base_free_resources(struct MPT3SAS_ADAPTER *ioc);
1521 void mpt3sas_free_enclosure_list(struct MPT3SAS_ADAPTER *ioc);
1522 int mpt3sas_base_hard_reset_handler(struct MPT3SAS_ADAPTER *ioc,
1523 enum reset_type type);
1524
1525 void *mpt3sas_base_get_msg_frame(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1526 void *mpt3sas_base_get_sense_buffer(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1527 __le32 mpt3sas_base_get_sense_buffer_dma(struct MPT3SAS_ADAPTER *ioc,
1528 u16 smid);
1529 void *mpt3sas_base_get_pcie_sgl(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1530 dma_addr_t mpt3sas_base_get_pcie_sgl_dma(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1531 void mpt3sas_base_sync_reply_irqs(struct MPT3SAS_ADAPTER *ioc, u8 poll);
1532 void mpt3sas_base_mask_interrupts(struct MPT3SAS_ADAPTER *ioc);
1533 void mpt3sas_base_unmask_interrupts(struct MPT3SAS_ADAPTER *ioc);
1534
1535 void mpt3sas_base_put_smid_fast_path(struct MPT3SAS_ADAPTER *ioc, u16 smid,
1536 u16 handle);
1537 void mpt3sas_base_put_smid_hi_priority(struct MPT3SAS_ADAPTER *ioc, u16 smid,
1538 u16 msix_task);
1539 void mpt3sas_base_put_smid_nvme_encap(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1540 void mpt3sas_base_put_smid_default(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1541 /* hi-priority queue */
1542 u16 mpt3sas_base_get_smid_hpr(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx);
1543 u16 mpt3sas_base_get_smid_scsiio(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx,
1544 struct scsi_cmnd *scmd);
1545 void mpt3sas_base_clear_st(struct MPT3SAS_ADAPTER *ioc,
1546 struct scsiio_tracker *st);
1547
1548 u16 mpt3sas_base_get_smid(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx);
1549 void mpt3sas_base_free_smid(struct MPT3SAS_ADAPTER *ioc, u16 smid);
1550 void mpt3sas_base_initialize_callback_handler(void);
1551 u8 mpt3sas_base_register_callback_handler(MPT_CALLBACK cb_func);
1552 void mpt3sas_base_release_callback_handler(u8 cb_idx);
1553
1554 u8 mpt3sas_base_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1555 u32 reply);
1556 u8 mpt3sas_port_enable_done(struct MPT3SAS_ADAPTER *ioc, u16 smid,
1557 u8 msix_index, u32 reply);
1558 void *mpt3sas_base_get_reply_virt_addr(struct MPT3SAS_ADAPTER *ioc,
1559 u32 phys_addr);
1560
1561 u32 mpt3sas_base_get_iocstate(struct MPT3SAS_ADAPTER *ioc, int cooked);
1562
1563 void mpt3sas_base_fault_info(struct MPT3SAS_ADAPTER *ioc , u16 fault_code);
1564 #define mpt3sas_print_fault_code(ioc, fault_code) \
1565 do { pr_err("%s fault info from func: %s\n", ioc->name, __func__); \
1566 mpt3sas_base_fault_info(ioc, fault_code); } while (0)
1567
1568 void mpt3sas_base_coredump_info(struct MPT3SAS_ADAPTER *ioc, u16 fault_code);
1569 #define mpt3sas_print_coredump_info(ioc, fault_code) \
1570 do { pr_err("%s fault info from func: %s\n", ioc->name, __func__); \
1571 mpt3sas_base_coredump_info(ioc, fault_code); } while (0)
1572
1573 int mpt3sas_base_wait_for_coredump_completion(struct MPT3SAS_ADAPTER *ioc,
1574 const char *caller);
1575 int mpt3sas_base_sas_iounit_control(struct MPT3SAS_ADAPTER *ioc,
1576 Mpi2SasIoUnitControlReply_t *mpi_reply,
1577 Mpi2SasIoUnitControlRequest_t *mpi_request);
1578 int mpt3sas_base_scsi_enclosure_processor(struct MPT3SAS_ADAPTER *ioc,
1579 Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request);
1580
1581 void mpt3sas_base_validate_event_type(struct MPT3SAS_ADAPTER *ioc,
1582 u32 *event_type);
1583
1584 void mpt3sas_halt_firmware(struct MPT3SAS_ADAPTER *ioc);
1585
1586 void mpt3sas_base_update_missing_delay(struct MPT3SAS_ADAPTER *ioc,
1587 u16 device_missing_delay, u8 io_missing_delay);
1588
1589 int mpt3sas_port_enable(struct MPT3SAS_ADAPTER *ioc);
1590
1591 void
1592 mpt3sas_wait_for_commands_to_complete(struct MPT3SAS_ADAPTER *ioc);
1593
1594 u8 mpt3sas_base_check_cmd_timeout(struct MPT3SAS_ADAPTER *ioc,
1595 u8 status, void *mpi_request, int sz);
1596 #define mpt3sas_check_cmd_timeout(ioc, status, mpi_request, sz, issue_reset) \
1597 do { ioc_err(ioc, "In func: %s\n", __func__); \
1598 issue_reset = mpt3sas_base_check_cmd_timeout(ioc, \
1599 status, mpi_request, sz); } while (0)
1600
1601 int mpt3sas_wait_for_ioc(struct MPT3SAS_ADAPTER *ioc, int wait_count);
1602
1603 /* scsih shared API */
1604 struct scsi_cmnd *mpt3sas_scsih_scsi_lookup_get(struct MPT3SAS_ADAPTER *ioc,
1605 u16 smid);
1606 u8 mpt3sas_scsih_event_callback(struct MPT3SAS_ADAPTER *ioc, u8 msix_index,
1607 u32 reply);
1608 void mpt3sas_scsih_pre_reset_handler(struct MPT3SAS_ADAPTER *ioc);
1609 void mpt3sas_scsih_clear_outstanding_scsi_tm_commands(
1610 struct MPT3SAS_ADAPTER *ioc);
1611 void mpt3sas_scsih_reset_done_handler(struct MPT3SAS_ADAPTER *ioc);
1612
1613 int mpt3sas_scsih_issue_tm(struct MPT3SAS_ADAPTER *ioc, u16 handle,
1614 uint channel, uint id, u64 lun, u8 type, u16 smid_task,
1615 u16 msix_task, u8 timeout, u8 tr_method);
1616 int mpt3sas_scsih_issue_locked_tm(struct MPT3SAS_ADAPTER *ioc, u16 handle,
1617 uint channel, uint id, u64 lun, u8 type, u16 smid_task,
1618 u16 msix_task, u8 timeout, u8 tr_method);
1619
1620 void mpt3sas_scsih_set_tm_flag(struct MPT3SAS_ADAPTER *ioc, u16 handle);
1621 void mpt3sas_scsih_clear_tm_flag(struct MPT3SAS_ADAPTER *ioc, u16 handle);
1622 void mpt3sas_expander_remove(struct MPT3SAS_ADAPTER *ioc, u64 sas_address);
1623 void mpt3sas_device_remove_by_sas_address(struct MPT3SAS_ADAPTER *ioc,
1624 u64 sas_address);
1625 u8 mpt3sas_check_for_pending_internal_cmds(struct MPT3SAS_ADAPTER *ioc,
1626 u16 smid);
1627
1628 struct _sas_node *mpt3sas_scsih_expander_find_by_handle(
1629 struct MPT3SAS_ADAPTER *ioc, u16 handle);
1630 struct _sas_node *mpt3sas_scsih_expander_find_by_sas_address(
1631 struct MPT3SAS_ADAPTER *ioc, u64 sas_address);
1632 struct _sas_device *mpt3sas_get_sdev_by_addr(
1633 struct MPT3SAS_ADAPTER *ioc, u64 sas_address);
1634 struct _sas_device *__mpt3sas_get_sdev_by_addr(
1635 struct MPT3SAS_ADAPTER *ioc, u64 sas_address);
1636 struct _sas_device *mpt3sas_get_sdev_by_handle(struct MPT3SAS_ADAPTER *ioc,
1637 u16 handle);
1638 struct _pcie_device *mpt3sas_get_pdev_by_handle(struct MPT3SAS_ADAPTER *ioc,
1639 u16 handle);
1640
1641 void mpt3sas_port_enable_complete(struct MPT3SAS_ADAPTER *ioc);
1642 struct _raid_device *
1643 mpt3sas_raid_device_find_by_handle(struct MPT3SAS_ADAPTER *ioc, u16 handle);
1644 void mpt3sas_scsih_change_queue_depth(struct scsi_device *sdev, int qdepth);
1645
1646 /* config shared API */
1647 u8 mpt3sas_config_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1648 u32 reply);
1649 int mpt3sas_config_get_number_hba_phys(struct MPT3SAS_ADAPTER *ioc,
1650 u8 *num_phys);
1651 int mpt3sas_config_get_manufacturing_pg0(struct MPT3SAS_ADAPTER *ioc,
1652 Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage0_t *config_page);
1653 int mpt3sas_config_get_manufacturing_pg7(struct MPT3SAS_ADAPTER *ioc,
1654 Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage7_t *config_page,
1655 u16 sz);
1656 int mpt3sas_config_get_manufacturing_pg10(struct MPT3SAS_ADAPTER *ioc,
1657 Mpi2ConfigReply_t *mpi_reply,
1658 struct Mpi2ManufacturingPage10_t *config_page);
1659
1660 int mpt3sas_config_get_manufacturing_pg11(struct MPT3SAS_ADAPTER *ioc,
1661 Mpi2ConfigReply_t *mpi_reply,
1662 struct Mpi2ManufacturingPage11_t *config_page);
1663 int mpt3sas_config_set_manufacturing_pg11(struct MPT3SAS_ADAPTER *ioc,
1664 Mpi2ConfigReply_t *mpi_reply,
1665 struct Mpi2ManufacturingPage11_t *config_page);
1666
1667 int mpt3sas_config_get_bios_pg2(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1668 *mpi_reply, Mpi2BiosPage2_t *config_page);
1669 int mpt3sas_config_get_bios_pg3(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1670 *mpi_reply, Mpi2BiosPage3_t *config_page);
1671 int mpt3sas_config_get_iounit_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1672 *mpi_reply, Mpi2IOUnitPage0_t *config_page);
1673 int mpt3sas_config_get_sas_device_pg0(struct MPT3SAS_ADAPTER *ioc,
1674 Mpi2ConfigReply_t *mpi_reply, Mpi2SasDevicePage0_t *config_page,
1675 u32 form, u32 handle);
1676 int mpt3sas_config_get_sas_device_pg1(struct MPT3SAS_ADAPTER *ioc,
1677 Mpi2ConfigReply_t *mpi_reply, Mpi2SasDevicePage1_t *config_page,
1678 u32 form, u32 handle);
1679 int mpt3sas_config_get_pcie_device_pg0(struct MPT3SAS_ADAPTER *ioc,
1680 Mpi2ConfigReply_t *mpi_reply, Mpi26PCIeDevicePage0_t *config_page,
1681 u32 form, u32 handle);
1682 int mpt3sas_config_get_pcie_device_pg2(struct MPT3SAS_ADAPTER *ioc,
1683 Mpi2ConfigReply_t *mpi_reply, Mpi26PCIeDevicePage2_t *config_page,
1684 u32 form, u32 handle);
1685 int mpt3sas_config_get_sas_iounit_pg0(struct MPT3SAS_ADAPTER *ioc,
1686 Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage0_t *config_page,
1687 u16 sz);
1688 int mpt3sas_config_get_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1689 *mpi_reply, Mpi2IOUnitPage1_t *config_page);
1690 int mpt3sas_config_get_iounit_pg3(struct MPT3SAS_ADAPTER *ioc,
1691 Mpi2ConfigReply_t *mpi_reply, Mpi2IOUnitPage3_t *config_page, u16 sz);
1692 int mpt3sas_config_set_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1693 *mpi_reply, Mpi2IOUnitPage1_t *config_page);
1694 int mpt3sas_config_get_iounit_pg8(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1695 *mpi_reply, Mpi2IOUnitPage8_t *config_page);
1696 int mpt3sas_config_get_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc,
1697 Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page,
1698 u16 sz);
1699 int mpt3sas_config_set_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc,
1700 Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page,
1701 u16 sz);
1702 int mpt3sas_config_get_ioc_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1703 *mpi_reply, Mpi2IOCPage1_t *config_page);
1704 int mpt3sas_config_set_ioc_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1705 *mpi_reply, Mpi2IOCPage1_t *config_page);
1706 int mpt3sas_config_get_ioc_pg8(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1707 *mpi_reply, Mpi2IOCPage8_t *config_page);
1708 int mpt3sas_config_get_expander_pg0(struct MPT3SAS_ADAPTER *ioc,
1709 Mpi2ConfigReply_t *mpi_reply, Mpi2ExpanderPage0_t *config_page,
1710 u32 form, u32 handle);
1711 int mpt3sas_config_get_expander_pg1(struct MPT3SAS_ADAPTER *ioc,
1712 Mpi2ConfigReply_t *mpi_reply, Mpi2ExpanderPage1_t *config_page,
1713 u32 phy_number, u16 handle);
1714 int mpt3sas_config_get_enclosure_pg0(struct MPT3SAS_ADAPTER *ioc,
1715 Mpi2ConfigReply_t *mpi_reply, Mpi2SasEnclosurePage0_t *config_page,
1716 u32 form, u32 handle);
1717 int mpt3sas_config_get_phy_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1718 *mpi_reply, Mpi2SasPhyPage0_t *config_page, u32 phy_number);
1719 int mpt3sas_config_get_phy_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t
1720 *mpi_reply, Mpi2SasPhyPage1_t *config_page, u32 phy_number);
1721 int mpt3sas_config_get_raid_volume_pg1(struct MPT3SAS_ADAPTER *ioc,
1722 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form,
1723 u32 handle);
1724 int mpt3sas_config_get_number_pds(struct MPT3SAS_ADAPTER *ioc, u16 handle,
1725 u8 *num_pds);
1726 int mpt3sas_config_get_raid_volume_pg0(struct MPT3SAS_ADAPTER *ioc,
1727 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 form,
1728 u32 handle, u16 sz);
1729 int mpt3sas_config_get_phys_disk_pg0(struct MPT3SAS_ADAPTER *ioc,
1730 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidPhysDiskPage0_t *config_page,
1731 u32 form, u32 form_specific);
1732 int mpt3sas_config_get_volume_handle(struct MPT3SAS_ADAPTER *ioc, u16 pd_handle,
1733 u16 *volume_handle);
1734 int mpt3sas_config_get_volume_wwid(struct MPT3SAS_ADAPTER *ioc,
1735 u16 volume_handle, u64 *wwid);
1736
1737 /* ctl shared API */
1738 extern struct device_attribute *mpt3sas_host_attrs[];
1739 extern struct device_attribute *mpt3sas_dev_attrs[];
1740 void mpt3sas_ctl_init(ushort hbas_to_enumerate);
1741 void mpt3sas_ctl_exit(ushort hbas_to_enumerate);
1742 u8 mpt3sas_ctl_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1743 u32 reply);
1744 void mpt3sas_ctl_pre_reset_handler(struct MPT3SAS_ADAPTER *ioc);
1745 void mpt3sas_ctl_clear_outstanding_ioctls(struct MPT3SAS_ADAPTER *ioc);
1746 void mpt3sas_ctl_reset_done_handler(struct MPT3SAS_ADAPTER *ioc);
1747 u8 mpt3sas_ctl_event_callback(struct MPT3SAS_ADAPTER *ioc,
1748 u8 msix_index, u32 reply);
1749 void mpt3sas_ctl_add_to_event_log(struct MPT3SAS_ADAPTER *ioc,
1750 Mpi2EventNotificationReply_t *mpi_reply);
1751
1752 void mpt3sas_enable_diag_buffer(struct MPT3SAS_ADAPTER *ioc,
1753 u8 bits_to_register);
1754 int mpt3sas_send_diag_release(struct MPT3SAS_ADAPTER *ioc, u8 buffer_type,
1755 u8 *issue_reset);
1756
1757 /* transport shared API */
1758 extern struct scsi_transport_template *mpt3sas_transport_template;
1759 u8 mpt3sas_transport_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
1760 u32 reply);
1761 struct _sas_port *mpt3sas_transport_port_add(struct MPT3SAS_ADAPTER *ioc,
1762 u16 handle, u64 sas_address);
1763 void mpt3sas_transport_port_remove(struct MPT3SAS_ADAPTER *ioc, u64 sas_address,
1764 u64 sas_address_parent);
1765 int mpt3sas_transport_add_host_phy(struct MPT3SAS_ADAPTER *ioc, struct _sas_phy
1766 *mpt3sas_phy, Mpi2SasPhyPage0_t phy_pg0, struct device *parent_dev);
1767 int mpt3sas_transport_add_expander_phy(struct MPT3SAS_ADAPTER *ioc,
1768 struct _sas_phy *mpt3sas_phy, Mpi2ExpanderPage1_t expander_pg1,
1769 struct device *parent_dev);
1770 void mpt3sas_transport_update_links(struct MPT3SAS_ADAPTER *ioc,
1771 u64 sas_address, u16 handle, u8 phy_number, u8 link_rate);
1772 extern struct sas_function_template mpt3sas_transport_functions;
1773 extern struct scsi_transport_template *mpt3sas_transport_template;
1774 /* trigger data externs */
1775 void mpt3sas_send_trigger_data_event(struct MPT3SAS_ADAPTER *ioc,
1776 struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data);
1777 void mpt3sas_process_trigger_data(struct MPT3SAS_ADAPTER *ioc,
1778 struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data);
1779 void mpt3sas_trigger_master(struct MPT3SAS_ADAPTER *ioc,
1780 u32 trigger_bitmask);
1781 void mpt3sas_trigger_event(struct MPT3SAS_ADAPTER *ioc, u16 event,
1782 u16 log_entry_qualifier);
1783 void mpt3sas_trigger_scsi(struct MPT3SAS_ADAPTER *ioc, u8 sense_key,
1784 u8 asc, u8 ascq);
1785 void mpt3sas_trigger_mpi(struct MPT3SAS_ADAPTER *ioc, u16 ioc_status,
1786 u32 loginfo);
1787
1788 /* warpdrive APIs */
1789 u8 mpt3sas_get_num_volumes(struct MPT3SAS_ADAPTER *ioc);
1790 void mpt3sas_init_warpdrive_properties(struct MPT3SAS_ADAPTER *ioc,
1791 struct _raid_device *raid_device);
1792 void
1793 mpt3sas_setup_direct_io(struct MPT3SAS_ADAPTER *ioc, struct scsi_cmnd *scmd,
1794 struct _raid_device *raid_device, Mpi25SCSIIORequest_t *mpi_request);
1795
1796 /* NCQ Prio Handling Check */
1797 bool scsih_ncq_prio_supp(struct scsi_device *sdev);
1798
1799 void mpt3sas_setup_debugfs(struct MPT3SAS_ADAPTER *ioc);
1800 void mpt3sas_destroy_debugfs(struct MPT3SAS_ADAPTER *ioc);
1801 void mpt3sas_init_debugfs(void);
1802 void mpt3sas_exit_debugfs(void);
1803
1804 /**
1805 * _scsih_is_pcie_scsi_device - determines if device is an pcie scsi device
1806 * @device_info: bitfield providing information about the device.
1807 * Context: none
1808 *
1809 * Returns 1 if scsi device.
1810 */
1811 static inline int
mpt3sas_scsih_is_pcie_scsi_device(u32 device_info)1812 mpt3sas_scsih_is_pcie_scsi_device(u32 device_info)
1813 {
1814 if ((device_info &
1815 MPI26_PCIE_DEVINFO_MASK_DEVICE_TYPE) == MPI26_PCIE_DEVINFO_SCSI)
1816 return 1;
1817 else
1818 return 0;
1819 }
1820 #endif /* MPT3SAS_BASE_H_INCLUDED */
1821
