1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2007 - 2011 Realtek Corporation. */
3
4 #include "../include/odm_precomp.h"
5
6 #define READ_AND_CONFIG READ_AND_CONFIG_MP
7
8 #define READ_AND_CONFIG_MP(ic, txt) (ODM_ReadAndConfig##txt##ic(dm_odm))
9 #define READ_AND_CONFIG_TC(ic, txt) (ODM_ReadAndConfig_TC##txt##ic(dm_odm))
10
odm_QueryRxPwrPercentage(s8 AntPower)11 static u8 odm_QueryRxPwrPercentage(s8 AntPower)
12 {
13 if ((AntPower <= -100) || (AntPower >= 20))
14 return 0;
15 else if (AntPower >= 0)
16 return 100;
17 else
18 return 100 + AntPower;
19 }
20
21 /* 2012/01/12 MH MOve some signal strength smooth method to MP HAL layer. */
22 /* IF other SW team do not support the feature, remove this section.?? */
odm_sig_patch_lenove(struct odm_dm_struct * dm_odm,s32 CurrSig)23 static s32 odm_sig_patch_lenove(struct odm_dm_struct *dm_odm, s32 CurrSig)
24 {
25 return 0;
26 }
27
odm_sig_patch_netcore(struct odm_dm_struct * dm_odm,s32 CurrSig)28 static s32 odm_sig_patch_netcore(struct odm_dm_struct *dm_odm, s32 CurrSig)
29 {
30 return 0;
31 }
32
odm_SignalScaleMapping_92CSeries(struct odm_dm_struct * dm_odm,s32 CurrSig)33 static s32 odm_SignalScaleMapping_92CSeries(struct odm_dm_struct *dm_odm, s32 CurrSig)
34 {
35 s32 RetSig = 0;
36
37 if ((dm_odm->SupportInterface == ODM_ITRF_USB) ||
38 (dm_odm->SupportInterface == ODM_ITRF_SDIO)) {
39 if (CurrSig >= 51 && CurrSig <= 100)
40 RetSig = 100;
41 else if (CurrSig >= 41 && CurrSig <= 50)
42 RetSig = 80 + ((CurrSig - 40) * 2);
43 else if (CurrSig >= 31 && CurrSig <= 40)
44 RetSig = 66 + (CurrSig - 30);
45 else if (CurrSig >= 21 && CurrSig <= 30)
46 RetSig = 54 + (CurrSig - 20);
47 else if (CurrSig >= 10 && CurrSig <= 20)
48 RetSig = 42 + (((CurrSig - 10) * 2) / 3);
49 else if (CurrSig >= 5 && CurrSig <= 9)
50 RetSig = 22 + (((CurrSig - 5) * 3) / 2);
51 else if (CurrSig >= 1 && CurrSig <= 4)
52 RetSig = 6 + (((CurrSig - 1) * 3) / 2);
53 else
54 RetSig = CurrSig;
55 }
56 return RetSig;
57 }
58
odm_SignalScaleMapping(struct odm_dm_struct * dm_odm,s32 CurrSig)59 static s32 odm_SignalScaleMapping(struct odm_dm_struct *dm_odm, s32 CurrSig)
60 {
61 if ((dm_odm->SupportPlatform == ODM_MP) &&
62 (dm_odm->SupportInterface != ODM_ITRF_PCIE) && /* USB & SDIO */
63 (dm_odm->PatchID == 10))
64 return odm_sig_patch_netcore(dm_odm, CurrSig);
65 else if ((dm_odm->SupportPlatform == ODM_MP) &&
66 (dm_odm->SupportInterface == ODM_ITRF_PCIE) &&
67 (dm_odm->PatchID == 19))
68 return odm_sig_patch_lenove(dm_odm, CurrSig);
69 else
70 return odm_SignalScaleMapping_92CSeries(dm_odm, CurrSig);
71 }
72
73 /* pMgntInfo->CustomerID == RT_CID_819x_Lenovo */
odm_SQ_process_patch_RT_CID_819x_Lenovo(struct odm_dm_struct * dm_odm,u8 isCCKrate,u8 PWDB_ALL,u8 path,u8 RSSI)74 static u8 odm_SQ_process_patch_RT_CID_819x_Lenovo(struct odm_dm_struct *dm_odm,
75 u8 isCCKrate, u8 PWDB_ALL, u8 path, u8 RSSI)
76 {
77 return 0;
78 }
79
odm_evm_db_to_percentage(s8 value)80 static u8 odm_evm_db_to_percentage(s8 value)
81 {
82 /* -33dB~0dB to 0%~99% */
83 s8 ret_val = clamp(-value, 0, 33) * 3;
84
85 if (ret_val == 99)
86 ret_val = 100;
87
88 return ret_val;
89 }
90
odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct * dm_odm,struct odm_phy_status_info * pPhyInfo,u8 * pPhyStatus,struct odm_per_pkt_info * pPktinfo,struct adapter * adapt)91 static void odm_RxPhyStatus92CSeries_Parsing(struct odm_dm_struct *dm_odm,
92 struct odm_phy_status_info *pPhyInfo,
93 u8 *pPhyStatus,
94 struct odm_per_pkt_info *pPktinfo,
95 struct adapter *adapt)
96 {
97 struct sw_ant_switch *pDM_SWAT_Table = &dm_odm->DM_SWAT_Table;
98 u8 i, Max_spatial_stream;
99 s8 rx_pwr[4], rx_pwr_all = 0;
100 u8 EVM, PWDB_ALL = 0, PWDB_ALL_BT;
101 u8 RSSI, total_rssi = 0;
102 u8 isCCKrate = 0;
103 u8 rf_rx_num = 0;
104 u8 cck_highpwr = 0;
105 u8 LNA_idx, VGA_idx;
106
107 struct phy_status_rpt *pPhyStaRpt = (struct phy_status_rpt *)pPhyStatus;
108
109 isCCKrate = ((pPktinfo->Rate >= DESC92C_RATE1M) && (pPktinfo->Rate <= DESC92C_RATE11M)) ? true : false;
110
111 pPhyInfo->RxMIMOSignalQuality[RF_PATH_A] = -1;
112 pPhyInfo->RxMIMOSignalQuality[RF_PATH_B] = -1;
113
114 if (isCCKrate) {
115 u8 report;
116 u8 cck_agc_rpt;
117
118 dm_odm->PhyDbgInfo.NumQryPhyStatusCCK++;
119 /* (1)Hardware does not provide RSSI for CCK */
120 /* (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) */
121
122 cck_highpwr = dm_odm->bCckHighPower;
123
124 cck_agc_rpt = pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a;
125
126 /* 2011.11.28 LukeLee: 88E use different LNA & VGA gain table */
127 /* The RSSI formula should be modified according to the gain table */
128 /* In 88E, cck_highpwr is always set to 1 */
129 if (dm_odm->SupportICType & (ODM_RTL8188E | ODM_RTL8812)) {
130 LNA_idx = ((cck_agc_rpt & 0xE0) >> 5);
131 VGA_idx = (cck_agc_rpt & 0x1F);
132 switch (LNA_idx) {
133 case 7:
134 if (VGA_idx <= 27)
135 rx_pwr_all = -100 + 2 * (27 - VGA_idx); /* VGA_idx = 27~2 */
136 else
137 rx_pwr_all = -100;
138 break;
139 case 6:
140 rx_pwr_all = -48 + 2 * (2 - VGA_idx); /* VGA_idx = 2~0 */
141 break;
142 case 5:
143 rx_pwr_all = -42 + 2 * (7 - VGA_idx); /* VGA_idx = 7~5 */
144 break;
145 case 4:
146 rx_pwr_all = -36 + 2 * (7 - VGA_idx); /* VGA_idx = 7~4 */
147 break;
148 case 3:
149 rx_pwr_all = -24 + 2 * (7 - VGA_idx); /* VGA_idx = 7~0 */
150 break;
151 case 2:
152 if (cck_highpwr)
153 rx_pwr_all = -12 + 2 * (5 - VGA_idx); /* VGA_idx = 5~0 */
154 else
155 rx_pwr_all = -6 + 2 * (5 - VGA_idx);
156 break;
157 case 1:
158 rx_pwr_all = 8 - 2 * VGA_idx;
159 break;
160 case 0:
161 rx_pwr_all = 14 - 2 * VGA_idx;
162 break;
163 default:
164 break;
165 }
166 rx_pwr_all += 6;
167 PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
168 if (!cck_highpwr) {
169 if (PWDB_ALL >= 80)
170 PWDB_ALL = ((PWDB_ALL - 80) << 1) + ((PWDB_ALL - 80) >> 1) + 80;
171 else if ((PWDB_ALL <= 78) && (PWDB_ALL >= 20))
172 PWDB_ALL += 3;
173 if (PWDB_ALL > 100)
174 PWDB_ALL = 100;
175 }
176 } else {
177 if (!cck_highpwr) {
178 report = (cck_agc_rpt & 0xc0) >> 6;
179 switch (report) {
180 /* 03312009 modified by cosa */
181 /* Modify the RF RNA gain value to -40, -20, -2, 14 by Jenyu's suggestion */
182 /* Note: different RF with the different RNA gain. */
183 case 0x3:
184 rx_pwr_all = -46 - (cck_agc_rpt & 0x3e);
185 break;
186 case 0x2:
187 rx_pwr_all = -26 - (cck_agc_rpt & 0x3e);
188 break;
189 case 0x1:
190 rx_pwr_all = -12 - (cck_agc_rpt & 0x3e);
191 break;
192 case 0x0:
193 rx_pwr_all = 16 - (cck_agc_rpt & 0x3e);
194 break;
195 }
196 } else {
197 report = (cck_agc_rpt & 0x60) >> 5;
198 switch (report) {
199 case 0x3:
200 rx_pwr_all = -46 - ((cck_agc_rpt & 0x1f) << 1);
201 break;
202 case 0x2:
203 rx_pwr_all = -26 - ((cck_agc_rpt & 0x1f) << 1);
204 break;
205 case 0x1:
206 rx_pwr_all = -12 - ((cck_agc_rpt & 0x1f) << 1);
207 break;
208 case 0x0:
209 rx_pwr_all = 16 - ((cck_agc_rpt & 0x1f) << 1);
210 break;
211 }
212 }
213
214 PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
215
216 /* Modification for ext-LNA board */
217 if (dm_odm->BoardType == ODM_BOARD_HIGHPWR) {
218 if ((cck_agc_rpt >> 7) == 0) {
219 PWDB_ALL = (PWDB_ALL > 94) ? 100 : (PWDB_ALL + 6);
220 } else {
221 if (PWDB_ALL > 38)
222 PWDB_ALL -= 16;
223 else
224 PWDB_ALL = (PWDB_ALL <= 16) ? (PWDB_ALL >> 2) : (PWDB_ALL - 12);
225 }
226
227 /* CCK modification */
228 if (PWDB_ALL > 25 && PWDB_ALL <= 60)
229 PWDB_ALL += 6;
230 } else {/* Modification for int-LNA board */
231 if (PWDB_ALL > 99)
232 PWDB_ALL -= 8;
233 else if (PWDB_ALL > 50 && PWDB_ALL <= 68)
234 PWDB_ALL += 4;
235 }
236 }
237
238 pPhyInfo->RxPWDBAll = PWDB_ALL;
239 pPhyInfo->BTRxRSSIPercentage = PWDB_ALL;
240 pPhyInfo->RecvSignalPower = rx_pwr_all;
241 /* (3) Get Signal Quality (EVM) */
242 if (pPktinfo->bPacketMatchBSSID) {
243 u8 SQ, SQ_rpt;
244
245 if ((dm_odm->SupportPlatform == ODM_MP) && (dm_odm->PatchID == 19)) {
246 SQ = odm_SQ_process_patch_RT_CID_819x_Lenovo(dm_odm, isCCKrate, PWDB_ALL, 0, 0);
247 } else if (pPhyInfo->RxPWDBAll > 40 && !dm_odm->bInHctTest) {
248 SQ = 100;
249 } else {
250 SQ_rpt = pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all;
251
252 if (SQ_rpt > 64)
253 SQ = 0;
254 else if (SQ_rpt < 20)
255 SQ = 100;
256 else
257 SQ = ((64 - SQ_rpt) * 100) / 44;
258 }
259 pPhyInfo->SignalQuality = SQ;
260 pPhyInfo->RxMIMOSignalQuality[RF_PATH_A] = SQ;
261 pPhyInfo->RxMIMOSignalQuality[RF_PATH_B] = -1;
262 }
263 } else { /* is OFDM rate */
264 dm_odm->PhyDbgInfo.NumQryPhyStatusOFDM++;
265
266 /* (1)Get RSSI for HT rate */
267
268 for (i = RF_PATH_A; i < RF_PATH_MAX; i++) {
269 /* 2008/01/30 MH we will judge RF RX path now. */
270 if (dm_odm->RFPathRxEnable & BIT(i))
271 rf_rx_num++;
272
273 rx_pwr[i] = ((pPhyStaRpt->path_agc[i].gain & 0x3F) * 2) - 110;
274 if (i == RF_PATH_A)
275 adapt->signal_strength = rx_pwr[i];
276
277 pPhyInfo->RxPwr[i] = rx_pwr[i];
278
279 /* Translate DBM to percentage. */
280 RSSI = odm_QueryRxPwrPercentage(rx_pwr[i]);
281 total_rssi += RSSI;
282
283 /* Modification for ext-LNA board */
284 if (dm_odm->BoardType == ODM_BOARD_HIGHPWR) {
285 if ((pPhyStaRpt->path_agc[i].trsw) == 1)
286 RSSI = (RSSI > 94) ? 100 : (RSSI + 6);
287 else
288 RSSI = (RSSI <= 16) ? (RSSI >> 3) : (RSSI - 16);
289
290 if ((RSSI <= 34) && (RSSI >= 4))
291 RSSI -= 4;
292 }
293
294 pPhyInfo->RxMIMOSignalStrength[i] = (u8)RSSI;
295
296 /* Get Rx snr value in DB */
297 pPhyInfo->RxSNR[i] = (s32)(pPhyStaRpt->path_rxsnr[i] / 2);
298 dm_odm->PhyDbgInfo.RxSNRdB[i] = (s32)(pPhyStaRpt->path_rxsnr[i] / 2);
299
300 /* Record Signal Strength for next packet */
301 if (pPktinfo->bPacketMatchBSSID) {
302 if ((dm_odm->SupportPlatform == ODM_MP) && (dm_odm->PatchID == 19)) {
303 if (i == RF_PATH_A)
304 pPhyInfo->SignalQuality = odm_SQ_process_patch_RT_CID_819x_Lenovo(dm_odm, isCCKrate, PWDB_ALL, i, RSSI);
305 }
306 }
307 }
308 /* (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) */
309 rx_pwr_all = (((pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all) >> 1) & 0x7f) - 110;
310
311 PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
312 PWDB_ALL_BT = PWDB_ALL;
313
314 pPhyInfo->RxPWDBAll = PWDB_ALL;
315 pPhyInfo->BTRxRSSIPercentage = PWDB_ALL_BT;
316 pPhyInfo->RxPower = rx_pwr_all;
317 pPhyInfo->RecvSignalPower = rx_pwr_all;
318
319 if ((dm_odm->SupportPlatform == ODM_MP) && (dm_odm->PatchID == 19)) {
320 /* do nothing */
321 } else {
322 /* (3)EVM of HT rate */
323 if (pPktinfo->Rate >= DESC92C_RATEMCS8 && pPktinfo->Rate <= DESC92C_RATEMCS15)
324 Max_spatial_stream = 2; /* both spatial stream make sense */
325 else
326 Max_spatial_stream = 1; /* only spatial stream 1 makes sense */
327
328 for (i = 0; i < Max_spatial_stream; i++) {
329 /* Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment */
330 /* fill most significant bit to "zero" when doing shifting operation which may change a negative */
331 /* value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore. */
332 EVM = odm_evm_db_to_percentage((pPhyStaRpt->stream_rxevm[i])); /* dbm */
333
334 if (pPktinfo->bPacketMatchBSSID) {
335 if (i == RF_PATH_A) /* Fill value in RFD, Get the first spatial stream only */
336 pPhyInfo->SignalQuality = (u8)(EVM & 0xff);
337 pPhyInfo->RxMIMOSignalQuality[i] = (u8)(EVM & 0xff);
338 }
339 }
340 }
341 }
342 /* UI BSS List signal strength(in percentage), make it good looking, from 0~100. */
343 /* It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp(). */
344 if (isCCKrate) {
345 pPhyInfo->SignalStrength = (u8)(odm_SignalScaleMapping(dm_odm, PWDB_ALL));/* PWDB_ALL; */
346 } else {
347 if (rf_rx_num != 0)
348 pPhyInfo->SignalStrength = (u8)(odm_SignalScaleMapping(dm_odm, total_rssi /= rf_rx_num));
349 }
350
351 /* For 92C/92D HW (Hybrid) Antenna Diversity */
352 pDM_SWAT_Table->antsel = pPhyStaRpt->ant_sel;
353 /* For 88E HW Antenna Diversity */
354 dm_odm->DM_FatTable.antsel_rx_keep_0 = pPhyStaRpt->ant_sel;
355 dm_odm->DM_FatTable.antsel_rx_keep_1 = pPhyStaRpt->ant_sel_b;
356 dm_odm->DM_FatTable.antsel_rx_keep_2 = pPhyStaRpt->antsel_rx_keep_2;
357 }
358
odm_Init_RSSIForDM(struct odm_dm_struct * dm_odm)359 void odm_Init_RSSIForDM(struct odm_dm_struct *dm_odm)
360 {
361 }
362
odm_Process_RSSIForDM(struct odm_dm_struct * dm_odm,struct odm_phy_status_info * pPhyInfo,struct odm_per_pkt_info * pPktinfo)363 static void odm_Process_RSSIForDM(struct odm_dm_struct *dm_odm,
364 struct odm_phy_status_info *pPhyInfo,
365 struct odm_per_pkt_info *pPktinfo)
366 {
367 s32 UndecoratedSmoothedPWDB, UndecoratedSmoothedCCK;
368 s32 UndecoratedSmoothedOFDM, RSSI_Ave;
369 u8 isCCKrate = 0;
370 u8 RSSI_max, RSSI_min, i;
371 u32 OFDM_pkt = 0;
372 u32 Weighting = 0;
373 struct sta_info *pEntry;
374
375 if (pPktinfo->StationID == 0xFF)
376 return;
377 pEntry = dm_odm->pODM_StaInfo[pPktinfo->StationID];
378 if (!IS_STA_VALID(pEntry))
379 return;
380 if ((!pPktinfo->bPacketMatchBSSID))
381 return;
382
383 isCCKrate = ((pPktinfo->Rate >= DESC92C_RATE1M) && (pPktinfo->Rate <= DESC92C_RATE11M)) ? true : false;
384
385 /* Smart Antenna Debug Message------------------ */
386 if (dm_odm->SupportICType == ODM_RTL8188E) {
387 u8 antsel_tr_mux;
388 struct fast_ant_train *pDM_FatTable = &dm_odm->DM_FatTable;
389
390 if (dm_odm->AntDivType == CG_TRX_SMART_ANTDIV) {
391 if (pDM_FatTable->FAT_State == FAT_TRAINING_STATE) {
392 if (pPktinfo->bPacketToSelf) {
393 antsel_tr_mux = (pDM_FatTable->antsel_rx_keep_2 << 2) |
394 (pDM_FatTable->antsel_rx_keep_1 << 1) |
395 pDM_FatTable->antsel_rx_keep_0;
396 pDM_FatTable->antSumRSSI[antsel_tr_mux] += pPhyInfo->RxPWDBAll;
397 pDM_FatTable->antRSSIcnt[antsel_tr_mux]++;
398 }
399 }
400 } else if ((dm_odm->AntDivType == CG_TRX_HW_ANTDIV) || (dm_odm->AntDivType == CGCS_RX_HW_ANTDIV)) {
401 if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) {
402 antsel_tr_mux = (pDM_FatTable->antsel_rx_keep_2 << 2) |
403 (pDM_FatTable->antsel_rx_keep_1 << 1) | pDM_FatTable->antsel_rx_keep_0;
404 ODM_AntselStatistics_88E(dm_odm, antsel_tr_mux, pPktinfo->StationID, pPhyInfo->RxPWDBAll);
405 }
406 }
407 }
408 /* Smart Antenna Debug Message------------------ */
409
410 UndecoratedSmoothedCCK = pEntry->rssi_stat.UndecoratedSmoothedCCK;
411 UndecoratedSmoothedOFDM = pEntry->rssi_stat.UndecoratedSmoothedOFDM;
412 UndecoratedSmoothedPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB;
413
414 if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon) {
415 if (!isCCKrate) { /* ofdm rate */
416 if (pPhyInfo->RxMIMOSignalStrength[RF_PATH_B] == 0) {
417 RSSI_Ave = pPhyInfo->RxMIMOSignalStrength[RF_PATH_A];
418 } else {
419 if (pPhyInfo->RxMIMOSignalStrength[RF_PATH_A] > pPhyInfo->RxMIMOSignalStrength[RF_PATH_B]) {
420 RSSI_max = pPhyInfo->RxMIMOSignalStrength[RF_PATH_A];
421 RSSI_min = pPhyInfo->RxMIMOSignalStrength[RF_PATH_B];
422 } else {
423 RSSI_max = pPhyInfo->RxMIMOSignalStrength[RF_PATH_B];
424 RSSI_min = pPhyInfo->RxMIMOSignalStrength[RF_PATH_A];
425 }
426 if ((RSSI_max - RSSI_min) < 3)
427 RSSI_Ave = RSSI_max;
428 else if ((RSSI_max - RSSI_min) < 6)
429 RSSI_Ave = RSSI_max - 1;
430 else if ((RSSI_max - RSSI_min) < 10)
431 RSSI_Ave = RSSI_max - 2;
432 else
433 RSSI_Ave = RSSI_max - 3;
434 }
435
436 /* 1 Process OFDM RSSI */
437 if (UndecoratedSmoothedOFDM <= 0) { /* initialize */
438 UndecoratedSmoothedOFDM = pPhyInfo->RxPWDBAll;
439 } else {
440 if (pPhyInfo->RxPWDBAll > (u32)UndecoratedSmoothedOFDM) {
441 UndecoratedSmoothedOFDM =
442 (((UndecoratedSmoothedOFDM) * (Rx_Smooth_Factor - 1)) +
443 (RSSI_Ave)) / (Rx_Smooth_Factor);
444 UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM + 1;
445 } else {
446 UndecoratedSmoothedOFDM =
447 (((UndecoratedSmoothedOFDM) * (Rx_Smooth_Factor - 1)) +
448 (RSSI_Ave)) / (Rx_Smooth_Factor);
449 }
450 }
451
452 pEntry->rssi_stat.PacketMap = (pEntry->rssi_stat.PacketMap << 1) | BIT(0);
453
454 } else {
455 RSSI_Ave = pPhyInfo->RxPWDBAll;
456
457 /* 1 Process CCK RSSI */
458 if (UndecoratedSmoothedCCK <= 0) { /* initialize */
459 UndecoratedSmoothedCCK = pPhyInfo->RxPWDBAll;
460 } else {
461 if (pPhyInfo->RxPWDBAll > (u32)UndecoratedSmoothedCCK) {
462 UndecoratedSmoothedCCK =
463 ((UndecoratedSmoothedCCK * (Rx_Smooth_Factor - 1)) +
464 pPhyInfo->RxPWDBAll) / Rx_Smooth_Factor;
465 UndecoratedSmoothedCCK = UndecoratedSmoothedCCK + 1;
466 } else {
467 UndecoratedSmoothedCCK =
468 ((UndecoratedSmoothedCCK * (Rx_Smooth_Factor - 1)) +
469 pPhyInfo->RxPWDBAll) / Rx_Smooth_Factor;
470 }
471 }
472 pEntry->rssi_stat.PacketMap = pEntry->rssi_stat.PacketMap << 1;
473 }
474 /* 2011.07.28 LukeLee: modified to prevent unstable CCK RSSI */
475 if (pEntry->rssi_stat.ValidBit >= 64)
476 pEntry->rssi_stat.ValidBit = 64;
477 else
478 pEntry->rssi_stat.ValidBit++;
479
480 for (i = 0; i < pEntry->rssi_stat.ValidBit; i++)
481 OFDM_pkt += (u8)(pEntry->rssi_stat.PacketMap >> i) & BIT(0);
482
483 if (pEntry->rssi_stat.ValidBit == 64) {
484 Weighting = ((OFDM_pkt << 4) > 64) ? 64 : (OFDM_pkt << 4);
485 UndecoratedSmoothedPWDB = (Weighting * UndecoratedSmoothedOFDM + (64 - Weighting) * UndecoratedSmoothedCCK) >> 6;
486 } else {
487 if (pEntry->rssi_stat.ValidBit != 0)
488 UndecoratedSmoothedPWDB = (OFDM_pkt * UndecoratedSmoothedOFDM +
489 (pEntry->rssi_stat.ValidBit - OFDM_pkt) *
490 UndecoratedSmoothedCCK) / pEntry->rssi_stat.ValidBit;
491 else
492 UndecoratedSmoothedPWDB = 0;
493 }
494 pEntry->rssi_stat.UndecoratedSmoothedCCK = UndecoratedSmoothedCCK;
495 pEntry->rssi_stat.UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM;
496 pEntry->rssi_stat.UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;
497 }
498 }
499
500 /* Endianness before calling this API */
ODM_PhyStatusQuery_92CSeries(struct odm_dm_struct * dm_odm,struct odm_phy_status_info * pPhyInfo,u8 * pPhyStatus,struct odm_per_pkt_info * pPktinfo,struct adapter * adapt)501 static void ODM_PhyStatusQuery_92CSeries(struct odm_dm_struct *dm_odm,
502 struct odm_phy_status_info *pPhyInfo,
503 u8 *pPhyStatus,
504 struct odm_per_pkt_info *pPktinfo,
505 struct adapter *adapt)
506 {
507 odm_RxPhyStatus92CSeries_Parsing(dm_odm, pPhyInfo, pPhyStatus,
508 pPktinfo, adapt);
509 if (dm_odm->RSSI_test) {
510 /* Select the packets to do RSSI checking for antenna switching. */
511 if (pPktinfo->bPacketToSelf || pPktinfo->bPacketBeacon)
512 ODM_SwAntDivChkPerPktRssi(dm_odm, pPktinfo->StationID, pPhyInfo);
513 } else {
514 odm_Process_RSSIForDM(dm_odm, pPhyInfo, pPktinfo);
515 }
516 }
517
ODM_PhyStatusQuery(struct odm_dm_struct * dm_odm,struct odm_phy_status_info * pPhyInfo,u8 * pPhyStatus,struct odm_per_pkt_info * pPktinfo,struct adapter * adapt)518 void ODM_PhyStatusQuery(struct odm_dm_struct *dm_odm,
519 struct odm_phy_status_info *pPhyInfo,
520 u8 *pPhyStatus, struct odm_per_pkt_info *pPktinfo,
521 struct adapter *adapt)
522 {
523 ODM_PhyStatusQuery_92CSeries(dm_odm, pPhyInfo, pPhyStatus, pPktinfo, adapt);
524 }
525
526 /* For future use. */
ODM_MacStatusQuery(struct odm_dm_struct * dm_odm,u8 * mac_stat,u8 macid,bool pkt_match_bssid,bool pkttoself,bool pkt_beacon)527 void ODM_MacStatusQuery(struct odm_dm_struct *dm_odm, u8 *mac_stat,
528 u8 macid, bool pkt_match_bssid,
529 bool pkttoself, bool pkt_beacon)
530 {
531 /* 2011/10/19 Driver team will handle in the future. */
532 }
533
ODM_ConfigRFWithHeaderFile(struct odm_dm_struct * dm_odm,enum rf_radio_path content,enum rf_radio_path rfpath)534 enum HAL_STATUS ODM_ConfigRFWithHeaderFile(struct odm_dm_struct *dm_odm,
535 enum rf_radio_path content,
536 enum rf_radio_path rfpath)
537 {
538 if (dm_odm->SupportICType == ODM_RTL8188E) {
539 if (rfpath == RF_PATH_A)
540 READ_AND_CONFIG(8188E, _RadioA_1T_);
541 }
542
543 return HAL_STATUS_SUCCESS;
544 }
545
ODM_ConfigBBWithHeaderFile(struct odm_dm_struct * dm_odm,enum odm_bb_config_type config_tp)546 enum HAL_STATUS ODM_ConfigBBWithHeaderFile(struct odm_dm_struct *dm_odm,
547 enum odm_bb_config_type config_tp)
548 {
549 if (dm_odm->SupportICType == ODM_RTL8188E) {
550 if (config_tp == CONFIG_BB_PHY_REG) {
551 READ_AND_CONFIG(8188E, _PHY_REG_1T_);
552 } else if (config_tp == CONFIG_BB_AGC_TAB) {
553 READ_AND_CONFIG(8188E, _AGC_TAB_1T_);
554 } else if (config_tp == CONFIG_BB_PHY_REG_PG) {
555 READ_AND_CONFIG(8188E, _PHY_REG_PG_);
556 }
557 }
558 return HAL_STATUS_SUCCESS;
559 }
560
ODM_ConfigMACWithHeaderFile(struct odm_dm_struct * dm_odm)561 enum HAL_STATUS ODM_ConfigMACWithHeaderFile(struct odm_dm_struct *dm_odm)
562 {
563 u8 result = HAL_STATUS_SUCCESS;
564 if (dm_odm->SupportICType == ODM_RTL8188E)
565 result = READ_AND_CONFIG(8188E, _MAC_REG_);
566 return result;
567 }
568
