1 // SPDX-License-Identifier: GPL-2.0
2 /******************************************************************************
3 *
4 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
5 *
6 ******************************************************************************/
7
8 #include "odm_precomp.h"
9
10 #define READ_AND_CONFIG_MP(ic, txt) (ODM_ReadAndConfig_MP_##ic##txt(pDM_Odm))
11 #define READ_AND_CONFIG READ_AND_CONFIG_MP
12 #define GET_VERSION_MP(ic, txt) (ODM_GetVersion_MP_##ic##txt())
13 #define GET_VERSION(ic, txt) (pDM_Odm->bIsMPChip?GET_VERSION_MP(ic, txt):GET_VERSION_TC(ic, txt))
14
odm_QueryRxPwrPercentage(s8 AntPower)15 static u8 odm_QueryRxPwrPercentage(s8 AntPower)
16 {
17 if ((AntPower <= -100) || (AntPower >= 20))
18 return 0;
19 else if (AntPower >= 0)
20 return 100;
21 else
22 return (100+AntPower);
23
24 }
25
odm_SignalScaleMapping_92CSeries(PDM_ODM_T pDM_Odm,s32 CurrSig)26 static s32 odm_SignalScaleMapping_92CSeries(PDM_ODM_T pDM_Odm, s32 CurrSig)
27 {
28 s32 RetSig = 0;
29
30 if (pDM_Odm->SupportInterface == ODM_ITRF_SDIO) {
31 if (CurrSig >= 51 && CurrSig <= 100)
32 RetSig = 100;
33 else if (CurrSig >= 41 && CurrSig <= 50)
34 RetSig = 80 + ((CurrSig - 40)*2);
35 else if (CurrSig >= 31 && CurrSig <= 40)
36 RetSig = 66 + (CurrSig - 30);
37 else if (CurrSig >= 21 && CurrSig <= 30)
38 RetSig = 54 + (CurrSig - 20);
39 else if (CurrSig >= 10 && CurrSig <= 20)
40 RetSig = 42 + (((CurrSig - 10) * 2) / 3);
41 else if (CurrSig >= 5 && CurrSig <= 9)
42 RetSig = 22 + (((CurrSig - 5) * 3) / 2);
43 else if (CurrSig >= 1 && CurrSig <= 4)
44 RetSig = 6 + (((CurrSig - 1) * 3) / 2);
45 else
46 RetSig = CurrSig;
47 }
48
49 return RetSig;
50 }
51
odm_SignalScaleMapping(PDM_ODM_T pDM_Odm,s32 CurrSig)52 s32 odm_SignalScaleMapping(PDM_ODM_T pDM_Odm, s32 CurrSig)
53 {
54 return odm_SignalScaleMapping_92CSeries(pDM_Odm, CurrSig);
55 }
56
odm_EVMdbToPercentage(s8 Value)57 static u8 odm_EVMdbToPercentage(s8 Value)
58 {
59 /* */
60 /* -33dB~0dB to 0%~99% */
61 /* */
62 s8 ret_val;
63
64 ret_val = Value;
65 ret_val /= 2;
66
67 /* DbgPrint("Value =%d\n", Value); */
68 /* ODM_RT_DISP(FRX, RX_PHY_SQ, ("EVMdbToPercentage92C Value =%d / %x\n", ret_val, ret_val)); */
69
70 if (ret_val >= 0)
71 ret_val = 0;
72 if (ret_val <= -33)
73 ret_val = -33;
74
75 ret_val = 0 - ret_val;
76 ret_val *= 3;
77
78 if (ret_val == 99)
79 ret_val = 100;
80
81 return ret_val;
82 }
83
odm_RxPhyStatus92CSeries_Parsing(PDM_ODM_T pDM_Odm,struct odm_phy_info * pPhyInfo,u8 * pPhyStatus,struct odm_packet_info * pPktinfo)84 static void odm_RxPhyStatus92CSeries_Parsing(
85 PDM_ODM_T pDM_Odm,
86 struct odm_phy_info *pPhyInfo,
87 u8 *pPhyStatus,
88 struct odm_packet_info *pPktinfo
89 )
90 {
91 u8 i, Max_spatial_stream;
92 s8 rx_pwr[4], rx_pwr_all = 0;
93 u8 EVM, PWDB_ALL = 0, PWDB_ALL_BT;
94 u8 RSSI, total_rssi = 0;
95 bool isCCKrate = false;
96 u8 rf_rx_num = 0;
97 u8 cck_highpwr = 0;
98 u8 LNA_idx, VGA_idx;
99 PPHY_STATUS_RPT_8192CD_T pPhyStaRpt = (PPHY_STATUS_RPT_8192CD_T)pPhyStatus;
100
101 isCCKrate = pPktinfo->data_rate <= DESC_RATE11M;
102 pPhyInfo->rx_mimo_signal_quality[ODM_RF_PATH_A] = -1;
103 pPhyInfo->rx_mimo_signal_quality[ODM_RF_PATH_B] = -1;
104
105
106 if (isCCKrate) {
107 u8 cck_agc_rpt;
108
109 pDM_Odm->PhyDbgInfo.NumQryPhyStatusCCK++;
110 /* */
111 /* (1)Hardware does not provide RSSI for CCK */
112 /* (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) */
113 /* */
114
115 /* if (pHalData->eRFPowerState == eRfOn) */
116 cck_highpwr = pDM_Odm->bCckHighPower;
117 /* else */
118 /* cck_highpwr = false; */
119
120 cck_agc_rpt = pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a ;
121
122 /* 2011.11.28 LukeLee: 88E use different LNA & VGA gain table */
123 /* The RSSI formula should be modified according to the gain table */
124 /* In 88E, cck_highpwr is always set to 1 */
125 LNA_idx = ((cck_agc_rpt & 0xE0)>>5);
126 VGA_idx = (cck_agc_rpt & 0x1F);
127 rx_pwr_all = odm_CCKRSSI_8723B(LNA_idx, VGA_idx);
128 PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
129 if (PWDB_ALL > 100)
130 PWDB_ALL = 100;
131
132 pPhyInfo->rx_pwd_ba11 = PWDB_ALL;
133 pPhyInfo->bt_rx_rssi_percentage = PWDB_ALL;
134 pPhyInfo->recv_signal_power = rx_pwr_all;
135 /* */
136 /* (3) Get Signal Quality (EVM) */
137 /* */
138 /* if (pPktinfo->bPacketMatchBSSID) */
139 {
140 u8 SQ, SQ_rpt;
141
142 if (pPhyInfo->rx_pwd_ba11 > 40 && !pDM_Odm->bInHctTest)
143 SQ = 100;
144 else {
145 SQ_rpt = pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all;
146
147 if (SQ_rpt > 64)
148 SQ = 0;
149 else if (SQ_rpt < 20)
150 SQ = 100;
151 else
152 SQ = ((64-SQ_rpt) * 100) / 44;
153
154 }
155
156 /* DbgPrint("cck SQ = %d\n", SQ); */
157 pPhyInfo->signal_quality = SQ;
158 pPhyInfo->rx_mimo_signal_quality[ODM_RF_PATH_A] = SQ;
159 pPhyInfo->rx_mimo_signal_quality[ODM_RF_PATH_B] = -1;
160 }
161 } else { /* is OFDM rate */
162 pDM_Odm->PhyDbgInfo.NumQryPhyStatusOFDM++;
163
164 /* */
165 /* (1)Get RSSI for HT rate */
166 /* */
167
168 for (i = ODM_RF_PATH_A; i < ODM_RF_PATH_MAX; i++) {
169 /* 2008/01/30 MH we will judge RF RX path now. */
170 if (pDM_Odm->RFPathRxEnable & BIT(i))
171 rf_rx_num++;
172 /* else */
173 /* continue; */
174
175 rx_pwr[i] = ((pPhyStaRpt->path_agc[i].gain&0x3F)*2) - 110;
176
177
178 pPhyInfo->rx_pwr[i] = rx_pwr[i];
179
180 /* Translate DBM to percentage. */
181 RSSI = odm_QueryRxPwrPercentage(rx_pwr[i]);
182 total_rssi += RSSI;
183 /* RT_DISP(FRX, RX_PHY_SS, ("RF-%d RXPWR =%x RSSI =%d\n", i, rx_pwr[i], RSSI)); */
184
185 pPhyInfo->rx_mimo_signal_strength[i] = (u8) RSSI;
186
187 /* Get Rx snr value in DB */
188 pPhyInfo->rx_snr[i] = pDM_Odm->PhyDbgInfo.RxSNRdB[i] = (s32)(pPhyStaRpt->path_rxsnr[i]/2);
189 }
190
191
192 /* */
193 /* (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) */
194 /* */
195 rx_pwr_all = (((pPhyStaRpt->cck_sig_qual_ofdm_pwdb_all) >> 1)&0x7f)-110;
196
197 PWDB_ALL_BT = PWDB_ALL = odm_QueryRxPwrPercentage(rx_pwr_all);
198 /* RT_DISP(FRX, RX_PHY_SS, ("PWDB_ALL =%d\n", PWDB_ALL)); */
199
200 pPhyInfo->rx_pwd_ba11 = PWDB_ALL;
201 /* ODM_RT_TRACE(pDM_Odm, ODM_COMP_RSSI_MONITOR, ODM_DBG_LOUD, ("ODM OFDM RSSI =%d\n", pPhyInfo->rx_pwd_ba11)); */
202 pPhyInfo->bt_rx_rssi_percentage = PWDB_ALL_BT;
203 pPhyInfo->rx_power = rx_pwr_all;
204 pPhyInfo->recv_signal_power = rx_pwr_all;
205
206 {/* pMgntInfo->CustomerID != RT_CID_819x_Lenovo */
207 /* */
208 /* (3)EVM of HT rate */
209 /* */
210 if (pPktinfo->data_rate >= DESC_RATEMCS8 && pPktinfo->data_rate <= DESC_RATEMCS15)
211 Max_spatial_stream = 2; /* both spatial stream make sense */
212 else
213 Max_spatial_stream = 1; /* only spatial stream 1 makes sense */
214
215 for (i = 0; i < Max_spatial_stream; i++) {
216 /* Do not use shift operation like "rx_evmX >>= 1" because the compilor of free build environment */
217 /* fill most significant bit to "zero" when doing shifting operation which may change a negative */
218 /* value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore. */
219 EVM = odm_EVMdbToPercentage((pPhyStaRpt->stream_rxevm[i])); /* dbm */
220
221 /* RT_DISP(FRX, RX_PHY_SQ, ("RXRATE =%x RXEVM =%x EVM =%s%d\n", */
222 /* GET_RX_STATUS_DESC_RX_MCS(pDesc), pDrvInfo->rxevm[i], "%", EVM)); */
223
224 /* if (pPktinfo->bPacketMatchBSSID) */
225 {
226 if (i == ODM_RF_PATH_A) /* Fill value in RFD, Get the first spatial stream only */
227 pPhyInfo->signal_quality = (u8)(EVM & 0xff);
228
229 pPhyInfo->rx_mimo_signal_quality[i] = (u8)(EVM & 0xff);
230 }
231 }
232 }
233
234 ODM_ParsingCFO(pDM_Odm, pPktinfo, pPhyStaRpt->path_cfotail);
235
236 }
237
238 /* UI BSS List signal strength(in percentage), make it good looking, from 0~100. */
239 /* It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp(). */
240 if (isCCKrate) {
241 #ifdef CONFIG_SKIP_SIGNAL_SCALE_MAPPING
242 pPhyInfo->SignalStrength = (u8)PWDB_ALL;
243 #else
244 pPhyInfo->signal_strength = (u8)(odm_SignalScaleMapping(pDM_Odm, PWDB_ALL));/* PWDB_ALL; */
245 #endif
246 } else {
247 if (rf_rx_num != 0) {
248 #ifdef CONFIG_SKIP_SIGNAL_SCALE_MAPPING
249 total_rssi /= rf_rx_num;
250 pPhyInfo->signal_strength = (u8)total_rssi;
251 #else
252 pPhyInfo->signal_strength = (u8)(odm_SignalScaleMapping(pDM_Odm, total_rssi /= rf_rx_num));
253 #endif
254 }
255 }
256
257 /* DbgPrint("isCCKrate = %d, pPhyInfo->rx_pwd_ba11 = %d, pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a = 0x%x\n", */
258 /* isCCKrate, pPhyInfo->rx_pwd_ba11, pPhyStaRpt->cck_agc_rpt_ofdm_cfosho_a); */
259 }
260
odm_Process_RSSIForDM(PDM_ODM_T pDM_Odm,struct odm_phy_info * pPhyInfo,struct odm_packet_info * pPktinfo)261 static void odm_Process_RSSIForDM(
262 PDM_ODM_T pDM_Odm, struct odm_phy_info *pPhyInfo, struct odm_packet_info *pPktinfo
263 )
264 {
265
266 s32 UndecoratedSmoothedPWDB, UndecoratedSmoothedCCK, UndecoratedSmoothedOFDM, RSSI_Ave;
267 u8 isCCKrate = 0;
268 u8 RSSI_max, RSSI_min, i;
269 u32 OFDM_pkt = 0;
270 u32 Weighting = 0;
271 PSTA_INFO_T pEntry;
272
273
274 if (pPktinfo->station_id == 0xFF)
275 return;
276
277 pEntry = pDM_Odm->pODM_StaInfo[pPktinfo->station_id];
278
279 if (!IS_STA_VALID(pEntry))
280 return;
281
282 if ((!pPktinfo->bssid_match))
283 return;
284
285 if (pPktinfo->is_beacon)
286 pDM_Odm->PhyDbgInfo.NumQryBeaconPkt++;
287
288 isCCKrate = ((pPktinfo->data_rate <= DESC_RATE11M)) ? true : false;
289 pDM_Odm->RxRate = pPktinfo->data_rate;
290
291 /* Statistic for antenna/path diversity------------------ */
292 if (pDM_Odm->SupportAbility & ODM_BB_ANT_DIV) {
293
294 }
295
296 /* Smart Antenna Debug Message------------------ */
297
298 UndecoratedSmoothedCCK = pEntry->rssi_stat.UndecoratedSmoothedCCK;
299 UndecoratedSmoothedOFDM = pEntry->rssi_stat.UndecoratedSmoothedOFDM;
300 UndecoratedSmoothedPWDB = pEntry->rssi_stat.UndecoratedSmoothedPWDB;
301
302 if (pPktinfo->to_self || pPktinfo->is_beacon) {
303
304 if (!isCCKrate) { /* ofdm rate */
305 if (pPhyInfo->rx_mimo_signal_strength[ODM_RF_PATH_B] == 0) {
306 RSSI_Ave = pPhyInfo->rx_mimo_signal_strength[ODM_RF_PATH_A];
307 pDM_Odm->RSSI_A = pPhyInfo->rx_mimo_signal_strength[ODM_RF_PATH_A];
308 pDM_Odm->RSSI_B = 0;
309 } else {
310 /* DbgPrint("pRfd->Status.rx_mimo_signal_strength[0] = %d, pRfd->Status.rx_mimo_signal_strength[1] = %d\n", */
311 /* pRfd->Status.rx_mimo_signal_strength[0], pRfd->Status.rx_mimo_signal_strength[1]); */
312 pDM_Odm->RSSI_A = pPhyInfo->rx_mimo_signal_strength[ODM_RF_PATH_A];
313 pDM_Odm->RSSI_B = pPhyInfo->rx_mimo_signal_strength[ODM_RF_PATH_B];
314
315 if (
316 pPhyInfo->rx_mimo_signal_strength[ODM_RF_PATH_A] >
317 pPhyInfo->rx_mimo_signal_strength[ODM_RF_PATH_B]
318 ) {
319 RSSI_max = pPhyInfo->rx_mimo_signal_strength[ODM_RF_PATH_A];
320 RSSI_min = pPhyInfo->rx_mimo_signal_strength[ODM_RF_PATH_B];
321 } else {
322 RSSI_max = pPhyInfo->rx_mimo_signal_strength[ODM_RF_PATH_B];
323 RSSI_min = pPhyInfo->rx_mimo_signal_strength[ODM_RF_PATH_A];
324 }
325
326 if ((RSSI_max-RSSI_min) < 3)
327 RSSI_Ave = RSSI_max;
328 else if ((RSSI_max-RSSI_min) < 6)
329 RSSI_Ave = RSSI_max - 1;
330 else if ((RSSI_max-RSSI_min) < 10)
331 RSSI_Ave = RSSI_max - 2;
332 else
333 RSSI_Ave = RSSI_max - 3;
334 }
335
336 /* 1 Process OFDM RSSI */
337 if (UndecoratedSmoothedOFDM <= 0) /* initialize */
338 UndecoratedSmoothedOFDM = pPhyInfo->rx_pwd_ba11;
339 else {
340 if (pPhyInfo->rx_pwd_ba11 > (u32)UndecoratedSmoothedOFDM) {
341 UndecoratedSmoothedOFDM =
342 ((UndecoratedSmoothedOFDM*(Rx_Smooth_Factor-1)) +
343 RSSI_Ave)/Rx_Smooth_Factor;
344 UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM + 1;
345 } else {
346 UndecoratedSmoothedOFDM =
347 ((UndecoratedSmoothedOFDM*(Rx_Smooth_Factor-1)) +
348 RSSI_Ave)/Rx_Smooth_Factor;
349 }
350 }
351
352 pEntry->rssi_stat.PacketMap = (pEntry->rssi_stat.PacketMap<<1) | BIT0;
353
354 } else {
355 RSSI_Ave = pPhyInfo->rx_pwd_ba11;
356 pDM_Odm->RSSI_A = (u8) pPhyInfo->rx_pwd_ba11;
357 pDM_Odm->RSSI_B = 0;
358
359 /* 1 Process CCK RSSI */
360 if (UndecoratedSmoothedCCK <= 0) /* initialize */
361 UndecoratedSmoothedCCK = pPhyInfo->rx_pwd_ba11;
362 else {
363 if (pPhyInfo->rx_pwd_ba11 > (u32)UndecoratedSmoothedCCK) {
364 UndecoratedSmoothedCCK =
365 ((UndecoratedSmoothedCCK*(Rx_Smooth_Factor-1)) +
366 pPhyInfo->rx_pwd_ba11)/Rx_Smooth_Factor;
367 UndecoratedSmoothedCCK = UndecoratedSmoothedCCK + 1;
368 } else {
369 UndecoratedSmoothedCCK =
370 ((UndecoratedSmoothedCCK*(Rx_Smooth_Factor-1)) +
371 pPhyInfo->rx_pwd_ba11)/Rx_Smooth_Factor;
372 }
373 }
374 pEntry->rssi_stat.PacketMap = pEntry->rssi_stat.PacketMap<<1;
375 }
376
377 /* if (pEntry) */
378 {
379 /* 2011.07.28 LukeLee: modified to prevent unstable CCK RSSI */
380 if (pEntry->rssi_stat.ValidBit >= 64)
381 pEntry->rssi_stat.ValidBit = 64;
382 else
383 pEntry->rssi_stat.ValidBit++;
384
385 for (i = 0; i < pEntry->rssi_stat.ValidBit; i++)
386 OFDM_pkt += (u8)(pEntry->rssi_stat.PacketMap>>i)&BIT0;
387
388 if (pEntry->rssi_stat.ValidBit == 64) {
389 Weighting = ((OFDM_pkt<<4) > 64)?64:(OFDM_pkt<<4);
390 UndecoratedSmoothedPWDB = (Weighting*UndecoratedSmoothedOFDM+(64-Weighting)*UndecoratedSmoothedCCK)>>6;
391 } else {
392 if (pEntry->rssi_stat.ValidBit != 0)
393 UndecoratedSmoothedPWDB = (OFDM_pkt*UndecoratedSmoothedOFDM+(pEntry->rssi_stat.ValidBit-OFDM_pkt)*UndecoratedSmoothedCCK)/pEntry->rssi_stat.ValidBit;
394 else
395 UndecoratedSmoothedPWDB = 0;
396 }
397
398 pEntry->rssi_stat.UndecoratedSmoothedCCK = UndecoratedSmoothedCCK;
399 pEntry->rssi_stat.UndecoratedSmoothedOFDM = UndecoratedSmoothedOFDM;
400 pEntry->rssi_stat.UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;
401
402 /* DbgPrint("OFDM_pkt =%d, Weighting =%d\n", OFDM_pkt, Weighting); */
403 /* DbgPrint("UndecoratedSmoothedOFDM =%d, UndecoratedSmoothedPWDB =%d, UndecoratedSmoothedCCK =%d\n", */
404 /* UndecoratedSmoothedOFDM, UndecoratedSmoothedPWDB, UndecoratedSmoothedCCK); */
405
406 }
407
408 }
409 }
410
411
412 /* */
413 /* Endianness before calling this API */
414 /* */
ODM_PhyStatusQuery_92CSeries(PDM_ODM_T pDM_Odm,struct odm_phy_info * pPhyInfo,u8 * pPhyStatus,struct odm_packet_info * pPktinfo)415 static void ODM_PhyStatusQuery_92CSeries(
416 PDM_ODM_T pDM_Odm,
417 struct odm_phy_info *pPhyInfo,
418 u8 *pPhyStatus,
419 struct odm_packet_info *pPktinfo
420 )
421 {
422
423 odm_RxPhyStatus92CSeries_Parsing(pDM_Odm, pPhyInfo, pPhyStatus, pPktinfo);
424
425 if (!pDM_Odm->RSSI_test)
426 odm_Process_RSSIForDM(pDM_Odm, pPhyInfo, pPktinfo);
427 }
428
ODM_PhyStatusQuery(PDM_ODM_T pDM_Odm,struct odm_phy_info * pPhyInfo,u8 * pPhyStatus,struct odm_packet_info * pPktinfo)429 void ODM_PhyStatusQuery(
430 PDM_ODM_T pDM_Odm,
431 struct odm_phy_info *pPhyInfo,
432 u8 *pPhyStatus,
433 struct odm_packet_info *pPktinfo
434 )
435 {
436
437 ODM_PhyStatusQuery_92CSeries(pDM_Odm, pPhyInfo, pPhyStatus, pPktinfo);
438 }
439
440 /* */
441 /* If you want to add a new IC, Please follow below template and generate a new one. */
442 /* */
443 /* */
444
ODM_ConfigRFWithHeaderFile(PDM_ODM_T pDM_Odm,ODM_RF_Config_Type ConfigType,ODM_RF_RADIO_PATH_E eRFPath)445 HAL_STATUS ODM_ConfigRFWithHeaderFile(
446 PDM_ODM_T pDM_Odm,
447 ODM_RF_Config_Type ConfigType,
448 ODM_RF_RADIO_PATH_E eRFPath
449 )
450 {
451 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD,
452 ("===>ODM_ConfigRFWithHeaderFile (%s)\n", (pDM_Odm->bIsMPChip) ? "MPChip" : "TestChip"));
453 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD,
454 ("pDM_Odm->SupportPlatform: 0x%X, pDM_Odm->SupportInterface: 0x%X, pDM_Odm->BoardType: 0x%X\n",
455 pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface, pDM_Odm->BoardType));
456
457 if (ConfigType == CONFIG_RF_RADIO)
458 READ_AND_CONFIG(8723B, _RadioA);
459 else if (ConfigType == CONFIG_RF_TXPWR_LMT)
460 READ_AND_CONFIG(8723B, _TXPWR_LMT);
461
462 return HAL_STATUS_SUCCESS;
463 }
464
ODM_ConfigRFWithTxPwrTrackHeaderFile(PDM_ODM_T pDM_Odm)465 HAL_STATUS ODM_ConfigRFWithTxPwrTrackHeaderFile(PDM_ODM_T pDM_Odm)
466 {
467 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD,
468 ("===>ODM_ConfigRFWithTxPwrTrackHeaderFile (%s)\n", (pDM_Odm->bIsMPChip) ? "MPChip" : "TestChip"));
469 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD,
470 ("pDM_Odm->SupportPlatform: 0x%X, pDM_Odm->SupportInterface: 0x%X, pDM_Odm->BoardType: 0x%X\n",
471 pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface, pDM_Odm->BoardType));
472
473 if (pDM_Odm->SupportInterface == ODM_ITRF_SDIO)
474 READ_AND_CONFIG(8723B, _TxPowerTrack_SDIO);
475
476 return HAL_STATUS_SUCCESS;
477 }
478
ODM_ConfigBBWithHeaderFile(PDM_ODM_T pDM_Odm,ODM_BB_Config_Type ConfigType)479 HAL_STATUS ODM_ConfigBBWithHeaderFile(
480 PDM_ODM_T pDM_Odm, ODM_BB_Config_Type ConfigType
481 )
482 {
483 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD,
484 ("===>ODM_ConfigBBWithHeaderFile (%s)\n", (pDM_Odm->bIsMPChip) ? "MPChip" : "TestChip"));
485 ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD,
486 ("pDM_Odm->SupportPlatform: 0x%X, pDM_Odm->SupportInterface: 0x%X, pDM_Odm->BoardType: 0x%X\n",
487 pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface, pDM_Odm->BoardType));
488
489 if (ConfigType == CONFIG_BB_PHY_REG)
490 READ_AND_CONFIG(8723B, _PHY_REG);
491 else if (ConfigType == CONFIG_BB_AGC_TAB)
492 READ_AND_CONFIG(8723B, _AGC_TAB);
493 else if (ConfigType == CONFIG_BB_PHY_REG_PG)
494 READ_AND_CONFIG(8723B, _PHY_REG_PG);
495
496 return HAL_STATUS_SUCCESS;
497 }
498
ODM_ConfigMACWithHeaderFile(PDM_ODM_T pDM_Odm)499 HAL_STATUS ODM_ConfigMACWithHeaderFile(PDM_ODM_T pDM_Odm)
500 {
501 u8 result = HAL_STATUS_SUCCESS;
502
503 ODM_RT_TRACE(
504 pDM_Odm,
505 ODM_COMP_INIT,
506 ODM_DBG_LOUD,
507 (
508 "===>ODM_ConfigMACWithHeaderFile (%s)\n",
509 (pDM_Odm->bIsMPChip) ? "MPChip" : "TestChip"
510 )
511 );
512 ODM_RT_TRACE(
513 pDM_Odm,
514 ODM_COMP_INIT,
515 ODM_DBG_LOUD,
516 (
517 "pDM_Odm->SupportPlatform: 0x%X, pDM_Odm->SupportInterface: 0x%X, pDM_Odm->BoardType: 0x%X\n",
518 pDM_Odm->SupportPlatform,
519 pDM_Odm->SupportInterface,
520 pDM_Odm->BoardType
521 )
522 );
523
524 READ_AND_CONFIG(8723B, _MAC_REG);
525
526 return result;
527 }
528
