1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3  * ELF register definitions..
4  */
5 #ifndef _ASM_POWERPC_ELF_H
6 #define _ASM_POWERPC_ELF_H
7 
8 #include <linux/sched.h>	/* for task_struct */
9 #include <asm/page.h>
10 #include <asm/string.h>
11 #include <uapi/asm/elf.h>
12 
13 /*
14  * This is used to ensure we don't load something for the wrong architecture.
15  */
16 #define elf_check_arch(x) ((x)->e_machine == ELF_ARCH)
17 #define compat_elf_check_arch(x)	((x)->e_machine == EM_PPC)
18 
19 #define CORE_DUMP_USE_REGSET
20 #define ELF_EXEC_PAGESIZE	PAGE_SIZE
21 
22 /*
23  * This is the base location for PIE (ET_DYN with INTERP) loads. On
24  * 64-bit, this is raised to 4GB to leave the entire 32-bit address
25  * space open for things that want to use the area for 32-bit pointers.
26  */
27 #define ELF_ET_DYN_BASE		(is_32bit_task() ? 0x000400000UL : \
28 						   0x100000000UL)
29 
30 #define ELF_CORE_EFLAGS (is_elf2_task() ? 2 : 0)
31 
32 /*
33  * Our registers are always unsigned longs, whether we're a 32 bit
34  * process or 64 bit, on either a 64 bit or 32 bit kernel.
35  *
36  * This macro relies on elf_regs[i] having the right type to truncate to,
37  * either u32 or u64.  It defines the body of the elf_core_copy_regs
38  * function, either the native one with elf_gregset_t elf_regs or
39  * the 32-bit one with elf_gregset_t32 elf_regs.
40  */
41 #define PPC_ELF_CORE_COPY_REGS(elf_regs, regs) \
42 	int i, nregs = min(sizeof(*regs) / sizeof(unsigned long), \
43 			   (size_t)ELF_NGREG);			  \
44 	for (i = 0; i < nregs; i++) \
45 		elf_regs[i] = ((unsigned long *) regs)[i]; \
46 	memset(&elf_regs[i], 0, (ELF_NGREG - i) * sizeof(elf_regs[0]))
47 
48 /* Common routine for both 32-bit and 64-bit native processes */
ppc_elf_core_copy_regs(elf_gregset_t elf_regs,struct pt_regs * regs)49 static inline void ppc_elf_core_copy_regs(elf_gregset_t elf_regs,
50 					  struct pt_regs *regs)
51 {
52 	PPC_ELF_CORE_COPY_REGS(elf_regs, regs);
53 }
54 #define ELF_CORE_COPY_REGS(gregs, regs) ppc_elf_core_copy_regs(gregs, regs);
55 
56 typedef elf_vrregset_t elf_fpxregset_t;
57 
58 /* ELF_HWCAP yields a mask that user programs can use to figure out what
59    instruction set this cpu supports.  This could be done in userspace,
60    but it's not easy, and we've already done it here.  */
61 # define ELF_HWCAP	(cur_cpu_spec->cpu_user_features)
62 # define ELF_HWCAP2	(cur_cpu_spec->cpu_user_features2)
63 
64 /* This yields a string that ld.so will use to load implementation
65    specific libraries for optimization.  This is more specific in
66    intent than poking at uname or /proc/cpuinfo.  */
67 
68 #define ELF_PLATFORM	(cur_cpu_spec->platform)
69 
70 /* While ELF_PLATFORM indicates the ISA supported by the platform, it
71  * may not accurately reflect the underlying behavior of the hardware
72  * (as in the case of running in Power5+ compatibility mode on a
73  * Power6 machine).  ELF_BASE_PLATFORM allows ld.so to load libraries
74  * that are tuned for the real hardware.
75  */
76 #define ELF_BASE_PLATFORM (powerpc_base_platform)
77 
78 #ifdef __powerpc64__
79 # define ELF_PLAT_INIT(_r, load_addr)	do {	\
80 	_r->gpr[2] = load_addr; 		\
81 } while (0)
82 #endif /* __powerpc64__ */
83 
84 #ifdef __powerpc64__
85 # define SET_PERSONALITY(ex)					\
86 do {								\
87 	if (((ex).e_flags & 0x3) == 2)				\
88 		set_thread_flag(TIF_ELF2ABI);			\
89 	else							\
90 		clear_thread_flag(TIF_ELF2ABI);			\
91 	if ((ex).e_ident[EI_CLASS] == ELFCLASS32)		\
92 		set_thread_flag(TIF_32BIT);			\
93 	else							\
94 		clear_thread_flag(TIF_32BIT);			\
95 	if (personality(current->personality) != PER_LINUX32)	\
96 		set_personality(PER_LINUX |			\
97 			(current->personality & (~PER_MASK)));	\
98 } while (0)
99 /*
100  * An executable for which elf_read_implies_exec() returns TRUE will
101  * have the READ_IMPLIES_EXEC personality flag set automatically. This
102  * is only required to work around bugs in old 32bit toolchains. Since
103  * the 64bit ABI has never had these issues dont enable the workaround
104  * even if we have an executable stack.
105  */
106 # define elf_read_implies_exec(ex, exec_stk) (is_32bit_task() ? \
107 		(exec_stk == EXSTACK_DEFAULT) : 0)
108 #else
109 # define elf_read_implies_exec(ex, exec_stk) (exec_stk == EXSTACK_DEFAULT)
110 #endif /* __powerpc64__ */
111 
112 extern int dcache_bsize;
113 extern int icache_bsize;
114 extern int ucache_bsize;
115 
116 /* vDSO has arch_setup_additional_pages */
117 #define ARCH_HAS_SETUP_ADDITIONAL_PAGES
118 struct linux_binprm;
119 extern int arch_setup_additional_pages(struct linux_binprm *bprm,
120 				       int uses_interp);
121 #define VDSO_AUX_ENT(a,b) NEW_AUX_ENT(a,b)
122 
123 /* 1GB for 64bit, 8MB for 32bit */
124 #define STACK_RND_MASK (is_32bit_task() ? \
125 	(0x7ff >> (PAGE_SHIFT - 12)) : \
126 	(0x3ffff >> (PAGE_SHIFT - 12)))
127 
128 #ifdef CONFIG_SPU_BASE
129 /* Notes used in ET_CORE. Note name is "SPU/<fd>/<filename>". */
130 #define NT_SPU		1
131 
132 #define ARCH_HAVE_EXTRA_ELF_NOTES
133 
134 #endif /* CONFIG_SPU_BASE */
135 
136 #ifdef CONFIG_PPC64
137 
138 #define get_cache_geometry(level) \
139 	(ppc64_caches.level.assoc << 16 | ppc64_caches.level.line_size)
140 
141 #define ARCH_DLINFO_CACHE_GEOMETRY					\
142 	NEW_AUX_ENT(AT_L1I_CACHESIZE, ppc64_caches.l1i.size);		\
143 	NEW_AUX_ENT(AT_L1I_CACHEGEOMETRY, get_cache_geometry(l1i));	\
144 	NEW_AUX_ENT(AT_L1D_CACHESIZE, ppc64_caches.l1d.size);		\
145 	NEW_AUX_ENT(AT_L1D_CACHEGEOMETRY, get_cache_geometry(l1d));	\
146 	NEW_AUX_ENT(AT_L2_CACHESIZE, ppc64_caches.l2.size);		\
147 	NEW_AUX_ENT(AT_L2_CACHEGEOMETRY, get_cache_geometry(l2));	\
148 	NEW_AUX_ENT(AT_L3_CACHESIZE, ppc64_caches.l3.size);		\
149 	NEW_AUX_ENT(AT_L3_CACHEGEOMETRY, get_cache_geometry(l3))
150 
151 #else
152 #define ARCH_DLINFO_CACHE_GEOMETRY
153 #endif
154 
155 /*
156  * The requirements here are:
157  * - keep the final alignment of sp (sp & 0xf)
158  * - make sure the 32-bit value at the first 16 byte aligned position of
159  *   AUXV is greater than 16 for glibc compatibility.
160  *   AT_IGNOREPPC is used for that.
161  * - for compatibility with glibc ARCH_DLINFO must always be defined on PPC,
162  *   even if DLINFO_ARCH_ITEMS goes to zero or is undefined.
163  * update AT_VECTOR_SIZE_ARCH if the number of NEW_AUX_ENT entries changes
164  */
165 #define ARCH_DLINFO							\
166 do {									\
167 	/* Handle glibc compatibility. */				\
168 	NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC);			\
169 	NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC);			\
170 	/* Cache size items */						\
171 	NEW_AUX_ENT(AT_DCACHEBSIZE, dcache_bsize);			\
172 	NEW_AUX_ENT(AT_ICACHEBSIZE, icache_bsize);			\
173 	NEW_AUX_ENT(AT_UCACHEBSIZE, ucache_bsize);			\
174 	VDSO_AUX_ENT(AT_SYSINFO_EHDR, current->mm->context.vdso_base);	\
175 	ARCH_DLINFO_CACHE_GEOMETRY;					\
176 } while (0)
177 
178 /* Relocate the kernel image to @final_address */
179 void relocate(unsigned long final_address);
180 
181 #endif /* _ASM_POWERPC_ELF_H */
182