1 /*
2 * smp.h: PowerPC-specific SMP code.
3 *
4 * Original was a copy of sparc smp.h. Now heavily modified
5 * for PPC.
6 *
7 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
8 * Copyright (C) 1996-2001 Cort Dougan <cort@fsmlabs.com>
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version
13 * 2 of the License, or (at your option) any later version.
14 */
15
16 #ifndef _ASM_POWERPC_SMP_H
17 #define _ASM_POWERPC_SMP_H
18 #ifdef __KERNEL__
19
20 #include <linux/threads.h>
21 #include <linux/cpumask.h>
22 #include <linux/kernel.h>
23 #include <linux/irqreturn.h>
24
25 #ifndef __ASSEMBLY__
26
27 #ifdef CONFIG_PPC64
28 #include <asm/paca.h>
29 #endif
30 #include <asm/percpu.h>
31
32 extern int boot_cpuid;
33 extern int spinning_secondaries;
34 extern u32 *cpu_to_phys_id;
35
36 extern void cpu_die(void);
37 extern int cpu_to_chip_id(int cpu);
38
39 #ifdef CONFIG_SMP
40
41 struct smp_ops_t {
42 void (*message_pass)(int cpu, int msg);
43 #ifdef CONFIG_PPC_SMP_MUXED_IPI
44 void (*cause_ipi)(int cpu);
45 #endif
46 int (*cause_nmi_ipi)(int cpu);
47 void (*probe)(void);
48 int (*kick_cpu)(int nr);
49 int (*prepare_cpu)(int nr);
50 void (*setup_cpu)(int nr);
51 void (*bringup_done)(void);
52 void (*take_timebase)(void);
53 void (*give_timebase)(void);
54 int (*cpu_disable)(void);
55 void (*cpu_die)(unsigned int nr);
56 int (*cpu_bootable)(unsigned int nr);
57 };
58
59 extern int smp_send_nmi_ipi(int cpu, void (*fn)(struct pt_regs *), u64 delay_us);
60 extern int smp_send_safe_nmi_ipi(int cpu, void (*fn)(struct pt_regs *), u64 delay_us);
61 extern void smp_send_debugger_break(void);
62 extern void start_secondary_resume(void);
63 extern void smp_generic_give_timebase(void);
64 extern void smp_generic_take_timebase(void);
65
66 DECLARE_PER_CPU(unsigned int, cpu_pvr);
67
68 #ifdef CONFIG_HOTPLUG_CPU
69 int generic_cpu_disable(void);
70 void generic_cpu_die(unsigned int cpu);
71 void generic_set_cpu_dead(unsigned int cpu);
72 void generic_set_cpu_up(unsigned int cpu);
73 int generic_check_cpu_restart(unsigned int cpu);
74 int is_cpu_dead(unsigned int cpu);
75 #else
76 #define generic_set_cpu_up(i) do { } while (0)
77 #endif
78
79 #ifdef CONFIG_PPC64
80 #define raw_smp_processor_id() (local_paca->paca_index)
81 #define hard_smp_processor_id() (get_paca()->hw_cpu_id)
82 #else
83 /* 32-bit */
84 extern int smp_hw_index[];
85
86 #define raw_smp_processor_id() (current_thread_info()->cpu)
87 #define hard_smp_processor_id() (smp_hw_index[smp_processor_id()])
88
get_hard_smp_processor_id(int cpu)89 static inline int get_hard_smp_processor_id(int cpu)
90 {
91 return smp_hw_index[cpu];
92 }
93
set_hard_smp_processor_id(int cpu,int phys)94 static inline void set_hard_smp_processor_id(int cpu, int phys)
95 {
96 smp_hw_index[cpu] = phys;
97 }
98 #endif
99
100 DECLARE_PER_CPU(cpumask_var_t, cpu_sibling_map);
101 DECLARE_PER_CPU(cpumask_var_t, cpu_l2_cache_map);
102 DECLARE_PER_CPU(cpumask_var_t, cpu_core_map);
103
cpu_sibling_mask(int cpu)104 static inline struct cpumask *cpu_sibling_mask(int cpu)
105 {
106 return per_cpu(cpu_sibling_map, cpu);
107 }
108
cpu_core_mask(int cpu)109 static inline struct cpumask *cpu_core_mask(int cpu)
110 {
111 return per_cpu(cpu_core_map, cpu);
112 }
113
cpu_l2_cache_mask(int cpu)114 static inline struct cpumask *cpu_l2_cache_mask(int cpu)
115 {
116 return per_cpu(cpu_l2_cache_map, cpu);
117 }
118
119 extern int cpu_to_core_id(int cpu);
120
121 /* Since OpenPIC has only 4 IPIs, we use slightly different message numbers.
122 *
123 * Make sure this matches openpic_request_IPIs in open_pic.c, or what shows up
124 * in /proc/interrupts will be wrong!!! --Troy */
125 #define PPC_MSG_CALL_FUNCTION 0
126 #define PPC_MSG_RESCHEDULE 1
127 #define PPC_MSG_TICK_BROADCAST 2
128 #define PPC_MSG_NMI_IPI 3
129
130 /* This is only used by the powernv kernel */
131 #define PPC_MSG_RM_HOST_ACTION 4
132
133 #define NMI_IPI_ALL_OTHERS -2
134
135 #ifdef CONFIG_NMI_IPI
136 extern int smp_handle_nmi_ipi(struct pt_regs *regs);
137 #else
smp_handle_nmi_ipi(struct pt_regs * regs)138 static inline int smp_handle_nmi_ipi(struct pt_regs *regs) { return 0; }
139 #endif
140
141 /* for irq controllers that have dedicated ipis per message (4) */
142 extern int smp_request_message_ipi(int virq, int message);
143 extern const char *smp_ipi_name[];
144
145 /* for irq controllers with only a single ipi */
146 extern void smp_muxed_ipi_message_pass(int cpu, int msg);
147 extern void smp_muxed_ipi_set_message(int cpu, int msg);
148 extern irqreturn_t smp_ipi_demux(void);
149 extern irqreturn_t smp_ipi_demux_relaxed(void);
150
151 void smp_init_pSeries(void);
152 void smp_init_cell(void);
153 void smp_setup_cpu_maps(void);
154
155 extern int __cpu_disable(void);
156 extern void __cpu_die(unsigned int cpu);
157
158 #else
159 /* for UP */
160 #define hard_smp_processor_id() get_hard_smp_processor_id(0)
161 #define smp_setup_cpu_maps()
inhibit_secondary_onlining(void)162 static inline void inhibit_secondary_onlining(void) {}
uninhibit_secondary_onlining(void)163 static inline void uninhibit_secondary_onlining(void) {}
cpu_sibling_mask(int cpu)164 static inline const struct cpumask *cpu_sibling_mask(int cpu)
165 {
166 return cpumask_of(cpu);
167 }
168
169 #endif /* CONFIG_SMP */
170
171 #ifdef CONFIG_PPC64
get_hard_smp_processor_id(int cpu)172 static inline int get_hard_smp_processor_id(int cpu)
173 {
174 return paca_ptrs[cpu]->hw_cpu_id;
175 }
176
set_hard_smp_processor_id(int cpu,int phys)177 static inline void set_hard_smp_processor_id(int cpu, int phys)
178 {
179 paca_ptrs[cpu]->hw_cpu_id = phys;
180 }
181 #else
182 /* 32-bit */
183 #ifndef CONFIG_SMP
184 extern int boot_cpuid_phys;
get_hard_smp_processor_id(int cpu)185 static inline int get_hard_smp_processor_id(int cpu)
186 {
187 return boot_cpuid_phys;
188 }
189
set_hard_smp_processor_id(int cpu,int phys)190 static inline void set_hard_smp_processor_id(int cpu, int phys)
191 {
192 boot_cpuid_phys = phys;
193 }
194 #endif /* !CONFIG_SMP */
195 #endif /* !CONFIG_PPC64 */
196
197 #if defined(CONFIG_PPC64) && (defined(CONFIG_SMP) || defined(CONFIG_KEXEC_CORE))
198 extern void smp_release_cpus(void);
199 #else
smp_release_cpus(void)200 static inline void smp_release_cpus(void) { };
201 #endif
202
203 extern int smt_enabled_at_boot;
204
205 extern void smp_mpic_probe(void);
206 extern void smp_mpic_setup_cpu(int cpu);
207 extern int smp_generic_kick_cpu(int nr);
208 extern int smp_generic_cpu_bootable(unsigned int nr);
209
210
211 extern void smp_generic_give_timebase(void);
212 extern void smp_generic_take_timebase(void);
213
214 extern struct smp_ops_t *smp_ops;
215
216 extern void arch_send_call_function_single_ipi(int cpu);
217 extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
218
219 /* Definitions relative to the secondary CPU spin loop
220 * and entry point. Not all of them exist on both 32 and
221 * 64-bit but defining them all here doesn't harm
222 */
223 extern void generic_secondary_smp_init(void);
224 extern void generic_secondary_thread_init(void);
225 extern unsigned long __secondary_hold_spinloop;
226 extern unsigned long __secondary_hold_acknowledge;
227 extern char __secondary_hold;
228 extern unsigned int booting_thread_hwid;
229
230 extern void __early_start(void);
231 #endif /* __ASSEMBLY__ */
232
233 #endif /* __KERNEL__ */
234 #endif /* _ASM_POWERPC_SMP_H) */
235
