1 /*
2 * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17 #ifndef __MT76x2_EEPROM_H
18 #define __MT76x2_EEPROM_H
19
20 #include "mt76x2.h"
21
22 enum mt76x2_eeprom_field {
23 MT_EE_CHIP_ID = 0x000,
24 MT_EE_VERSION = 0x002,
25 MT_EE_MAC_ADDR = 0x004,
26 MT_EE_PCI_ID = 0x00A,
27 MT_EE_NIC_CONF_0 = 0x034,
28 MT_EE_NIC_CONF_1 = 0x036,
29 MT_EE_NIC_CONF_2 = 0x042,
30
31 MT_EE_XTAL_TRIM_1 = 0x03a,
32 MT_EE_XTAL_TRIM_2 = 0x09e,
33
34 MT_EE_LNA_GAIN = 0x044,
35 MT_EE_RSSI_OFFSET_2G_0 = 0x046,
36 MT_EE_RSSI_OFFSET_2G_1 = 0x048,
37 MT_EE_RSSI_OFFSET_5G_0 = 0x04a,
38 MT_EE_RSSI_OFFSET_5G_1 = 0x04c,
39
40 MT_EE_TX_POWER_DELTA_BW40 = 0x050,
41 MT_EE_TX_POWER_DELTA_BW80 = 0x052,
42
43 MT_EE_TX_POWER_EXT_PA_5G = 0x054,
44
45 MT_EE_TX_POWER_0_START_2G = 0x056,
46 MT_EE_TX_POWER_1_START_2G = 0x05c,
47
48 /* used as byte arrays */
49 #define MT_TX_POWER_GROUP_SIZE_5G 5
50 #define MT_TX_POWER_GROUPS_5G 6
51 MT_EE_TX_POWER_0_START_5G = 0x062,
52
53 MT_EE_TX_POWER_0_GRP3_TX_POWER_DELTA = 0x074,
54 MT_EE_TX_POWER_0_GRP4_TSSI_SLOPE = 0x076,
55
56 MT_EE_TX_POWER_1_START_5G = 0x080,
57
58 MT_EE_TX_POWER_CCK = 0x0a0,
59 MT_EE_TX_POWER_OFDM_2G_6M = 0x0a2,
60 MT_EE_TX_POWER_OFDM_2G_24M = 0x0a4,
61 MT_EE_TX_POWER_OFDM_5G_6M = 0x0b2,
62 MT_EE_TX_POWER_OFDM_5G_24M = 0x0b4,
63 MT_EE_TX_POWER_HT_MCS0 = 0x0a6,
64 MT_EE_TX_POWER_HT_MCS4 = 0x0a8,
65 MT_EE_TX_POWER_HT_MCS8 = 0x0aa,
66 MT_EE_TX_POWER_HT_MCS12 = 0x0ac,
67 MT_EE_TX_POWER_VHT_MCS0 = 0x0ba,
68 MT_EE_TX_POWER_VHT_MCS4 = 0x0bc,
69 MT_EE_TX_POWER_VHT_MCS8 = 0x0be,
70
71 MT_EE_RF_TEMP_COMP_SLOPE_5G = 0x0f2,
72 MT_EE_RF_TEMP_COMP_SLOPE_2G = 0x0f4,
73
74 MT_EE_RF_2G_TSSI_OFF_TXPOWER = 0x0f6,
75 MT_EE_RF_2G_RX_HIGH_GAIN = 0x0f8,
76 MT_EE_RF_5G_GRP0_1_RX_HIGH_GAIN = 0x0fa,
77 MT_EE_RF_5G_GRP2_3_RX_HIGH_GAIN = 0x0fc,
78 MT_EE_RF_5G_GRP4_5_RX_HIGH_GAIN = 0x0fe,
79
80 MT_EE_BT_RCAL_RESULT = 0x138,
81 MT_EE_BT_VCDL_CALIBRATION = 0x13c,
82 MT_EE_BT_PMUCFG = 0x13e,
83
84 __MT_EE_MAX
85 };
86
87 #define MT_EE_NIC_CONF_0_PA_INT_2G BIT(8)
88 #define MT_EE_NIC_CONF_0_PA_INT_5G BIT(9)
89 #define MT_EE_NIC_CONF_0_BOARD_TYPE GENMASK(13, 12)
90
91 #define MT_EE_NIC_CONF_1_TEMP_TX_ALC BIT(1)
92 #define MT_EE_NIC_CONF_1_LNA_EXT_2G BIT(2)
93 #define MT_EE_NIC_CONF_1_LNA_EXT_5G BIT(3)
94 #define MT_EE_NIC_CONF_1_TX_ALC_EN BIT(13)
95
96 #define MT_EE_NIC_CONF_2_RX_STREAM GENMASK(3, 0)
97 #define MT_EE_NIC_CONF_2_TX_STREAM GENMASK(7, 4)
98 #define MT_EE_NIC_CONF_2_HW_ANTDIV BIT(8)
99 #define MT_EE_NIC_CONF_2_XTAL_OPTION GENMASK(10, 9)
100 #define MT_EE_NIC_CONF_2_TEMP_DISABLE BIT(11)
101 #define MT_EE_NIC_CONF_2_COEX_METHOD GENMASK(15, 13)
102
103 enum mt76x2_board_type {
104 BOARD_TYPE_2GHZ = 1,
105 BOARD_TYPE_5GHZ = 2,
106 };
107
108 enum mt76x2_cal_channel_group {
109 MT_CH_5G_JAPAN,
110 MT_CH_5G_UNII_1,
111 MT_CH_5G_UNII_2,
112 MT_CH_5G_UNII_2E_1,
113 MT_CH_5G_UNII_2E_2,
114 MT_CH_5G_UNII_3,
115 __MT_CH_MAX
116 };
117
118 struct mt76x2_tx_power_info {
119 u8 target_power;
120
121 s8 delta_bw40;
122 s8 delta_bw80;
123
124 struct {
125 s8 tssi_slope;
126 s8 tssi_offset;
127 s8 target_power;
128 s8 delta;
129 } chain[MT_MAX_CHAINS];
130 };
131
132 struct mt76x2_temp_comp {
133 u8 temp_25_ref;
134 int lower_bound; /* J */
135 int upper_bound; /* J */
136 unsigned int high_slope; /* J / dB */
137 unsigned int low_slope; /* J / dB */
138 };
139
140 static inline int
mt76x2_eeprom_get(struct mt76x2_dev * dev,enum mt76x2_eeprom_field field)141 mt76x2_eeprom_get(struct mt76x2_dev *dev, enum mt76x2_eeprom_field field)
142 {
143 if ((field & 1) || field >= __MT_EE_MAX)
144 return -1;
145
146 return get_unaligned_le16(dev->mt76.eeprom.data + field);
147 }
148
149 void mt76x2_get_rate_power(struct mt76x2_dev *dev, struct mt76_rate_power *t,
150 struct ieee80211_channel *chan);
151 int mt76x2_get_max_rate_power(struct mt76_rate_power *r);
152 void mt76x2_get_power_info(struct mt76x2_dev *dev,
153 struct mt76x2_tx_power_info *t,
154 struct ieee80211_channel *chan);
155 int mt76x2_get_temp_comp(struct mt76x2_dev *dev, struct mt76x2_temp_comp *t);
156 bool mt76x2_ext_pa_enabled(struct mt76x2_dev *dev, enum nl80211_band band);
157 void mt76x2_read_rx_gain(struct mt76x2_dev *dev);
158 void mt76x2_eeprom_parse_hw_cap(struct mt76x2_dev *dev);
159
160 static inline bool
mt76x2_temp_tx_alc_enabled(struct mt76x2_dev * dev)161 mt76x2_temp_tx_alc_enabled(struct mt76x2_dev *dev)
162 {
163 u16 val;
164
165 val = mt76x2_eeprom_get(dev, MT_EE_TX_POWER_EXT_PA_5G);
166 if (!(val & BIT(15)))
167 return false;
168
169 return mt76x2_eeprom_get(dev, MT_EE_NIC_CONF_1) &
170 MT_EE_NIC_CONF_1_TEMP_TX_ALC;
171 }
172
173 static inline bool
mt76x2_tssi_enabled(struct mt76x2_dev * dev)174 mt76x2_tssi_enabled(struct mt76x2_dev *dev)
175 {
176 return !mt76x2_temp_tx_alc_enabled(dev) &&
177 (mt76x2_eeprom_get(dev, MT_EE_NIC_CONF_1) &
178 MT_EE_NIC_CONF_1_TX_ALC_EN);
179 }
180
181 static inline bool
mt76x2_has_ext_lna(struct mt76x2_dev * dev)182 mt76x2_has_ext_lna(struct mt76x2_dev *dev)
183 {
184 u32 val = mt76x2_eeprom_get(dev, MT_EE_NIC_CONF_1);
185
186 if (dev->mt76.chandef.chan->band == NL80211_BAND_2GHZ)
187 return val & MT_EE_NIC_CONF_1_LNA_EXT_2G;
188 else
189 return val & MT_EE_NIC_CONF_1_LNA_EXT_5G;
190 }
191
192 #endif
193
