1 /* SPDX-License-Identifier: ISC */
2 /* Copyright (C) 2019 MediaTek Inc. */
3
4 #ifndef __MT7615_H
5 #define __MT7615_H
6
7 #include <linux/completion.h>
8 #include <linux/interrupt.h>
9 #include <linux/ktime.h>
10 #include <linux/regmap.h>
11 #include "../mt76.h"
12 #include "regs.h"
13
14 #define MT7615_MAX_INTERFACES 4
15 #define MT7615_MAX_WMM_SETS 4
16 #define MT7663_WTBL_SIZE 32
17 #define MT7615_WTBL_SIZE 128
18 #define MT7615_WTBL_RESERVED (mt7615_wtbl_size(dev) - 1)
19 #define MT7615_WTBL_STA (MT7615_WTBL_RESERVED - \
20 MT7615_MAX_INTERFACES)
21
22 #define MT7615_PM_TIMEOUT (HZ / 12)
23 #define MT7615_WATCHDOG_TIME (HZ / 10)
24 #define MT7615_HW_SCAN_TIMEOUT (HZ / 10)
25 #define MT7615_RESET_TIMEOUT (30 * HZ)
26 #define MT7615_RATE_RETRY 2
27
28 #define MT7615_TX_RING_SIZE 1024
29 #define MT7615_TX_MGMT_RING_SIZE 128
30 #define MT7615_TX_MCU_RING_SIZE 128
31 #define MT7615_TX_FWDL_RING_SIZE 128
32
33 #define MT7615_RX_RING_SIZE 1024
34 #define MT7615_RX_MCU_RING_SIZE 512
35
36 #define MT7615_DRV_OWN_RETRY_COUNT 10
37
38 #define MT7615_FIRMWARE_CR4 "mediatek/mt7615_cr4.bin"
39 #define MT7615_FIRMWARE_N9 "mediatek/mt7615_n9.bin"
40 #define MT7615_ROM_PATCH "mediatek/mt7615_rom_patch.bin"
41
42 #define MT7622_FIRMWARE_N9 "mediatek/mt7622_n9.bin"
43 #define MT7622_ROM_PATCH "mediatek/mt7622_rom_patch.bin"
44
45 #define MT7615_FIRMWARE_V1 1
46 #define MT7615_FIRMWARE_V2 2
47 #define MT7615_FIRMWARE_V3 3
48
49 #define MT7663_OFFLOAD_ROM_PATCH "mediatek/mt7663pr2h.bin"
50 #define MT7663_OFFLOAD_FIRMWARE_N9 "mediatek/mt7663_n9_v3.bin"
51 #define MT7663_ROM_PATCH "mediatek/mt7663pr2h_rebb.bin"
52 #define MT7663_FIRMWARE_N9 "mediatek/mt7663_n9_rebb.bin"
53
54 #define MT7615_EEPROM_SIZE 1024
55 #define MT7615_TOKEN_SIZE 4096
56
57 #define MT_FRAC_SCALE 12
58 #define MT_FRAC(val, div) (((val) << MT_FRAC_SCALE) / (div))
59
60 #define MT_CHFREQ_VALID BIT(7)
61 #define MT_CHFREQ_DBDC_IDX BIT(6)
62 #define MT_CHFREQ_SEQ GENMASK(5, 0)
63
64 #define MT7615_BAR_RATE_DEFAULT 0x4b /* OFDM 6M */
65 #define MT7615_CFEND_RATE_DEFAULT 0x49 /* OFDM 24M */
66 #define MT7615_CFEND_RATE_11B 0x03 /* 11B LP, 11M */
67
68 #define MT7615_SCAN_IE_LEN 600
69 #define MT7615_MAX_SCHED_SCAN_INTERVAL 10
70 #define MT7615_MAX_SCHED_SCAN_SSID 10
71 #define MT7615_MAX_SCAN_MATCH 16
72
73 struct mt7615_vif;
74 struct mt7615_sta;
75 struct mt7615_dfs_pulse;
76 struct mt7615_dfs_pattern;
77 enum mt7615_cipher_type;
78
79 enum mt7615_hw_txq_id {
80 MT7615_TXQ_MAIN,
81 MT7615_TXQ_EXT,
82 MT7615_TXQ_MCU,
83 MT7615_TXQ_FWDL,
84 };
85
86 enum mt7622_hw_txq_id {
87 MT7622_TXQ_AC0,
88 MT7622_TXQ_AC1,
89 MT7622_TXQ_AC2,
90 MT7622_TXQ_FWDL = MT7615_TXQ_FWDL,
91 MT7622_TXQ_AC3,
92 MT7622_TXQ_MGMT,
93 MT7622_TXQ_MCU = 15,
94 };
95
96 struct mt7615_rate_set {
97 struct ieee80211_tx_rate probe_rate;
98 struct ieee80211_tx_rate rates[4];
99 };
100
101 struct mt7615_rate_desc {
102 bool rateset;
103 u16 probe_val;
104 u16 val[4];
105 u8 bw_idx;
106 u8 bw;
107 };
108
109 enum mt7615_wtbl_desc_type {
110 MT7615_WTBL_RATE_DESC,
111 MT7615_WTBL_KEY_DESC
112 };
113
114 struct mt7615_key_desc {
115 enum set_key_cmd cmd;
116 u32 cipher;
117 s8 keyidx;
118 u8 keylen;
119 u8 *key;
120 };
121
122 struct mt7615_wtbl_desc {
123 struct list_head node;
124
125 enum mt7615_wtbl_desc_type type;
126 struct mt7615_sta *sta;
127
128 union {
129 struct mt7615_rate_desc rate;
130 struct mt7615_key_desc key;
131 };
132 };
133
134 struct mt7615_sta {
135 struct mt76_wcid wcid; /* must be first */
136
137 struct mt7615_vif *vif;
138
139 struct list_head poll_list;
140 u32 airtime_ac[8];
141
142 struct ieee80211_tx_rate rates[4];
143
144 struct mt7615_rate_set rateset[2];
145 u32 rate_set_tsf;
146
147 u8 rate_count;
148 u8 n_rates;
149
150 u8 rate_probe;
151 };
152
153 struct mt7615_vif {
154 u8 idx;
155 u8 omac_idx;
156 u8 band_idx;
157 u8 wmm_idx;
158 u8 scan_seq_num;
159
160 struct mt7615_sta sta;
161 };
162
163 struct mib_stats {
164 u16 ack_fail_cnt;
165 u16 fcs_err_cnt;
166 u16 rts_cnt;
167 u16 rts_retries_cnt;
168 u16 ba_miss_cnt;
169 unsigned long aggr_per;
170 };
171
172 struct mt7615_phy {
173 struct mt76_phy *mt76;
174 struct mt7615_dev *dev;
175
176 struct ieee80211_vif *monitor_vif;
177
178 u32 rxfilter;
179 u32 omac_mask;
180
181 u16 noise;
182
183 bool scs_en;
184
185 unsigned long last_cca_adj;
186 int false_cca_ofdm, false_cca_cck;
187 s8 ofdm_sensitivity;
188 s8 cck_sensitivity;
189
190 u16 chainmask;
191
192 s16 coverage_class;
193 u8 slottime;
194
195 u8 chfreq;
196 u8 rdd_state;
197 int dfs_state;
198
199 __le32 rx_ampdu_ts;
200 u32 ampdu_ref;
201
202 struct mib_stats mib;
203
204 struct delayed_work mac_work;
205 u8 mac_work_count;
206
207 struct sk_buff_head scan_event_list;
208 struct delayed_work scan_work;
209
210 struct work_struct roc_work;
211 struct timer_list roc_timer;
212 wait_queue_head_t roc_wait;
213 bool roc_grant;
214 };
215
216 #define mt7615_mcu_add_tx_ba(dev, ...) (dev)->mcu_ops->add_tx_ba((dev), __VA_ARGS__)
217 #define mt7615_mcu_add_rx_ba(dev, ...) (dev)->mcu_ops->add_rx_ba((dev), __VA_ARGS__)
218 #define mt7615_mcu_sta_add(dev, ...) (dev)->mcu_ops->sta_add((dev), __VA_ARGS__)
219 #define mt7615_mcu_add_dev_info(dev, ...) (dev)->mcu_ops->add_dev_info((dev), __VA_ARGS__)
220 #define mt7615_mcu_add_bss_info(phy, ...) (phy->dev)->mcu_ops->add_bss_info((phy), __VA_ARGS__)
221 #define mt7615_mcu_add_beacon(dev, ...) (dev)->mcu_ops->add_beacon_offload((dev), __VA_ARGS__)
222 #define mt7615_mcu_set_pm(dev, ...) (dev)->mcu_ops->set_pm_state((dev), __VA_ARGS__)
223 #define mt7615_mcu_set_drv_ctrl(dev) (dev)->mcu_ops->set_drv_ctrl((dev))
224 #define mt7615_mcu_set_fw_ctrl(dev) (dev)->mcu_ops->set_fw_ctrl((dev))
225 struct mt7615_mcu_ops {
226 int (*add_tx_ba)(struct mt7615_dev *dev,
227 struct ieee80211_ampdu_params *params,
228 bool enable);
229 int (*add_rx_ba)(struct mt7615_dev *dev,
230 struct ieee80211_ampdu_params *params,
231 bool enable);
232 int (*sta_add)(struct mt7615_dev *dev,
233 struct ieee80211_vif *vif,
234 struct ieee80211_sta *sta, bool enable);
235 int (*add_dev_info)(struct mt7615_dev *dev,
236 struct ieee80211_vif *vif, bool enable);
237 int (*add_bss_info)(struct mt7615_phy *phy, struct ieee80211_vif *vif,
238 struct ieee80211_sta *sta, bool enable);
239 int (*add_beacon_offload)(struct mt7615_dev *dev,
240 struct ieee80211_hw *hw,
241 struct ieee80211_vif *vif, bool enable);
242 int (*set_pm_state)(struct mt7615_dev *dev, int band, int state);
243 int (*set_drv_ctrl)(struct mt7615_dev *dev);
244 int (*set_fw_ctrl)(struct mt7615_dev *dev);
245 };
246
247 struct mt7615_dev {
248 union { /* must be first */
249 struct mt76_dev mt76;
250 struct mt76_phy mphy;
251 };
252
253 const struct mt76_bus_ops *bus_ops;
254 struct tasklet_struct irq_tasklet;
255
256 struct mt7615_phy phy;
257 u32 omac_mask;
258
259 u16 chainmask;
260
261 struct ieee80211_ops *ops;
262 const struct mt7615_mcu_ops *mcu_ops;
263 struct regmap *infracfg;
264 const u32 *reg_map;
265
266 struct work_struct mcu_work;
267
268 struct work_struct reset_work;
269 wait_queue_head_t reset_wait;
270 u32 reset_state;
271
272 struct list_head sta_poll_list;
273 spinlock_t sta_poll_lock;
274
275 struct {
276 u8 n_pulses;
277 u32 period;
278 u16 width;
279 s16 power;
280 } radar_pattern;
281 u32 hw_pattern;
282
283 bool fw_debug;
284 bool flash_eeprom;
285 bool dbdc_support;
286
287 spinlock_t token_lock;
288 struct idr token;
289
290 u8 fw_ver;
291
292 struct work_struct wtbl_work;
293 struct list_head wd_head;
294
295 u32 debugfs_rf_wf;
296 u32 debugfs_rf_reg;
297
298 #ifdef CONFIG_NL80211_TESTMODE
299 struct {
300 u32 *reg_backup;
301
302 s16 last_freq_offset;
303 u8 last_rcpi[4];
304 s8 last_ib_rssi;
305 s8 last_wb_rssi;
306 } test;
307 #endif
308
309 struct {
310 bool enable;
311
312 spinlock_t txq_lock;
313 struct {
314 struct mt7615_sta *msta;
315 struct sk_buff *skb;
316 } tx_q[IEEE80211_NUM_ACS];
317
318 struct work_struct wake_work;
319 struct completion wake_cmpl;
320
321 struct delayed_work ps_work;
322 unsigned long last_activity;
323 unsigned long idle_timeout;
324 } pm;
325 };
326
327 enum tx_pkt_queue_idx {
328 MT_LMAC_AC00,
329 MT_LMAC_AC01,
330 MT_LMAC_AC02,
331 MT_LMAC_AC03,
332 MT_LMAC_ALTX0 = 0x10,
333 MT_LMAC_BMC0,
334 MT_LMAC_BCN0,
335 MT_LMAC_PSMP0,
336 MT_LMAC_ALTX1,
337 MT_LMAC_BMC1,
338 MT_LMAC_BCN1,
339 MT_LMAC_PSMP1,
340 };
341
342 enum {
343 HW_BSSID_0 = 0x0,
344 HW_BSSID_1,
345 HW_BSSID_2,
346 HW_BSSID_3,
347 HW_BSSID_MAX,
348 EXT_BSSID_START = 0x10,
349 EXT_BSSID_1,
350 EXT_BSSID_2,
351 EXT_BSSID_3,
352 EXT_BSSID_4,
353 EXT_BSSID_5,
354 EXT_BSSID_6,
355 EXT_BSSID_7,
356 EXT_BSSID_8,
357 EXT_BSSID_9,
358 EXT_BSSID_10,
359 EXT_BSSID_11,
360 EXT_BSSID_12,
361 EXT_BSSID_13,
362 EXT_BSSID_14,
363 EXT_BSSID_15,
364 EXT_BSSID_END
365 };
366
367 enum {
368 MT_RX_SEL0,
369 MT_RX_SEL1,
370 };
371
372 enum mt7615_rdd_cmd {
373 RDD_STOP,
374 RDD_START,
375 RDD_DET_MODE,
376 RDD_DET_STOP,
377 RDD_CAC_START,
378 RDD_CAC_END,
379 RDD_NORMAL_START,
380 RDD_DISABLE_DFS_CAL,
381 RDD_PULSE_DBG,
382 RDD_READ_PULSE,
383 RDD_RESUME_BF,
384 };
385
386 static inline struct mt7615_phy *
mt7615_hw_phy(struct ieee80211_hw * hw)387 mt7615_hw_phy(struct ieee80211_hw *hw)
388 {
389 struct mt76_phy *phy = hw->priv;
390
391 return phy->priv;
392 }
393
394 static inline struct mt7615_dev *
mt7615_hw_dev(struct ieee80211_hw * hw)395 mt7615_hw_dev(struct ieee80211_hw *hw)
396 {
397 struct mt76_phy *phy = hw->priv;
398
399 return container_of(phy->dev, struct mt7615_dev, mt76);
400 }
401
402 static inline struct mt7615_phy *
mt7615_ext_phy(struct mt7615_dev * dev)403 mt7615_ext_phy(struct mt7615_dev *dev)
404 {
405 struct mt76_phy *phy = dev->mt76.phy2;
406
407 if (!phy)
408 return NULL;
409
410 return phy->priv;
411 }
412
413 extern struct ieee80211_rate mt7615_rates[12];
414 extern const struct ieee80211_ops mt7615_ops;
415 extern const u32 mt7615e_reg_map[__MT_BASE_MAX];
416 extern const u32 mt7663e_reg_map[__MT_BASE_MAX];
417 extern const u32 mt7663_usb_sdio_reg_map[__MT_BASE_MAX];
418 extern struct pci_driver mt7615_pci_driver;
419 extern struct platform_driver mt7622_wmac_driver;
420 extern const struct mt76_testmode_ops mt7615_testmode_ops;
421
422 #ifdef CONFIG_MT7622_WMAC
423 int mt7622_wmac_init(struct mt7615_dev *dev);
424 #else
mt7622_wmac_init(struct mt7615_dev * dev)425 static inline int mt7622_wmac_init(struct mt7615_dev *dev)
426 {
427 return 0;
428 }
429 #endif
430
431 int mt7615_mmio_probe(struct device *pdev, void __iomem *mem_base,
432 int irq, const u32 *map);
433 u32 mt7615_reg_map(struct mt7615_dev *dev, u32 addr);
434
435 void mt7615_check_offload_capability(struct mt7615_dev *dev);
436 void mt7615_init_device(struct mt7615_dev *dev);
437 int mt7615_register_device(struct mt7615_dev *dev);
438 void mt7615_unregister_device(struct mt7615_dev *dev);
439 int mt7615_register_ext_phy(struct mt7615_dev *dev);
440 void mt7615_unregister_ext_phy(struct mt7615_dev *dev);
441 int mt7615_eeprom_init(struct mt7615_dev *dev, u32 addr);
442 int mt7615_eeprom_get_target_power_index(struct mt7615_dev *dev,
443 struct ieee80211_channel *chan,
444 u8 chain_idx);
445 int mt7615_eeprom_get_power_delta_index(struct mt7615_dev *dev,
446 enum nl80211_band band);
447 int mt7615_wait_pdma_busy(struct mt7615_dev *dev);
448 int mt7615_dma_init(struct mt7615_dev *dev);
449 void mt7615_dma_cleanup(struct mt7615_dev *dev);
450 int mt7615_mcu_init(struct mt7615_dev *dev);
451 bool mt7615_wait_for_mcu_init(struct mt7615_dev *dev);
452 void mt7615_mac_set_rates(struct mt7615_phy *phy, struct mt7615_sta *sta,
453 struct ieee80211_tx_rate *probe_rate,
454 struct ieee80211_tx_rate *rates);
455 int mt7615_pm_set_enable(struct mt7615_dev *dev, bool enable);
456 void mt7615_pm_wake_work(struct work_struct *work);
457 int mt7615_pm_wake(struct mt7615_dev *dev);
458 void mt7615_pm_power_save_sched(struct mt7615_dev *dev);
459 void mt7615_pm_power_save_work(struct work_struct *work);
460 int mt7615_mcu_del_wtbl_all(struct mt7615_dev *dev);
461 int mt7615_mcu_set_chan_info(struct mt7615_phy *phy, int cmd);
462 int mt7615_mcu_set_wmm(struct mt7615_dev *dev, u8 queue,
463 const struct ieee80211_tx_queue_params *params);
464 void mt7615_mcu_rx_event(struct mt7615_dev *dev, struct sk_buff *skb);
465 int mt7615_mcu_rdd_cmd(struct mt7615_dev *dev,
466 enum mt7615_rdd_cmd cmd, u8 index,
467 u8 rx_sel, u8 val);
468 int mt7615_mcu_rdd_send_pattern(struct mt7615_dev *dev);
469 int mt7615_mcu_fw_log_2_host(struct mt7615_dev *dev, u8 ctrl);
470
is_mt7622(struct mt76_dev * dev)471 static inline bool is_mt7622(struct mt76_dev *dev)
472 {
473 if (!IS_ENABLED(CONFIG_MT7622_WMAC))
474 return false;
475
476 return mt76_chip(dev) == 0x7622;
477 }
478
is_mt7615(struct mt76_dev * dev)479 static inline bool is_mt7615(struct mt76_dev *dev)
480 {
481 return mt76_chip(dev) == 0x7615 || mt76_chip(dev) == 0x7611;
482 }
483
is_mt7663(struct mt76_dev * dev)484 static inline bool is_mt7663(struct mt76_dev *dev)
485 {
486 return mt76_chip(dev) == 0x7663;
487 }
488
is_mt7611(struct mt76_dev * dev)489 static inline bool is_mt7611(struct mt76_dev *dev)
490 {
491 return mt76_chip(dev) == 0x7611;
492 }
493
mt7615_irq_enable(struct mt7615_dev * dev,u32 mask)494 static inline void mt7615_irq_enable(struct mt7615_dev *dev, u32 mask)
495 {
496 mt76_set_irq_mask(&dev->mt76, 0, 0, mask);
497
498 tasklet_schedule(&dev->irq_tasklet);
499 }
500
mt7615_firmware_offload(struct mt7615_dev * dev)501 static inline bool mt7615_firmware_offload(struct mt7615_dev *dev)
502 {
503 return dev->fw_ver > MT7615_FIRMWARE_V2;
504 }
505
mt7615_wtbl_size(struct mt7615_dev * dev)506 static inline u16 mt7615_wtbl_size(struct mt7615_dev *dev)
507 {
508 if (is_mt7663(&dev->mt76) && mt7615_firmware_offload(dev))
509 return MT7663_WTBL_SIZE;
510 else
511 return MT7615_WTBL_SIZE;
512 }
513
mt7615_mutex_acquire(struct mt7615_dev * dev)514 static inline void mt7615_mutex_acquire(struct mt7615_dev *dev)
515 __acquires(&dev->mt76.mutex)
516 {
517 mutex_lock(&dev->mt76.mutex);
518 mt7615_pm_wake(dev);
519 }
520
mt7615_mutex_release(struct mt7615_dev * dev)521 static inline void mt7615_mutex_release(struct mt7615_dev *dev)
522 __releases(&dev->mt76.mutex)
523 {
524 mt7615_pm_power_save_sched(dev);
525 mutex_unlock(&dev->mt76.mutex);
526 }
527
mt7615_lmac_mapping(struct mt7615_dev * dev,u8 ac)528 static inline u8 mt7615_lmac_mapping(struct mt7615_dev *dev, u8 ac)
529 {
530 static const u8 lmac_queue_map[] = {
531 [IEEE80211_AC_BK] = MT_LMAC_AC00,
532 [IEEE80211_AC_BE] = MT_LMAC_AC01,
533 [IEEE80211_AC_VI] = MT_LMAC_AC02,
534 [IEEE80211_AC_VO] = MT_LMAC_AC03,
535 };
536
537 if (WARN_ON_ONCE(ac >= ARRAY_SIZE(lmac_queue_map)))
538 return MT_LMAC_AC01; /* BE */
539
540 return lmac_queue_map[ac];
541 }
542
mt7615_tx_mcu_int_mask(struct mt7615_dev * dev)543 static inline u32 mt7615_tx_mcu_int_mask(struct mt7615_dev *dev)
544 {
545 return MT_INT_TX_DONE(dev->mt76.q_tx[MT_TXQ_MCU]->hw_idx);
546 }
547
548 void mt7615_dma_reset(struct mt7615_dev *dev);
549 void mt7615_scan_work(struct work_struct *work);
550 void mt7615_roc_work(struct work_struct *work);
551 void mt7615_roc_timer(struct timer_list *timer);
552 void mt7615_init_txpower(struct mt7615_dev *dev,
553 struct ieee80211_supported_band *sband);
554 void mt7615_phy_init(struct mt7615_dev *dev);
555 void mt7615_mac_init(struct mt7615_dev *dev);
556 int mt7615_set_channel(struct mt7615_phy *phy);
557
558 int mt7615_mcu_restart(struct mt76_dev *dev);
559 void mt7615_update_channel(struct mt76_dev *mdev);
560 bool mt7615_mac_wtbl_update(struct mt7615_dev *dev, int idx, u32 mask);
561 void mt7615_mac_reset_counters(struct mt7615_dev *dev);
562 void mt7615_mac_cca_stats_reset(struct mt7615_phy *phy);
563 void mt7615_mac_set_scs(struct mt7615_phy *phy, bool enable);
564 void mt7615_mac_enable_nf(struct mt7615_dev *dev, bool ext_phy);
565 void mt7615_mac_sta_poll(struct mt7615_dev *dev);
566 int mt7615_mac_write_txwi(struct mt7615_dev *dev, __le32 *txwi,
567 struct sk_buff *skb, struct mt76_wcid *wcid,
568 struct ieee80211_sta *sta, int pid,
569 struct ieee80211_key_conf *key, bool beacon);
570 void mt7615_mac_set_timing(struct mt7615_phy *phy);
571 int mt7615_mac_wtbl_set_key(struct mt7615_dev *dev, struct mt76_wcid *wcid,
572 struct ieee80211_key_conf *key,
573 enum set_key_cmd cmd);
574 int mt7615_mac_wtbl_update_pk(struct mt7615_dev *dev,
575 struct mt76_wcid *wcid,
576 enum mt7615_cipher_type cipher,
577 int keyidx, enum set_key_cmd cmd);
578 void mt7615_mac_wtbl_update_cipher(struct mt7615_dev *dev,
579 struct mt76_wcid *wcid,
580 enum mt7615_cipher_type cipher,
581 enum set_key_cmd cmd);
582 int mt7615_mac_wtbl_update_key(struct mt7615_dev *dev,
583 struct mt76_wcid *wcid,
584 u8 *key, u8 keylen,
585 enum mt7615_cipher_type cipher,
586 enum set_key_cmd cmd);
587 void mt7615_mac_reset_work(struct work_struct *work);
588 u32 mt7615_mac_get_sta_tid_sn(struct mt7615_dev *dev, int wcid, u8 tid);
589
590 int mt7615_mcu_wait_response(struct mt7615_dev *dev, int cmd, int seq);
591 int mt7615_mcu_msg_send(struct mt76_dev *mdev, int cmd, const void *data,
592 int len, bool wait_resp);
593 u32 mt7615_rf_rr(struct mt7615_dev *dev, u32 wf, u32 reg);
594 int mt7615_rf_wr(struct mt7615_dev *dev, u32 wf, u32 reg, u32 val);
595 int mt7615_mcu_set_dbdc(struct mt7615_dev *dev);
596 int mt7615_mcu_set_eeprom(struct mt7615_dev *dev);
597 int mt7615_mcu_set_mac_enable(struct mt7615_dev *dev, int band, bool enable);
598 int mt7615_mcu_set_rts_thresh(struct mt7615_phy *phy, u32 val);
599 int mt7615_mcu_get_temperature(struct mt7615_dev *dev, int index);
600 int mt7615_mcu_set_tx_power(struct mt7615_phy *phy);
601 void mt7615_mcu_exit(struct mt7615_dev *dev);
602 void mt7615_mcu_fill_msg(struct mt7615_dev *dev, struct sk_buff *skb,
603 int cmd, int *wait_seq);
604 int mt7615_mcu_set_channel_domain(struct mt7615_phy *phy);
605 int mt7615_mcu_hw_scan(struct mt7615_phy *phy, struct ieee80211_vif *vif,
606 struct ieee80211_scan_request *scan_req);
607 int mt7615_mcu_cancel_hw_scan(struct mt7615_phy *phy,
608 struct ieee80211_vif *vif);
609 int mt7615_mcu_sched_scan_req(struct mt7615_phy *phy,
610 struct ieee80211_vif *vif,
611 struct cfg80211_sched_scan_request *sreq);
612 int mt7615_mcu_sched_scan_enable(struct mt7615_phy *phy,
613 struct ieee80211_vif *vif,
614 bool enable);
615
616 int mt7615_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
617 enum mt76_txq_id qid, struct mt76_wcid *wcid,
618 struct ieee80211_sta *sta,
619 struct mt76_tx_info *tx_info);
620
621 void mt7615_tx_complete_skb(struct mt76_dev *mdev, struct mt76_queue_entry *e);
622
623 void mt7615_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
624 struct sk_buff *skb);
625 void mt7615_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta, bool ps);
626 int mt7615_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
627 struct ieee80211_sta *sta);
628 void mt7615_mac_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif,
629 struct ieee80211_sta *sta);
630 void mt7615_mac_work(struct work_struct *work);
631 void mt7615_txp_skb_unmap(struct mt76_dev *dev,
632 struct mt76_txwi_cache *txwi);
633 int mt7615_mcu_set_fcc5_lpn(struct mt7615_dev *dev, int val);
634 int mt7615_mcu_set_pulse_th(struct mt7615_dev *dev,
635 const struct mt7615_dfs_pulse *pulse);
636 int mt7615_mcu_set_radar_th(struct mt7615_dev *dev, int index,
637 const struct mt7615_dfs_pattern *pattern);
638 int mt7615_mcu_set_test_param(struct mt7615_dev *dev, u8 param, bool test_mode,
639 u32 val);
640 int mt7615_mcu_set_sku_en(struct mt7615_phy *phy, bool enable);
641 int mt7615_mcu_apply_rx_dcoc(struct mt7615_phy *phy);
642 int mt7615_mcu_apply_tx_dpd(struct mt7615_phy *phy);
643 int mt7615_mcu_set_vif_ps(struct mt7615_dev *dev, struct ieee80211_vif *vif);
644 int mt7615_dfs_init_radar_detector(struct mt7615_phy *phy);
645
646 int mt7615_mcu_set_p2p_oppps(struct ieee80211_hw *hw,
647 struct ieee80211_vif *vif);
648 int mt7615_mcu_set_roc(struct mt7615_phy *phy, struct ieee80211_vif *vif,
649 struct ieee80211_channel *chan, int duration);
650
651 int mt7615_init_debugfs(struct mt7615_dev *dev);
652 int mt7615_mcu_wait_response(struct mt7615_dev *dev, int cmd, int seq);
653
654 int mt7615_mcu_set_bss_pm(struct mt7615_dev *dev, struct ieee80211_vif *vif,
655 bool enable);
656 int mt7615_mcu_set_hif_suspend(struct mt7615_dev *dev, bool suspend);
657 void mt7615_mcu_set_suspend_iter(void *priv, u8 *mac,
658 struct ieee80211_vif *vif);
659 int mt7615_mcu_update_gtk_rekey(struct ieee80211_hw *hw,
660 struct ieee80211_vif *vif,
661 struct cfg80211_gtk_rekey_data *key);
662 int mt7615_mcu_update_arp_filter(struct ieee80211_hw *hw,
663 struct ieee80211_vif *vif,
664 struct ieee80211_bss_conf *info);
665 int __mt7663_load_firmware(struct mt7615_dev *dev);
666 u32 mt7615_mcu_reg_rr(struct mt76_dev *dev, u32 offset);
667 void mt7615_mcu_reg_wr(struct mt76_dev *dev, u32 offset, u32 val);
668
669 /* usb */
670 int mt7663_usb_sdio_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
671 enum mt76_txq_id qid, struct mt76_wcid *wcid,
672 struct ieee80211_sta *sta,
673 struct mt76_tx_info *tx_info);
674 bool mt7663_usb_sdio_tx_status_data(struct mt76_dev *mdev, u8 *update);
675 void mt7663_usb_sdio_tx_complete_skb(struct mt76_dev *mdev,
676 struct mt76_queue_entry *e);
677 void mt7663_usb_sdio_wtbl_work(struct work_struct *work);
678 int mt7663_usb_sdio_register_device(struct mt7615_dev *dev);
679 int mt7663u_mcu_init(struct mt7615_dev *dev);
680
681 /* sdio */
682 u32 mt7663s_read_pcr(struct mt7615_dev *dev);
683 int mt7663s_mcu_init(struct mt7615_dev *dev);
684 void mt7663s_tx_work(struct work_struct *work);
685 void mt7663s_rx_work(struct work_struct *work);
686 void mt7663s_sdio_irq(struct sdio_func *func);
687
688 #endif
689
