1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2 /* Copyright(c) 2007 - 2011 Realtek Corporation. */
3 
4 #ifndef _RTW_MP_H_
5 #define _RTW_MP_H_
6 
7 /*	00 - Success */
8 /*	11 - Error */
9 #define STATUS_SUCCESS				(0x00000000L)
10 #define STATUS_PENDING				(0x00000103L)
11 
12 #define STATUS_UNSUCCESSFUL			(0xC0000001L)
13 #define STATUS_INSUFFICIENT_RESOURCES		(0xC000009AL)
14 #define STATUS_NOT_SUPPORTED			(0xC00000BBL)
15 
16 #define NDIS_STATUS_SUCCESS			((int)STATUS_SUCCESS)
17 #define NDIS_STATUS_PENDING			((int)STATUS_PENDING)
18 #define NDIS_STATUS_NOT_RECOGNIZED		((int)0x00010001L)
19 #define NDIS_STATUS_NOT_COPIED			((int)0x00010002L)
20 #define NDIS_STATUS_NOT_ACCEPTED		((int)0x00010003L)
21 #define NDIS_STATUS_CALL_ACTIVE			((int)0x00010007L)
22 
23 #define NDIS_STATUS_FAILURE			((int)STATUS_UNSUCCESSFUL)
24 #define NDIS_STATUS_RESOURCES		((int)STATUS_INSUFFICIENT_RESOURCES)
25 #define NDIS_STATUS_CLOSING			((int)0xC0010002L)
26 #define NDIS_STATUS_BAD_VERSION			((int)0xC0010004L)
27 #define NDIS_STATUS_BAD_CHARACTERISTICS		((int)0xC0010005L)
28 #define NDIS_STATUS_ADAPTER_NOT_FOUND		((int)0xC0010006L)
29 #define NDIS_STATUS_OPEN_FAILED			((int)0xC0010007L)
30 #define NDIS_STATUS_DEVICE_FAILED		((int)0xC0010008L)
31 #define NDIS_STATUS_MULTICAST_FULL		((int)0xC0010009L)
32 #define NDIS_STATUS_MULTICAST_EXISTS		((int)0xC001000AL)
33 #define NDIS_STATUS_MULTICAST_NOT_FOUND		((int)0xC001000BL)
34 #define NDIS_STATUS_REQUEST_ABORTED		((int)0xC001000CL)
35 #define NDIS_STATUS_RESET_IN_PROGRESS		((int)0xC001000DL)
36 #define NDIS_STATUS_CLOSING_INDICATING		((int)0xC001000EL)
37 #define NDIS_STATUS_NOT_SUPPORTED		((int)STATUS_NOT_SUPPORTED)
38 #define NDIS_STATUS_INVALID_PACKET		((int)0xC001000FL)
39 #define NDIS_STATUS_OPEN_LIST_FULL		((int)0xC0010010L)
40 #define NDIS_STATUS_ADAPTER_NOT_READY		((int)0xC0010011L)
41 #define NDIS_STATUS_ADAPTER_NOT_OPEN		((int)0xC0010012L)
42 #define NDIS_STATUS_NOT_INDICATING		((int)0xC0010013L)
43 #define NDIS_STATUS_INVALID_LENGTH		((int)0xC0010014L)
44 #define NDIS_STATUS_INVALID_DATA		((int)0xC0010015L)
45 #define NDIS_STATUS_BUFFER_TOO_SHORT		((int)0xC0010016L)
46 #define NDIS_STATUS_INVALID_OID			((int)0xC0010017L)
47 #define NDIS_STATUS_ADAPTER_REMOVED		((int)0xC0010018L)
48 #define NDIS_STATUS_UNSUPPORTED_MEDIA		((int)0xC0010019L)
49 #define NDIS_STATUS_GROUP_ADDRESS_IN_USE	((int)0xC001001AL)
50 #define NDIS_STATUS_FILE_NOT_FOUND		((int)0xC001001BL)
51 #define NDIS_STATUS_ERROR_READING_FILE		((int)0xC001001CL)
52 #define NDIS_STATUS_ALREADY_MAPPED		((int)0xC001001DL)
53 #define NDIS_STATUS_RESOURCE_CONFLICT		((int)0xC001001EL)
54 #define NDIS_STATUS_NO_CABLE			((int)0xC001001FL)
55 
56 #define NDIS_STATUS_INVALID_SAP			((int)0xC0010020L)
57 #define NDIS_STATUS_SAP_IN_USE			((int)0xC0010021L)
58 #define NDIS_STATUS_INVALID_ADDRESS		((int)0xC0010022L)
59 #define NDIS_STATUS_VC_NOT_ACTIVATED		((int)0xC0010023L)
60 #define NDIS_STATUS_DEST_OUT_OF_ORDER		((int)0xC0010024L)  /*cause 27*/
61 #define NDIS_STATUS_VC_NOT_AVAILABLE		((int)0xC0010025L)  /*cause 35,45 */
62 #define NDIS_STATUS_CELLRATE_NOT_AVAILABLE	((int)0xC0010026L)  /*cause 37*/
63 #define NDIS_STATUS_INCOMPATABLE_QOS		((int)0xC0010027L)  /*cause 49*/
64 #define NDIS_STATUS_AAL_PARAMS_UNSUPPORTED	((int)0xC0010028L)  /*cause 93*/
65 #define NDIS_STATUS_NO_ROUTE_TO_DESTINATION	((int)0xC0010029L)  /*cause 3 */
66 
67 enum antenna_path {
68 	ANTENNA_NONE = 0x00,
69 	ANTENNA_D,
70 	ANTENNA_C,
71 	ANTENNA_CD,
72 	ANTENNA_B,
73 	ANTENNA_BD,
74 	ANTENNA_BC,
75 	ANTENNA_BCD,
76 	ANTENNA_A,
77 	ANTENNA_AD,
78 	ANTENNA_AC,
79 	ANTENNA_ACD,
80 	ANTENNA_AB,
81 	ANTENNA_ABD,
82 	ANTENNA_ABC,
83 	ANTENNA_ABCD
84 };
85 
86 #define MAX_MP_XMITBUF_SZ	2048
87 #define NR_MP_XMITFRAME		8
88 
89 struct mp_xmit_frame {
90 	struct list_head list;
91 	struct pkt_attrib attrib;
92 	struct sk_buff *pkt;
93 	int frame_tag;
94 	struct adapter *padapter;
95 	struct urb *pxmit_urb[8];
96 	/* insert urb, irp, and irpcnt info below... */
97 	u8 *mem_addr;
98 	u32 sz[8];
99 	u8 bpending[8];
100 	int ac_tag[8];
101 	int last[8];
102 	uint irpcnt;
103 	uint fragcnt;
104 	uint mem[(MAX_MP_XMITBUF_SZ >> 2)];
105 };
106 
107 struct mp_wiparam {
108 	u32 bcompleted;
109 	u32 act_type;
110 	u32 io_offset;
111 	u32 io_value;
112 };
113 
114 typedef void(*wi_act_func)(void *padapter);
115 
116 struct mp_tx {
117 	u8 stop;
118 	u32 count, sended;
119 	u8 payload;
120 	struct pkt_attrib attrib;
121 	struct tx_desc desc;
122 	u8 *pallocated_buf;
123 	u8 *buf;
124 	u32 buf_size, write_size;
125 	void *PktTxThread;
126 };
127 
128 #include "Hal8188EPhyCfg.h"
129 
130 #define MP_MAX_LINES		1000
131 #define MP_MAX_LINES_BYTES	256
132 
133 typedef void (*MPT_WORK_ITEM_HANDLER)(void *Adapter);
134 
135 struct mpt_context {
136 	/*  Indicate if we have started Mass Production Test. */
137 	bool			bMassProdTest;
138 
139 	/*  Indicate if the driver is unloading or unloaded. */
140 	bool			bMptDrvUnload;
141 
142 	struct semaphore MPh2c_Sema;
143 	struct timer_list MPh2c_timeout_timer;
144 /*  Event used to sync H2c for BT control */
145 
146 	bool		MptH2cRspEvent;
147 	bool		MptBtC2hEvent;
148 	bool		bMPh2c_timeout;
149 
150 	/* 8190 PCI does not support NDIS_WORK_ITEM. */
151 	/*  Work Item for Mass Production Test. */
152 	/*  Event used to sync the case unloading driver and MptWorkItem
153 	 *  is still in progress. */
154 	/*  Indicate a MptWorkItem is scheduled and not yet finished. */
155 	bool			bMptWorkItemInProgress;
156 	/*  An instance which implements function and context of MptWorkItem. */
157 	MPT_WORK_ITEM_HANDLER	CurrMptAct;
158 
159 	/*  1=Start, 0=Stop from UI. */
160 	u32	MptTestStart;
161 	/*  _TEST_MODE, defined in MPT_Req2.h */
162 	u32	MptTestItem;
163 	/*  Variable needed in each implementation of CurrMptAct. */
164 	u32	MptActType;	/*  Type of action performed in CurrMptAct. */
165 	/*  The Offset of IO operation is depend of MptActType. */
166 	u32	MptIoOffset;
167 	/*  The Value of IO operation is depend of MptActType. */
168 	u32	MptIoValue;
169 	/*  The RfPath of IO operation is depend of MptActType. */
170 	u32	MptRfPath;
171 
172 	enum wireless_mode MptWirelessModeToSw;	/*  Wireless mode to switch. */
173 	u8	MptChannelToSw;		/*  Channel to switch. */
174 	u8	MptInitGainToSet;	/*  Initial gain to set. */
175 	u32	MptBandWidth;		/*  bandwidth to switch. */
176 	u32	MptRateIndex;		/*  rate index. */
177 	/*  Register value kept for Single Carrier Tx test. */
178 	u8	btMpCckTxPower;
179 	/*  Register value kept for Single Carrier Tx test. */
180 	u8	btMpOfdmTxPower;
181 	/*  For MP Tx Power index */
182 	u8	TxPwrLevel[2];	/*  rf-A, rf-B */
183 
184 	/*  Content of RCR Regsiter for Mass Production Test. */
185 	u32	MptRCR;
186 	/*  true if we only receive packets with specific pattern. */
187 	bool	bMptFilterPattern;
188 	/*  Rx OK count, statistics used in Mass Production Test. */
189 	u32	MptRxOkCnt;
190 	/*  Rx CRC32 error count, statistics used in Mass Production Test. */
191 	u32	MptRxCrcErrCnt;
192 
193 	bool	bCckContTx;	/*  true if we are in CCK Continuous Tx test. */
194 	bool	bOfdmContTx;	/*  true if we are in OFDM Continuous Tx test. */
195 	bool	bStartContTx;	/*  true if we have start Continuous Tx test. */
196 	/*  true if we are in Single Carrier Tx test. */
197 	bool	bSingleCarrier;
198 	/*  true if we are in Carrier Suppression Tx Test. */
199 	bool	bCarrierSuppression;
200 	/* true if we are in Single Tone Tx test. */
201 	bool	bSingleTone;
202 
203 	/*  ACK counter asked by K.Y.. */
204 	bool	bMptEnableAckCounter;
205 	u32	MptAckCounter;
206 
207 	u8	APK_bound[2];	/* for APK	path A/path B */
208 	bool	bMptIndexEven;
209 
210 	u8	backup0xc50;
211 	u8	backup0xc58;
212 	u8	backup0xc30;
213 	u8	backup0x52_RF_A;
214 	u8	backup0x52_RF_B;
215 
216 	u8	h2cReqNum;
217 	u8	c2hBuf[20];
218 
219 	u8	btInBuf[100];
220 	u32	mptOutLen;
221 	u8	mptOutBuf[100];
222 };
223 
224 enum {
225 	WRITE_REG = 1,
226 	READ_REG,
227 	WRITE_RF,
228 	READ_RF,
229 	MP_START,
230 	MP_STOP,
231 	MP_RATE,
232 	MP_CHANNEL,
233 	MP_BANDWIDTH,
234 	MP_TXPOWER,
235 	MP_ANT_TX,
236 	MP_ANT_RX,
237 	MP_CTX,
238 	MP_QUERY,
239 	MP_ARX,
240 	MP_PSD,
241 	MP_PWRTRK,
242 	MP_THER,
243 	MP_IOCTL,
244 	EFUSE_GET,
245 	EFUSE_SET,
246 	MP_RESET_STATS,
247 	MP_DUMP,
248 	MP_PHYPARA,
249 	MP_SetRFPathSwh,
250 	MP_QueryDrvStats,
251 	MP_SetBT,
252 	CTA_TEST,
253 	MP_NULL,
254 };
255 
256 struct mp_priv {
257 	struct adapter *papdater;
258 
259 	/* Testing Flag */
260 	/* 0 for normal type packet, 1 for loopback packet (16bytes TXCMD) */
261 	u32 mode;
262 
263 	u32 prev_fw_state;
264 
265 	/* OID cmd handler */
266 	struct mp_wiparam workparam;
267 
268 	/* Tx Section */
269 	u8 TID;
270 	u32 tx_pktcount;
271 	struct mp_tx tx;
272 
273 	/* Rx Section */
274 	u32 rx_pktcount;
275 	u32 rx_crcerrpktcount;
276 	u32 rx_pktloss;
277 
278 	struct recv_stat rxstat;
279 
280 	/* RF/BB relative */
281 	u8 channel;
282 	u8 bandwidth;
283 	u8 prime_channel_offset;
284 	u8 txpoweridx;
285 	u8 txpoweridx_b;
286 	u8 rateidx;
287 	u32 preamble;
288 	u32 CrystalCap;
289 
290 	u16 antenna_tx;
291 	u16 antenna_rx;
292 
293 	u8 check_mp_pkt;
294 
295 	u8 bSetTxPower;
296 
297 	struct wlan_network mp_network;
298 	unsigned char network_macaddr[ETH_ALEN];
299 
300 	u8 *pallocated_mp_xmitframe_buf;
301 	u8 *pmp_xmtframe_buf;
302 	struct __queue free_mp_xmitqueue;
303 	u32 free_mp_xmitframe_cnt;
304 
305 	struct mpt_context MptCtx;
306 };
307 
308 struct iocmd_struct {
309 	u8	cmdclass;
310 	u16	value;
311 	u8	index;
312 };
313 
314 struct rf_reg_param {
315 	u32 path;
316 	u32 offset;
317 	u32 value;
318 };
319 
320 struct bb_reg_param {
321 	u32 offset;
322 	u32 value;
323 };
324 /*  */
325 
326 #define LOWER	true
327 #define RAISE	false
328 
329 /* Hardware Registers */
330 #define BB_REG_BASE_ADDR		0x800
331 
332 /* MP variables */
333 enum mp_mode_{
334 	MP_OFF,
335 	MP_ON,
336 	MP_ERR,
337 	MP_CONTINUOUS_TX,
338 	MP_SINGLE_CARRIER_TX,
339 	MP_CARRIER_SUPPRISSION_TX,
340 	MP_SINGLE_TONE_TX,
341 	MP_PACKET_TX,
342 	MP_PACKET_RX
343 };
344 
345 extern u8 mpdatarate[NumRates];
346 
347 /* MP set force data rate base on the definition. */
348 enum mpt_rate_index {
349 	/* CCK rate. */
350 	MPT_RATE_1M,	/* 0 */
351 	MPT_RATE_2M,
352 	MPT_RATE_55M,
353 	MPT_RATE_11M,	/* 3 */
354 
355 	/* OFDM rate. */
356 	MPT_RATE_6M,	/* 4 */
357 	MPT_RATE_9M,
358 	MPT_RATE_12M,
359 	MPT_RATE_18M,
360 	MPT_RATE_24M,
361 	MPT_RATE_36M,
362 	MPT_RATE_48M,
363 	MPT_RATE_54M,	/* 11 */
364 
365 	/* HT rate. */
366 	MPT_RATE_MCS0,	/* 12 */
367 	MPT_RATE_MCS1,
368 	MPT_RATE_MCS2,
369 	MPT_RATE_MCS3,
370 	MPT_RATE_MCS4,
371 	MPT_RATE_MCS5,
372 	MPT_RATE_MCS6,
373 	MPT_RATE_MCS7,	/* 19 */
374 	MPT_RATE_MCS8,
375 	MPT_RATE_MCS9,
376 	MPT_RATE_MCS10,
377 	MPT_RATE_MCS11,
378 	MPT_RATE_MCS12,
379 	MPT_RATE_MCS13,
380 	MPT_RATE_MCS14,
381 	MPT_RATE_MCS15,	/* 27 */
382 	MPT_RATE_LAST
383 };
384 
385 #define MAX_TX_PWR_INDEX_N_MODE 64	/*  0x3F */
386 
387 enum power_mode {
388 	POWER_LOW = 0,
389 	POWER_NORMAL
390 };
391 
392 #define RX_PKT_BROADCAST	1
393 #define RX_PKT_DEST_ADDR	2
394 #define RX_PKT_PHY_MATCH	3
395 
396 enum encry_ctrl_state {
397 	HW_CONTROL,		/* hw encryption& decryption */
398 	SW_CONTROL,		/* sw encryption& decryption */
399 	HW_ENCRY_SW_DECRY,	/* hw encryption & sw decryption */
400 	SW_ENCRY_HW_DECRY	/* sw encryption & hw decryption */
401 };
402 
403 s32 init_mp_priv(struct adapter *padapter);
404 void free_mp_priv(struct mp_priv *pmp_priv);
405 s32 MPT_InitializeAdapter(struct adapter *padapter, u8 Channel);
406 void MPT_DeInitAdapter(struct adapter *padapter);
407 s32 mp_start_test(struct adapter *padapter);
408 void mp_stop_test(struct adapter *padapter);
409 
410 u32 _read_rfreg(struct adapter *padapter, u8 rfpath, u32 addr, u32 bitmask);
411 void _write_rfreg(struct adapter *padapter, u8 rfpath, u32 addr, u32 bitmask, u32 val);
412 
413 u32 read_bbreg(struct adapter *padapter, u32 addr, u32 bitmask);
414 void write_bbreg(struct adapter *padapter, u32 addr, u32 bitmask, u32 val);
415 u32 read_rfreg(struct adapter *padapter, u8 rfpath, u32 addr);
416 void write_rfreg(struct adapter *padapter, u8 rfpath, u32 addr, u32 val);
417 
418 void	SetChannel(struct adapter *pAdapter);
419 void	SetBandwidth(struct adapter *pAdapter);
420 void	SetTxPower(struct adapter *pAdapter);
421 void	SetAntennaPathPower(struct adapter *pAdapter);
422 void	SetDataRate(struct adapter *pAdapter);
423 
424 void	SetAntenna(struct adapter *pAdapter);
425 
426 s32	SetThermalMeter(struct adapter *pAdapter, u8 target_ther);
427 void	GetThermalMeter(struct adapter *pAdapter, u8 *value);
428 
429 void	SetContinuousTx(struct adapter *pAdapter, u8 bStart);
430 void	SetSingleCarrierTx(struct adapter *pAdapter, u8 bStart);
431 void	SetSingleToneTx(struct adapter *pAdapter, u8 bStart);
432 void	SetCarrierSuppressionTx(struct adapter *pAdapter, u8 bStart);
433 void PhySetTxPowerLevel(struct adapter *pAdapter);
434 
435 void	fill_txdesc_for_mp(struct adapter *padapter, struct tx_desc *ptxdesc);
436 void	SetPacketTx(struct adapter *padapter);
437 void	SetPacketRx(struct adapter *pAdapter, u8 bStartRx);
438 
439 void	ResetPhyRxPktCount(struct adapter *pAdapter);
440 u32	GetPhyRxPktReceived(struct adapter *pAdapter);
441 u32	GetPhyRxPktCRC32Error(struct adapter *pAdapter);
442 
443 s32	SetPowerTracking(struct adapter *padapter, u8 enable);
444 void	GetPowerTracking(struct adapter *padapter, u8 *enable);
445 u32	mp_query_psd(struct adapter *pAdapter, u8 *data);
446 void Hal_SetAntenna(struct adapter *pAdapter);
447 void Hal_SetBandwidth(struct adapter *pAdapter);
448 void Hal_SetTxPower(struct adapter *pAdapter);
449 void Hal_SetCarrierSuppressionTx(struct adapter *pAdapter, u8 bStart);
450 void Hal_SetSingleToneTx(struct adapter *pAdapter, u8 bStart);
451 void Hal_SetSingleCarrierTx (struct adapter *pAdapter, u8 bStart);
452 void Hal_SetContinuousTx (struct adapter *pAdapter, u8 bStart);
453 void Hal_SetBandwidth(struct adapter *pAdapter);
454 void Hal_SetDataRate(struct adapter *pAdapter);
455 void Hal_SetChannel(struct adapter *pAdapter);
456 void Hal_SetAntennaPathPower(struct adapter *pAdapter);
457 s32 Hal_SetThermalMeter(struct adapter *pAdapter, u8 target_ther);
458 s32 Hal_SetPowerTracking(struct adapter *padapter, u8 enable);
459 void Hal_GetPowerTracking(struct adapter *padapter, u8 * enable);
460 void Hal_GetThermalMeter(struct adapter *pAdapter, u8 *value);
461 void Hal_mpt_SwitchRfSetting(struct adapter *pAdapter);
462 void Hal_MPT_CCKTxPowerAdjust(struct adapter * Adapter, bool bInCH14);
463 void Hal_MPT_CCKTxPowerAdjustbyIndex(struct adapter *pAdapter, bool beven);
464 void Hal_SetCCKTxPower(struct adapter *pAdapter, u8 * TxPower);
465 void Hal_SetOFDMTxPower(struct adapter *pAdapter, u8 * TxPower);
466 void Hal_TriggerRFThermalMeter(struct adapter *pAdapter);
467 u8 Hal_ReadRFThermalMeter(struct adapter *pAdapter);
468 void Hal_SetCCKContinuousTx(struct adapter *pAdapter, u8 bStart);
469 void Hal_SetOFDMContinuousTx(struct adapter *pAdapter, u8 bStart);
470 void Hal_ProSetCrystalCap (struct adapter *pAdapter , u32 CrystalCapVal);
471 void _rtw_mp_xmit_priv(struct xmit_priv *pxmitpriv);
472 void MP_PHY_SetRFPathSwitch(struct adapter *pAdapter ,bool bMain);
473 
474 #endif /* _RTW_MP_H_ */
475