1 /*
2 * linux/include/linux/mmc/host.h
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * Host driver specific definitions.
9 */
10 #ifndef LINUX_MMC_HOST_H
11 #define LINUX_MMC_HOST_H
12
13 #include <linux/sched.h>
14 #include <linux/device.h>
15 #include <linux/fault-inject.h>
16
17 #include <linux/mmc/core.h>
18 #include <linux/mmc/card.h>
19 #include <linux/mmc/pm.h>
20 #include <linux/dma-direction.h>
21
22 struct mmc_ios {
23 unsigned int clock; /* clock rate */
24 unsigned short vdd;
25 unsigned int power_delay_ms; /* waiting for stable power */
26
27 /* vdd stores the bit number of the selected voltage range from below. */
28
29 unsigned char bus_mode; /* command output mode */
30
31 #define MMC_BUSMODE_OPENDRAIN 1
32 #define MMC_BUSMODE_PUSHPULL 2
33
34 unsigned char chip_select; /* SPI chip select */
35
36 #define MMC_CS_DONTCARE 0
37 #define MMC_CS_HIGH 1
38 #define MMC_CS_LOW 2
39
40 unsigned char power_mode; /* power supply mode */
41
42 #define MMC_POWER_OFF 0
43 #define MMC_POWER_UP 1
44 #define MMC_POWER_ON 2
45 #define MMC_POWER_UNDEFINED 3
46
47 unsigned char bus_width; /* data bus width */
48
49 #define MMC_BUS_WIDTH_1 0
50 #define MMC_BUS_WIDTH_4 2
51 #define MMC_BUS_WIDTH_8 3
52
53 unsigned char timing; /* timing specification used */
54
55 #define MMC_TIMING_LEGACY 0
56 #define MMC_TIMING_MMC_HS 1
57 #define MMC_TIMING_SD_HS 2
58 #define MMC_TIMING_UHS_SDR12 3
59 #define MMC_TIMING_UHS_SDR25 4
60 #define MMC_TIMING_UHS_SDR50 5
61 #define MMC_TIMING_UHS_SDR104 6
62 #define MMC_TIMING_UHS_DDR50 7
63 #define MMC_TIMING_MMC_DDR52 8
64 #define MMC_TIMING_MMC_HS200 9
65 #define MMC_TIMING_MMC_HS400 10
66
67 unsigned char signal_voltage; /* signalling voltage (1.8V or 3.3V) */
68
69 #define MMC_SIGNAL_VOLTAGE_330 0
70 #define MMC_SIGNAL_VOLTAGE_180 1
71 #define MMC_SIGNAL_VOLTAGE_120 2
72
73 unsigned char drv_type; /* driver type (A, B, C, D) */
74
75 #define MMC_SET_DRIVER_TYPE_B 0
76 #define MMC_SET_DRIVER_TYPE_A 1
77 #define MMC_SET_DRIVER_TYPE_C 2
78 #define MMC_SET_DRIVER_TYPE_D 3
79
80 bool enhanced_strobe; /* hs400es selection */
81 };
82
83 struct mmc_host;
84
85 struct mmc_host_ops {
86 /*
87 * It is optional for the host to implement pre_req and post_req in
88 * order to support double buffering of requests (prepare one
89 * request while another request is active).
90 * pre_req() must always be followed by a post_req().
91 * To undo a call made to pre_req(), call post_req() with
92 * a nonzero err condition.
93 */
94 void (*post_req)(struct mmc_host *host, struct mmc_request *req,
95 int err);
96 void (*pre_req)(struct mmc_host *host, struct mmc_request *req);
97 void (*request)(struct mmc_host *host, struct mmc_request *req);
98
99 /*
100 * Avoid calling the next three functions too often or in a "fast
101 * path", since underlaying controller might implement them in an
102 * expensive and/or slow way. Also note that these functions might
103 * sleep, so don't call them in the atomic contexts!
104 */
105
106 /*
107 * Notes to the set_ios callback:
108 * ios->clock might be 0. For some controllers, setting 0Hz
109 * as any other frequency works. However, some controllers
110 * explicitly need to disable the clock. Otherwise e.g. voltage
111 * switching might fail because the SDCLK is not really quiet.
112 */
113 void (*set_ios)(struct mmc_host *host, struct mmc_ios *ios);
114
115 /*
116 * Return values for the get_ro callback should be:
117 * 0 for a read/write card
118 * 1 for a read-only card
119 * -ENOSYS when not supported (equal to NULL callback)
120 * or a negative errno value when something bad happened
121 */
122 int (*get_ro)(struct mmc_host *host);
123
124 /*
125 * Return values for the get_cd callback should be:
126 * 0 for a absent card
127 * 1 for a present card
128 * -ENOSYS when not supported (equal to NULL callback)
129 * or a negative errno value when something bad happened
130 */
131 int (*get_cd)(struct mmc_host *host);
132
133 void (*enable_sdio_irq)(struct mmc_host *host, int enable);
134 void (*ack_sdio_irq)(struct mmc_host *host);
135
136 /* optional callback for HC quirks */
137 void (*init_card)(struct mmc_host *host, struct mmc_card *card);
138
139 int (*start_signal_voltage_switch)(struct mmc_host *host, struct mmc_ios *ios);
140
141 /* Check if the card is pulling dat[0:3] low */
142 int (*card_busy)(struct mmc_host *host);
143
144 /* The tuning command opcode value is different for SD and eMMC cards */
145 int (*execute_tuning)(struct mmc_host *host, u32 opcode);
146
147 /* Prepare HS400 target operating frequency depending host driver */
148 int (*prepare_hs400_tuning)(struct mmc_host *host, struct mmc_ios *ios);
149
150 /* Prepare for switching from HS400 to HS200 */
151 void (*hs400_downgrade)(struct mmc_host *host);
152
153 /* Complete selection of HS400 */
154 void (*hs400_complete)(struct mmc_host *host);
155
156 /* Prepare enhanced strobe depending host driver */
157 void (*hs400_enhanced_strobe)(struct mmc_host *host,
158 struct mmc_ios *ios);
159 int (*select_drive_strength)(struct mmc_card *card,
160 unsigned int max_dtr, int host_drv,
161 int card_drv, int *drv_type);
162 void (*hw_reset)(struct mmc_host *host);
163 void (*card_event)(struct mmc_host *host);
164
165 /*
166 * Optional callback to support controllers with HW issues for multiple
167 * I/O. Returns the number of supported blocks for the request.
168 */
169 int (*multi_io_quirk)(struct mmc_card *card,
170 unsigned int direction, int blk_size);
171 };
172
173 struct mmc_cqe_ops {
174 /* Allocate resources, and make the CQE operational */
175 int (*cqe_enable)(struct mmc_host *host, struct mmc_card *card);
176 /* Free resources, and make the CQE non-operational */
177 void (*cqe_disable)(struct mmc_host *host);
178 /*
179 * Issue a read, write or DCMD request to the CQE. Also deal with the
180 * effect of ->cqe_off().
181 */
182 int (*cqe_request)(struct mmc_host *host, struct mmc_request *mrq);
183 /* Free resources (e.g. DMA mapping) associated with the request */
184 void (*cqe_post_req)(struct mmc_host *host, struct mmc_request *mrq);
185 /*
186 * Prepare the CQE and host controller to accept non-CQ commands. There
187 * is no corresponding ->cqe_on(), instead ->cqe_request() is required
188 * to deal with that.
189 */
190 void (*cqe_off)(struct mmc_host *host);
191 /*
192 * Wait for all CQE tasks to complete. Return an error if recovery
193 * becomes necessary.
194 */
195 int (*cqe_wait_for_idle)(struct mmc_host *host);
196 /*
197 * Notify CQE that a request has timed out. Return false if the request
198 * completed or true if a timeout happened in which case indicate if
199 * recovery is needed.
200 */
201 bool (*cqe_timeout)(struct mmc_host *host, struct mmc_request *mrq,
202 bool *recovery_needed);
203 /*
204 * Stop all CQE activity and prepare the CQE and host controller to
205 * accept recovery commands.
206 */
207 void (*cqe_recovery_start)(struct mmc_host *host);
208 /*
209 * Clear the queue and call mmc_cqe_request_done() on all requests.
210 * Requests that errored will have the error set on the mmc_request
211 * (data->error or cmd->error for DCMD). Requests that did not error
212 * will have zero data bytes transferred.
213 */
214 void (*cqe_recovery_finish)(struct mmc_host *host);
215 };
216
217 struct mmc_async_req {
218 /* active mmc request */
219 struct mmc_request *mrq;
220 /*
221 * Check error status of completed mmc request.
222 * Returns 0 if success otherwise non zero.
223 */
224 enum mmc_blk_status (*err_check)(struct mmc_card *, struct mmc_async_req *);
225 };
226
227 /**
228 * struct mmc_slot - MMC slot functions
229 *
230 * @cd_irq: MMC/SD-card slot hotplug detection IRQ or -EINVAL
231 * @handler_priv: MMC/SD-card slot context
232 *
233 * Some MMC/SD host controllers implement slot-functions like card and
234 * write-protect detection natively. However, a large number of controllers
235 * leave these functions to the CPU. This struct provides a hook to attach
236 * such slot-function drivers.
237 */
238 struct mmc_slot {
239 int cd_irq;
240 bool cd_wake_enabled;
241 void *handler_priv;
242 };
243
244 /**
245 * mmc_context_info - synchronization details for mmc context
246 * @is_done_rcv wake up reason was done request
247 * @is_new_req wake up reason was new request
248 * @is_waiting_last_req mmc context waiting for single running request
249 * @wait wait queue
250 */
251 struct mmc_context_info {
252 bool is_done_rcv;
253 bool is_new_req;
254 bool is_waiting_last_req;
255 wait_queue_head_t wait;
256 };
257
258 struct regulator;
259 struct mmc_pwrseq;
260
261 struct mmc_supply {
262 struct regulator *vmmc; /* Card power supply */
263 struct regulator *vqmmc; /* Optional Vccq supply */
264 };
265
266 struct mmc_ctx {
267 struct task_struct *task;
268 };
269
270 struct mmc_host {
271 struct device *parent;
272 struct device class_dev;
273 int index;
274 const struct mmc_host_ops *ops;
275 struct mmc_pwrseq *pwrseq;
276 unsigned int f_min;
277 unsigned int f_max;
278 unsigned int f_init;
279 u32 ocr_avail;
280 u32 ocr_avail_sdio; /* SDIO-specific OCR */
281 u32 ocr_avail_sd; /* SD-specific OCR */
282 u32 ocr_avail_mmc; /* MMC-specific OCR */
283 #ifdef CONFIG_PM_SLEEP
284 struct notifier_block pm_notify;
285 #endif
286 u32 max_current_330;
287 u32 max_current_300;
288 u32 max_current_180;
289
290 #define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */
291 #define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */
292 #define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */
293 #define MMC_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */
294 #define MMC_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */
295 #define MMC_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */
296 #define MMC_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */
297 #define MMC_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */
298 #define MMC_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */
299 #define MMC_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */
300 #define MMC_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */
301 #define MMC_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */
302 #define MMC_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */
303 #define MMC_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */
304 #define MMC_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */
305 #define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */
306 #define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */
307
308 u32 caps; /* Host capabilities */
309
310 #define MMC_CAP_4_BIT_DATA (1 << 0) /* Can the host do 4 bit transfers */
311 #define MMC_CAP_MMC_HIGHSPEED (1 << 1) /* Can do MMC high-speed timing */
312 #define MMC_CAP_SD_HIGHSPEED (1 << 2) /* Can do SD high-speed timing */
313 #define MMC_CAP_SDIO_IRQ (1 << 3) /* Can signal pending SDIO IRQs */
314 #define MMC_CAP_SPI (1 << 4) /* Talks only SPI protocols */
315 #define MMC_CAP_NEEDS_POLL (1 << 5) /* Needs polling for card-detection */
316 #define MMC_CAP_8_BIT_DATA (1 << 6) /* Can the host do 8 bit transfers */
317 #define MMC_CAP_AGGRESSIVE_PM (1 << 7) /* Suspend (e)MMC/SD at idle */
318 #define MMC_CAP_NONREMOVABLE (1 << 8) /* Nonremovable e.g. eMMC */
319 #define MMC_CAP_WAIT_WHILE_BUSY (1 << 9) /* Waits while card is busy */
320 #define MMC_CAP_ERASE (1 << 10) /* Allow erase/trim commands */
321 #define MMC_CAP_3_3V_DDR (1 << 11) /* Host supports eMMC DDR 3.3V */
322 #define MMC_CAP_1_8V_DDR (1 << 12) /* Host supports eMMC DDR 1.8V */
323 #define MMC_CAP_1_2V_DDR (1 << 13) /* Host supports eMMC DDR 1.2V */
324 #define MMC_CAP_POWER_OFF_CARD (1 << 14) /* Can power off after boot */
325 #define MMC_CAP_BUS_WIDTH_TEST (1 << 15) /* CMD14/CMD19 bus width ok */
326 #define MMC_CAP_UHS_SDR12 (1 << 16) /* Host supports UHS SDR12 mode */
327 #define MMC_CAP_UHS_SDR25 (1 << 17) /* Host supports UHS SDR25 mode */
328 #define MMC_CAP_UHS_SDR50 (1 << 18) /* Host supports UHS SDR50 mode */
329 #define MMC_CAP_UHS_SDR104 (1 << 19) /* Host supports UHS SDR104 mode */
330 #define MMC_CAP_UHS_DDR50 (1 << 20) /* Host supports UHS DDR50 mode */
331 #define MMC_CAP_UHS (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | \
332 MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR104 | \
333 MMC_CAP_UHS_DDR50)
334 /* (1 << 21) is free for reuse */
335 #define MMC_CAP_DRIVER_TYPE_A (1 << 23) /* Host supports Driver Type A */
336 #define MMC_CAP_DRIVER_TYPE_C (1 << 24) /* Host supports Driver Type C */
337 #define MMC_CAP_DRIVER_TYPE_D (1 << 25) /* Host supports Driver Type D */
338 #define MMC_CAP_DONE_COMPLETE (1 << 27) /* RW reqs can be completed within mmc_request_done() */
339 #define MMC_CAP_CD_WAKE (1 << 28) /* Enable card detect wake */
340 #define MMC_CAP_CMD_DURING_TFR (1 << 29) /* Commands during data transfer */
341 #define MMC_CAP_CMD23 (1 << 30) /* CMD23 supported. */
342 #define MMC_CAP_HW_RESET (1 << 31) /* Hardware reset */
343
344 u32 caps2; /* More host capabilities */
345
346 #define MMC_CAP2_BOOTPART_NOACC (1 << 0) /* Boot partition no access */
347 #define MMC_CAP2_FULL_PWR_CYCLE (1 << 2) /* Can do full power cycle */
348 #define MMC_CAP2_HS200_1_8V_SDR (1 << 5) /* can support */
349 #define MMC_CAP2_HS200_1_2V_SDR (1 << 6) /* can support */
350 #define MMC_CAP2_HS200 (MMC_CAP2_HS200_1_8V_SDR | \
351 MMC_CAP2_HS200_1_2V_SDR)
352 #define MMC_CAP2_CD_ACTIVE_HIGH (1 << 10) /* Card-detect signal active high */
353 #define MMC_CAP2_RO_ACTIVE_HIGH (1 << 11) /* Write-protect signal active high */
354 #define MMC_CAP2_NO_PRESCAN_POWERUP (1 << 14) /* Don't power up before scan */
355 #define MMC_CAP2_HS400_1_8V (1 << 15) /* Can support HS400 1.8V */
356 #define MMC_CAP2_HS400_1_2V (1 << 16) /* Can support HS400 1.2V */
357 #define MMC_CAP2_HS400 (MMC_CAP2_HS400_1_8V | \
358 MMC_CAP2_HS400_1_2V)
359 #define MMC_CAP2_HSX00_1_8V (MMC_CAP2_HS200_1_8V_SDR | MMC_CAP2_HS400_1_8V)
360 #define MMC_CAP2_HSX00_1_2V (MMC_CAP2_HS200_1_2V_SDR | MMC_CAP2_HS400_1_2V)
361 #define MMC_CAP2_SDIO_IRQ_NOTHREAD (1 << 17)
362 #define MMC_CAP2_NO_WRITE_PROTECT (1 << 18) /* No physical write protect pin, assume that card is always read-write */
363 #define MMC_CAP2_NO_SDIO (1 << 19) /* Do not send SDIO commands during initialization */
364 #define MMC_CAP2_HS400_ES (1 << 20) /* Host supports enhanced strobe */
365 #define MMC_CAP2_NO_SD (1 << 21) /* Do not send SD commands during initialization */
366 #define MMC_CAP2_NO_MMC (1 << 22) /* Do not send (e)MMC commands during initialization */
367 #define MMC_CAP2_CQE (1 << 23) /* Has eMMC command queue engine */
368 #define MMC_CAP2_CQE_DCMD (1 << 24) /* CQE can issue a direct command */
369 #define MMC_CAP2_AVOID_3_3V (1 << 25) /* Host must negotiate down from 3.3V */
370
371 int fixed_drv_type; /* fixed driver type for non-removable media */
372
373 mmc_pm_flag_t pm_caps; /* supported pm features */
374
375 /* host specific block data */
376 unsigned int max_seg_size; /* see blk_queue_max_segment_size */
377 unsigned short max_segs; /* see blk_queue_max_segments */
378 unsigned short unused;
379 unsigned int max_req_size; /* maximum number of bytes in one req */
380 unsigned int max_blk_size; /* maximum size of one mmc block */
381 unsigned int max_blk_count; /* maximum number of blocks in one req */
382 unsigned int max_busy_timeout; /* max busy timeout in ms */
383
384 /* private data */
385 spinlock_t lock; /* lock for claim and bus ops */
386
387 struct mmc_ios ios; /* current io bus settings */
388
389 /* group bitfields together to minimize padding */
390 unsigned int use_spi_crc:1;
391 unsigned int claimed:1; /* host exclusively claimed */
392 unsigned int bus_dead:1; /* bus has been released */
393 unsigned int can_retune:1; /* re-tuning can be used */
394 unsigned int doing_retune:1; /* re-tuning in progress */
395 unsigned int retune_now:1; /* do re-tuning at next req */
396 unsigned int retune_paused:1; /* re-tuning is temporarily disabled */
397 unsigned int use_blk_mq:1; /* use blk-mq */
398
399 int rescan_disable; /* disable card detection */
400 int rescan_entered; /* used with nonremovable devices */
401
402 int need_retune; /* re-tuning is needed */
403 int hold_retune; /* hold off re-tuning */
404 unsigned int retune_period; /* re-tuning period in secs */
405 struct timer_list retune_timer; /* for periodic re-tuning */
406
407 bool trigger_card_event; /* card_event necessary */
408
409 struct mmc_card *card; /* device attached to this host */
410
411 wait_queue_head_t wq;
412 struct mmc_ctx *claimer; /* context that has host claimed */
413 int claim_cnt; /* "claim" nesting count */
414 struct mmc_ctx default_ctx; /* default context */
415
416 struct delayed_work detect;
417 int detect_change; /* card detect flag */
418 struct mmc_slot slot;
419
420 const struct mmc_bus_ops *bus_ops; /* current bus driver */
421 unsigned int bus_refs; /* reference counter */
422
423 unsigned int sdio_irqs;
424 struct task_struct *sdio_irq_thread;
425 struct delayed_work sdio_irq_work;
426 bool sdio_irq_pending;
427 atomic_t sdio_irq_thread_abort;
428
429 mmc_pm_flag_t pm_flags; /* requested pm features */
430
431 struct led_trigger *led; /* activity led */
432
433 #ifdef CONFIG_REGULATOR
434 bool regulator_enabled; /* regulator state */
435 #endif
436 struct mmc_supply supply;
437
438 struct dentry *debugfs_root;
439
440 /* Ongoing data transfer that allows commands during transfer */
441 struct mmc_request *ongoing_mrq;
442
443 #ifdef CONFIG_FAIL_MMC_REQUEST
444 struct fault_attr fail_mmc_request;
445 #endif
446
447 unsigned int actual_clock; /* Actual HC clock rate */
448
449 unsigned int slotno; /* used for sdio acpi binding */
450
451 int dsr_req; /* DSR value is valid */
452 u32 dsr; /* optional driver stage (DSR) value */
453
454 /* Command Queue Engine (CQE) support */
455 const struct mmc_cqe_ops *cqe_ops;
456 void *cqe_private;
457 int cqe_qdepth;
458 bool cqe_enabled;
459 bool cqe_on;
460
461 unsigned long private[0] ____cacheline_aligned;
462 };
463
464 struct device_node;
465
466 struct mmc_host *mmc_alloc_host(int extra, struct device *);
467 int mmc_add_host(struct mmc_host *);
468 void mmc_remove_host(struct mmc_host *);
469 void mmc_free_host(struct mmc_host *);
470 int mmc_of_parse(struct mmc_host *host);
471 int mmc_of_parse_voltage(struct device_node *np, u32 *mask);
472
mmc_priv(struct mmc_host * host)473 static inline void *mmc_priv(struct mmc_host *host)
474 {
475 return (void *)host->private;
476 }
477
478 #define mmc_host_is_spi(host) ((host)->caps & MMC_CAP_SPI)
479
480 #define mmc_dev(x) ((x)->parent)
481 #define mmc_classdev(x) (&(x)->class_dev)
482 #define mmc_hostname(x) (dev_name(&(x)->class_dev))
483
484 void mmc_detect_change(struct mmc_host *, unsigned long delay);
485 void mmc_request_done(struct mmc_host *, struct mmc_request *);
486 void mmc_command_done(struct mmc_host *host, struct mmc_request *mrq);
487
488 void mmc_cqe_request_done(struct mmc_host *host, struct mmc_request *mrq);
489
mmc_signal_sdio_irq(struct mmc_host * host)490 static inline void mmc_signal_sdio_irq(struct mmc_host *host)
491 {
492 host->ops->enable_sdio_irq(host, 0);
493 host->sdio_irq_pending = true;
494 if (host->sdio_irq_thread)
495 wake_up_process(host->sdio_irq_thread);
496 }
497
498 void sdio_run_irqs(struct mmc_host *host);
499 void sdio_signal_irq(struct mmc_host *host);
500
501 #ifdef CONFIG_REGULATOR
502 int mmc_regulator_get_ocrmask(struct regulator *supply);
503 int mmc_regulator_set_ocr(struct mmc_host *mmc,
504 struct regulator *supply,
505 unsigned short vdd_bit);
506 int mmc_regulator_set_vqmmc(struct mmc_host *mmc, struct mmc_ios *ios);
507 #else
mmc_regulator_get_ocrmask(struct regulator * supply)508 static inline int mmc_regulator_get_ocrmask(struct regulator *supply)
509 {
510 return 0;
511 }
512
mmc_regulator_set_ocr(struct mmc_host * mmc,struct regulator * supply,unsigned short vdd_bit)513 static inline int mmc_regulator_set_ocr(struct mmc_host *mmc,
514 struct regulator *supply,
515 unsigned short vdd_bit)
516 {
517 return 0;
518 }
519
mmc_regulator_set_vqmmc(struct mmc_host * mmc,struct mmc_ios * ios)520 static inline int mmc_regulator_set_vqmmc(struct mmc_host *mmc,
521 struct mmc_ios *ios)
522 {
523 return -EINVAL;
524 }
525 #endif
526
527 u32 mmc_vddrange_to_ocrmask(int vdd_min, int vdd_max);
528 int mmc_regulator_get_supply(struct mmc_host *mmc);
529
mmc_card_is_removable(struct mmc_host * host)530 static inline int mmc_card_is_removable(struct mmc_host *host)
531 {
532 return !(host->caps & MMC_CAP_NONREMOVABLE);
533 }
534
mmc_card_keep_power(struct mmc_host * host)535 static inline int mmc_card_keep_power(struct mmc_host *host)
536 {
537 return host->pm_flags & MMC_PM_KEEP_POWER;
538 }
539
mmc_card_wake_sdio_irq(struct mmc_host * host)540 static inline int mmc_card_wake_sdio_irq(struct mmc_host *host)
541 {
542 return host->pm_flags & MMC_PM_WAKE_SDIO_IRQ;
543 }
544
545 /* TODO: Move to private header */
mmc_card_hs(struct mmc_card * card)546 static inline int mmc_card_hs(struct mmc_card *card)
547 {
548 return card->host->ios.timing == MMC_TIMING_SD_HS ||
549 card->host->ios.timing == MMC_TIMING_MMC_HS;
550 }
551
552 /* TODO: Move to private header */
mmc_card_uhs(struct mmc_card * card)553 static inline int mmc_card_uhs(struct mmc_card *card)
554 {
555 return card->host->ios.timing >= MMC_TIMING_UHS_SDR12 &&
556 card->host->ios.timing <= MMC_TIMING_UHS_DDR50;
557 }
558
559 void mmc_retune_timer_stop(struct mmc_host *host);
560
mmc_retune_needed(struct mmc_host * host)561 static inline void mmc_retune_needed(struct mmc_host *host)
562 {
563 if (host->can_retune)
564 host->need_retune = 1;
565 }
566
mmc_can_retune(struct mmc_host * host)567 static inline bool mmc_can_retune(struct mmc_host *host)
568 {
569 return host->can_retune == 1;
570 }
571
mmc_get_dma_dir(struct mmc_data * data)572 static inline enum dma_data_direction mmc_get_dma_dir(struct mmc_data *data)
573 {
574 return data->flags & MMC_DATA_WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
575 }
576
577 int mmc_send_tuning(struct mmc_host *host, u32 opcode, int *cmd_error);
578 int mmc_abort_tuning(struct mmc_host *host, u32 opcode);
579
580 #endif /* LINUX_MMC_HOST_H */
581
