1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /****************************************************************************** 3 * 4 * Copyright(c) 2016 Realtek Corporation. 5 * 6 * Contact Information: 7 * wlanfae <wlanfae@realtek.com> 8 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, 9 * Hsinchu 300, Taiwan. 10 * 11 * Larry Finger <Larry.Finger@lwfinger.net> 12 * 13 *****************************************************************************/ 14 #ifndef _HALMAC_API_88XX_PCIE_H_ 15 #define _HALMAC_API_88XX_PCIE_H_ 16 17 #include "../halmac_2_platform.h" 18 #include "../halmac_type.h" 19 20 #define LINK_CTRL2_REG_OFFSET 0xA0 21 #define GEN2_CTRL_OFFSET 0x80C 22 #define LINK_STATUS_REG_OFFSET 0x82 23 #define GEN1_SPEED 0x01 24 #define GEN2_SPEED 0x02 25 26 enum halmac_ret_status 27 halmac_init_pcie_cfg_88xx(struct halmac_adapter *halmac_adapter); 28 29 enum halmac_ret_status 30 halmac_deinit_pcie_cfg_88xx(struct halmac_adapter *halmac_adapter); 31 32 enum halmac_ret_status 33 halmac_cfg_rx_aggregation_88xx_pcie(struct halmac_adapter *halmac_adapter, 34 struct halmac_rxagg_cfg *phalmac_rxagg_cfg); 35 36 u8 halmac_reg_read_8_pcie_88xx(struct halmac_adapter *halmac_adapter, 37 u32 halmac_offset); 38 39 enum halmac_ret_status 40 halmac_reg_write_8_pcie_88xx(struct halmac_adapter *halmac_adapter, 41 u32 halmac_offset, u8 halmac_data); 42 43 u16 halmac_reg_read_16_pcie_88xx(struct halmac_adapter *halmac_adapter, 44 u32 halmac_offset); 45 46 enum halmac_ret_status 47 halmac_reg_write_16_pcie_88xx(struct halmac_adapter *halmac_adapter, 48 u32 halmac_offset, u16 halmac_data); 49 50 u32 halmac_reg_read_32_pcie_88xx(struct halmac_adapter *halmac_adapter, 51 u32 halmac_offset); 52 53 enum halmac_ret_status 54 halmac_reg_write_32_pcie_88xx(struct halmac_adapter *halmac_adapter, 55 u32 halmac_offset, u32 halmac_data); 56 57 enum halmac_ret_status halmac_cfg_tx_agg_align_pcie_not_support_88xx( 58 struct halmac_adapter *halmac_adapter, u8 enable, u16 align_size); 59 60 #endif /* _HALMAC_API_88XX_PCIE_H_ */ 61