1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _IOP13XX_PCI_H_
3 #define _IOP13XX_PCI_H_
4 #include <linux/io.h>
5 #include <mach/irqs.h>
6 
7 #include <linux/types.h>
8 
9 extern void __iomem *iop13xx_atue_mem_base;
10 extern void __iomem *iop13xx_atux_mem_base;
11 extern size_t iop13xx_atue_mem_size;
12 extern size_t iop13xx_atux_mem_size;
13 
14 struct pci_sys_data;
15 struct pci_host_bridge;
16 struct hw_pci;
17 int iop13xx_pci_setup(int nr, struct pci_sys_data *sys);
18 int iop13xx_scan_bus(int nr, struct pci_host_bridge *bridge);
19 void iop13xx_atu_select(struct hw_pci *plat_pci);
20 void iop13xx_pci_init(void);
21 void iop13xx_map_pci_memory(void);
22 
23 #define IOP_PCI_STATUS_ERROR (PCI_STATUS_PARITY |	     \
24 			       PCI_STATUS_SIG_TARGET_ABORT | \
25 			       PCI_STATUS_REC_TARGET_ABORT | \
26 			       PCI_STATUS_REC_TARGET_ABORT | \
27 			       PCI_STATUS_REC_MASTER_ABORT | \
28 			       PCI_STATUS_SIG_SYSTEM_ERROR | \
29 	 		       PCI_STATUS_DETECTED_PARITY)
30 
31 #define IOP13XX_ATUE_ATUISR_ERROR (IOP13XX_ATUE_STAT_HALT_ON_ERROR |  \
32 				    IOP13XX_ATUE_STAT_ROOT_SYS_ERR |   \
33 				    IOP13XX_ATUE_STAT_PCI_IFACE_ERR |  \
34 				    IOP13XX_ATUE_STAT_ERR_COR |	       \
35 				    IOP13XX_ATUE_STAT_ERR_UNCOR |      \
36 				    IOP13XX_ATUE_STAT_CRS |	       \
37 				    IOP13XX_ATUE_STAT_DET_PAR_ERR |    \
38 				    IOP13XX_ATUE_STAT_EXT_REC_MABORT | \
39 				    IOP13XX_ATUE_STAT_SIG_TABORT |     \
40 				    IOP13XX_ATUE_STAT_EXT_REC_TABORT | \
41 				    IOP13XX_ATUE_STAT_MASTER_DATA_PAR)
42 
43 #define IOP13XX_ATUX_ATUISR_ERROR (IOP13XX_ATUX_STAT_TX_SCEM |        \
44 				    IOP13XX_ATUX_STAT_REC_SCEM |       \
45 				    IOP13XX_ATUX_STAT_TX_SERR |	       \
46 				    IOP13XX_ATUX_STAT_DET_PAR_ERR |    \
47 				    IOP13XX_ATUX_STAT_INT_REC_MABORT | \
48 				    IOP13XX_ATUX_STAT_REC_SERR |       \
49 				    IOP13XX_ATUX_STAT_EXT_REC_MABORT | \
50 				    IOP13XX_ATUX_STAT_EXT_REC_TABORT | \
51 				    IOP13XX_ATUX_STAT_EXT_SIG_TABORT | \
52 				    IOP13XX_ATUX_STAT_MASTER_DATA_PAR)
53 
54 /* PCI interrupts
55  */
56 #define ATUX_INTA IRQ_IOP13XX_XINT0
57 #define ATUX_INTB IRQ_IOP13XX_XINT1
58 #define ATUX_INTC IRQ_IOP13XX_XINT2
59 #define ATUX_INTD IRQ_IOP13XX_XINT3
60 
61 #define ATUE_INTA IRQ_IOP13XX_ATUE_IMA
62 #define ATUE_INTB IRQ_IOP13XX_ATUE_IMB
63 #define ATUE_INTC IRQ_IOP13XX_ATUE_IMC
64 #define ATUE_INTD IRQ_IOP13XX_ATUE_IMD
65 
66 #endif /* _IOP13XX_PCI_H_ */
67