1 /* 2 * Copyright (C) 2015 Freescale Semiconductor, Inc. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 */ 8 9 #ifndef __LINUX_IMX7_IOMUXC_GPR_H 10 #define __LINUX_IMX7_IOMUXC_GPR_H 11 12 #define IOMUXC_GPR0 0x00 13 #define IOMUXC_GPR1 0x04 14 #define IOMUXC_GPR2 0x08 15 #define IOMUXC_GPR3 0x0c 16 #define IOMUXC_GPR4 0x10 17 #define IOMUXC_GPR5 0x14 18 #define IOMUXC_GPR6 0x18 19 #define IOMUXC_GPR7 0x1c 20 #define IOMUXC_GPR8 0x20 21 #define IOMUXC_GPR9 0x24 22 #define IOMUXC_GPR10 0x28 23 #define IOMUXC_GPR11 0x2c 24 #define IOMUXC_GPR12 0x30 25 #define IOMUXC_GPR13 0x34 26 #define IOMUXC_GPR14 0x38 27 #define IOMUXC_GPR15 0x3c 28 #define IOMUXC_GPR16 0x40 29 #define IOMUXC_GPR17 0x44 30 #define IOMUXC_GPR18 0x48 31 #define IOMUXC_GPR19 0x4c 32 #define IOMUXC_GPR20 0x50 33 #define IOMUXC_GPR21 0x54 34 #define IOMUXC_GPR22 0x58 35 36 /* For imx7d iomux gpr register field define */ 37 #define IMX7D_GPR1_IRQ_MASK (0x1 << 12) 38 #define IMX7D_GPR1_ENET1_TX_CLK_SEL_MASK (0x1 << 13) 39 #define IMX7D_GPR1_ENET2_TX_CLK_SEL_MASK (0x1 << 14) 40 #define IMX7D_GPR1_ENET_TX_CLK_SEL_MASK (0x3 << 13) 41 #define IMX7D_GPR1_ENET1_CLK_DIR_MASK (0x1 << 17) 42 #define IMX7D_GPR1_ENET2_CLK_DIR_MASK (0x1 << 18) 43 #define IMX7D_GPR1_ENET_CLK_DIR_MASK (0x3 << 17) 44 45 #define IMX7D_GPR5_CSI_MUX_CONTROL_MIPI (0x1 << 4) 46 47 #define IMX7D_GPR12_PCIE_PHY_REFCLK_SEL BIT(5) 48 49 #define IMX7D_GPR22_PCIE_PHY_PLL_LOCKED BIT(31) 50 51 #endif /* __LINUX_IMX7_IOMUXC_GPR_H */ 52
