1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 2013 - 2018 Intel Corporation. */
3
4 #ifndef _FM10K_H_
5 #define _FM10K_H_
6
7 #include <linux/types.h>
8 #include <linux/etherdevice.h>
9 #include <linux/cpumask.h>
10 #include <linux/rtnetlink.h>
11 #include <linux/if_vlan.h>
12 #include <linux/pci.h>
13
14 #include "fm10k_pf.h"
15 #include "fm10k_vf.h"
16
17 #define FM10K_MAX_JUMBO_FRAME_SIZE 15342 /* Maximum supported size 15K */
18
19 #define MAX_QUEUES FM10K_MAX_QUEUES_PF
20
21 #define FM10K_MIN_RXD 128
22 #define FM10K_MAX_RXD 4096
23 #define FM10K_DEFAULT_RXD 256
24
25 #define FM10K_MIN_TXD 128
26 #define FM10K_MAX_TXD 4096
27 #define FM10K_DEFAULT_TXD 256
28 #define FM10K_DEFAULT_TX_WORK 256
29
30 #define FM10K_RXBUFFER_256 256
31 #define FM10K_RX_HDR_LEN FM10K_RXBUFFER_256
32 #define FM10K_RXBUFFER_2048 2048
33 #define FM10K_RX_BUFSZ FM10K_RXBUFFER_2048
34
35 /* How many Rx Buffers do we bundle into one write to the hardware ? */
36 #define FM10K_RX_BUFFER_WRITE 16 /* Must be power of 2 */
37
38 #define FM10K_MAX_STATIONS 63
39 struct fm10k_l2_accel {
40 int size;
41 u16 count;
42 u16 dglort;
43 struct rcu_head rcu;
44 struct net_device *macvlan[0];
45 };
46
47 enum fm10k_ring_state_t {
48 __FM10K_TX_DETECT_HANG,
49 __FM10K_HANG_CHECK_ARMED,
50 __FM10K_TX_XPS_INIT_DONE,
51 /* This must be last and is used to calculate BITMAP size */
52 __FM10K_TX_STATE_SIZE__,
53 };
54
55 #define check_for_tx_hang(ring) \
56 test_bit(__FM10K_TX_DETECT_HANG, (ring)->state)
57 #define set_check_for_tx_hang(ring) \
58 set_bit(__FM10K_TX_DETECT_HANG, (ring)->state)
59 #define clear_check_for_tx_hang(ring) \
60 clear_bit(__FM10K_TX_DETECT_HANG, (ring)->state)
61
62 struct fm10k_tx_buffer {
63 struct fm10k_tx_desc *next_to_watch;
64 struct sk_buff *skb;
65 unsigned int bytecount;
66 u16 gso_segs;
67 u16 tx_flags;
68 DEFINE_DMA_UNMAP_ADDR(dma);
69 DEFINE_DMA_UNMAP_LEN(len);
70 };
71
72 struct fm10k_rx_buffer {
73 dma_addr_t dma;
74 struct page *page;
75 u32 page_offset;
76 };
77
78 struct fm10k_queue_stats {
79 u64 packets;
80 u64 bytes;
81 };
82
83 struct fm10k_tx_queue_stats {
84 u64 restart_queue;
85 u64 csum_err;
86 u64 tx_busy;
87 u64 tx_done_old;
88 u64 csum_good;
89 };
90
91 struct fm10k_rx_queue_stats {
92 u64 alloc_failed;
93 u64 csum_err;
94 u64 errors;
95 u64 csum_good;
96 u64 switch_errors;
97 u64 drops;
98 u64 pp_errors;
99 u64 link_errors;
100 u64 length_errors;
101 };
102
103 struct fm10k_ring {
104 struct fm10k_q_vector *q_vector;/* backpointer to host q_vector */
105 struct net_device *netdev; /* netdev ring belongs to */
106 struct device *dev; /* device for DMA mapping */
107 struct fm10k_l2_accel __rcu *l2_accel; /* L2 acceleration list */
108 void *desc; /* descriptor ring memory */
109 union {
110 struct fm10k_tx_buffer *tx_buffer;
111 struct fm10k_rx_buffer *rx_buffer;
112 };
113 u32 __iomem *tail;
114 DECLARE_BITMAP(state, __FM10K_TX_STATE_SIZE__);
115 dma_addr_t dma; /* phys. address of descriptor ring */
116 unsigned int size; /* length in bytes */
117
118 u8 queue_index; /* needed for queue management */
119 u8 reg_idx; /* holds the special value that gets
120 * the hardware register offset
121 * associated with this ring, which is
122 * different for DCB and RSS modes
123 */
124 u8 qos_pc; /* priority class of queue */
125 u16 vid; /* default VLAN ID of queue */
126 u16 count; /* amount of descriptors */
127
128 u16 next_to_alloc;
129 u16 next_to_use;
130 u16 next_to_clean;
131
132 struct fm10k_queue_stats stats;
133 struct u64_stats_sync syncp;
134 union {
135 /* Tx */
136 struct fm10k_tx_queue_stats tx_stats;
137 /* Rx */
138 struct {
139 struct fm10k_rx_queue_stats rx_stats;
140 struct sk_buff *skb;
141 };
142 };
143 } ____cacheline_internodealigned_in_smp;
144
145 struct fm10k_ring_container {
146 struct fm10k_ring *ring; /* pointer to linked list of rings */
147 unsigned int total_bytes; /* total bytes processed this int */
148 unsigned int total_packets; /* total packets processed this int */
149 u16 work_limit; /* total work allowed per interrupt */
150 u16 itr; /* interrupt throttle rate value */
151 u8 itr_scale; /* ITR adjustment based on PCI speed */
152 u8 count; /* total number of rings in vector */
153 };
154
155 #define FM10K_ITR_MAX 0x0FFF /* maximum value for ITR */
156 #define FM10K_ITR_10K 100 /* 100us */
157 #define FM10K_ITR_20K 50 /* 50us */
158 #define FM10K_ITR_40K 25 /* 25us */
159 #define FM10K_ITR_ADAPTIVE 0x8000 /* adaptive interrupt moderation flag */
160
161 #define ITR_IS_ADAPTIVE(itr) (!!(itr & FM10K_ITR_ADAPTIVE))
162
163 #define FM10K_TX_ITR_DEFAULT FM10K_ITR_40K
164 #define FM10K_RX_ITR_DEFAULT FM10K_ITR_20K
165 #define FM10K_ITR_ENABLE (FM10K_ITR_AUTOMASK | FM10K_ITR_MASK_CLEAR)
166
txring_txq(const struct fm10k_ring * ring)167 static inline struct netdev_queue *txring_txq(const struct fm10k_ring *ring)
168 {
169 return &ring->netdev->_tx[ring->queue_index];
170 }
171
172 /* iterator for handling rings in ring container */
173 #define fm10k_for_each_ring(pos, head) \
174 for (pos = &(head).ring[(head).count]; (--pos) >= (head).ring;)
175
176 #define MAX_Q_VECTORS 256
177 #define MIN_Q_VECTORS 1
178 enum fm10k_non_q_vectors {
179 FM10K_MBX_VECTOR,
180 #define NON_Q_VECTORS_VF NON_Q_VECTORS_PF
181 NON_Q_VECTORS_PF
182 };
183
184 #define NON_Q_VECTORS(hw) (((hw)->mac.type == fm10k_mac_pf) ? \
185 NON_Q_VECTORS_PF : \
186 NON_Q_VECTORS_VF)
187 #define MIN_MSIX_COUNT(hw) (MIN_Q_VECTORS + NON_Q_VECTORS(hw))
188
189 struct fm10k_q_vector {
190 struct fm10k_intfc *interface;
191 u32 __iomem *itr; /* pointer to ITR register for this vector */
192 u16 v_idx; /* index of q_vector within interface array */
193 struct fm10k_ring_container rx, tx;
194
195 struct napi_struct napi;
196 cpumask_t affinity_mask;
197 char name[IFNAMSIZ + 9];
198
199 #ifdef CONFIG_DEBUG_FS
200 struct dentry *dbg_q_vector;
201 #endif /* CONFIG_DEBUG_FS */
202 struct rcu_head rcu; /* to avoid race with update stats on free */
203
204 /* for dynamic allocation of rings associated with this q_vector */
205 struct fm10k_ring ring[0] ____cacheline_internodealigned_in_smp;
206 };
207
208 enum fm10k_ring_f_enum {
209 RING_F_RSS,
210 RING_F_QOS,
211 RING_F_ARRAY_SIZE /* must be last in enum set */
212 };
213
214 struct fm10k_ring_feature {
215 u16 limit; /* upper limit on feature indices */
216 u16 indices; /* current value of indices */
217 u16 mask; /* Mask used for feature to ring mapping */
218 u16 offset; /* offset to start of feature */
219 };
220
221 struct fm10k_iov_data {
222 unsigned int num_vfs;
223 unsigned int next_vf_mbx;
224 struct rcu_head rcu;
225 struct fm10k_vf_info vf_info[0];
226 };
227
228 struct fm10k_udp_port {
229 struct list_head list;
230 sa_family_t sa_family;
231 __be16 port;
232 };
233
234 enum fm10k_macvlan_request_type {
235 FM10K_UC_MAC_REQUEST,
236 FM10K_MC_MAC_REQUEST,
237 FM10K_VLAN_REQUEST
238 };
239
240 struct fm10k_macvlan_request {
241 enum fm10k_macvlan_request_type type;
242 struct list_head list;
243 union {
244 struct fm10k_mac_request {
245 u8 addr[ETH_ALEN];
246 u16 glort;
247 u16 vid;
248 } mac;
249 struct fm10k_vlan_request {
250 u32 vid;
251 u8 vsi;
252 } vlan;
253 };
254 bool set;
255 };
256
257 /* one work queue for entire driver */
258 extern struct workqueue_struct *fm10k_workqueue;
259
260 /* The following enumeration contains flags which indicate or enable modified
261 * driver behaviors. To avoid race conditions, the flags are stored in
262 * a BITMAP in the fm10k_intfc structure. The BITMAP should be accessed using
263 * atomic *_bit() operations.
264 */
265 enum fm10k_flags_t {
266 FM10K_FLAG_RESET_REQUESTED,
267 FM10K_FLAG_RSS_FIELD_IPV4_UDP,
268 FM10K_FLAG_RSS_FIELD_IPV6_UDP,
269 FM10K_FLAG_SWPRI_CONFIG,
270 /* __FM10K_FLAGS_SIZE__ is used to calculate the size of
271 * interface->flags and must be the last value in this
272 * enumeration.
273 */
274 __FM10K_FLAGS_SIZE__
275 };
276
277 enum fm10k_state_t {
278 __FM10K_RESETTING,
279 __FM10K_RESET_DETACHED,
280 __FM10K_RESET_SUSPENDED,
281 __FM10K_DOWN,
282 __FM10K_SERVICE_SCHED,
283 __FM10K_SERVICE_REQUEST,
284 __FM10K_SERVICE_DISABLE,
285 __FM10K_MACVLAN_SCHED,
286 __FM10K_MACVLAN_REQUEST,
287 __FM10K_MACVLAN_DISABLE,
288 __FM10K_LINK_DOWN,
289 __FM10K_UPDATING_STATS,
290 /* This value must be last and determines the BITMAP size */
291 __FM10K_STATE_SIZE__,
292 };
293
294 struct fm10k_intfc {
295 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
296 struct net_device *netdev;
297 struct fm10k_l2_accel *l2_accel; /* pointer to L2 acceleration list */
298 struct pci_dev *pdev;
299 DECLARE_BITMAP(state, __FM10K_STATE_SIZE__);
300
301 /* Access flag values using atomic *_bit() operations */
302 DECLARE_BITMAP(flags, __FM10K_FLAGS_SIZE__);
303
304 int xcast_mode;
305
306 /* Tx fast path data */
307 int num_tx_queues;
308 u16 tx_itr;
309
310 /* Rx fast path data */
311 int num_rx_queues;
312 u16 rx_itr;
313
314 /* TX */
315 struct fm10k_ring *tx_ring[MAX_QUEUES] ____cacheline_aligned_in_smp;
316
317 u64 restart_queue;
318 u64 tx_busy;
319 u64 tx_csum_errors;
320 u64 alloc_failed;
321 u64 rx_csum_errors;
322
323 u64 tx_bytes_nic;
324 u64 tx_packets_nic;
325 u64 rx_bytes_nic;
326 u64 rx_packets_nic;
327 u64 rx_drops_nic;
328 u64 rx_overrun_pf;
329 u64 rx_overrun_vf;
330
331 /* Debug Statistics */
332 u64 hw_sm_mbx_full;
333 u64 hw_csum_tx_good;
334 u64 hw_csum_rx_good;
335 u64 rx_switch_errors;
336 u64 rx_drops;
337 u64 rx_pp_errors;
338 u64 rx_link_errors;
339 u64 rx_length_errors;
340
341 u32 tx_timeout_count;
342
343 /* RX */
344 struct fm10k_ring *rx_ring[MAX_QUEUES];
345
346 /* Queueing vectors */
347 struct fm10k_q_vector *q_vector[MAX_Q_VECTORS];
348 struct msix_entry *msix_entries;
349 int num_q_vectors; /* current number of q_vectors for device */
350 struct fm10k_ring_feature ring_feature[RING_F_ARRAY_SIZE];
351
352 /* SR-IOV information management structure */
353 struct fm10k_iov_data *iov_data;
354
355 struct fm10k_hw_stats stats;
356 struct fm10k_hw hw;
357 /* Mailbox lock */
358 spinlock_t mbx_lock;
359 u32 __iomem *uc_addr;
360 u32 __iomem *sw_addr;
361 u16 msg_enable;
362 u16 tx_ring_count;
363 u16 rx_ring_count;
364 struct timer_list service_timer;
365 struct work_struct service_task;
366 unsigned long next_stats_update;
367 unsigned long next_tx_hang_check;
368 unsigned long last_reset;
369 unsigned long link_down_event;
370 bool host_ready;
371 bool lport_map_failed;
372
373 u32 reta[FM10K_RETA_SIZE];
374 u32 rssrk[FM10K_RSSRK_SIZE];
375
376 /* UDP encapsulation port tracking information */
377 struct list_head vxlan_port;
378 struct list_head geneve_port;
379
380 /* MAC/VLAN update queue */
381 struct list_head macvlan_requests;
382 struct delayed_work macvlan_task;
383 /* MAC/VLAN update queue lock */
384 spinlock_t macvlan_lock;
385
386 #ifdef CONFIG_DEBUG_FS
387 struct dentry *dbg_intfc;
388 #endif /* CONFIG_DEBUG_FS */
389
390 #ifdef CONFIG_DCB
391 u8 pfc_en;
392 #endif
393 u8 rx_pause;
394
395 /* GLORT resources in use by PF */
396 u16 glort;
397 u16 glort_count;
398
399 /* VLAN ID for updating multicast/unicast lists */
400 u16 vid;
401 };
402
fm10k_mbx_lock(struct fm10k_intfc * interface)403 static inline void fm10k_mbx_lock(struct fm10k_intfc *interface)
404 {
405 spin_lock(&interface->mbx_lock);
406 }
407
fm10k_mbx_unlock(struct fm10k_intfc * interface)408 static inline void fm10k_mbx_unlock(struct fm10k_intfc *interface)
409 {
410 spin_unlock(&interface->mbx_lock);
411 }
412
fm10k_mbx_trylock(struct fm10k_intfc * interface)413 static inline int fm10k_mbx_trylock(struct fm10k_intfc *interface)
414 {
415 return spin_trylock(&interface->mbx_lock);
416 }
417
418 /* fm10k_test_staterr - test bits in Rx descriptor status and error fields */
fm10k_test_staterr(union fm10k_rx_desc * rx_desc,const u32 stat_err_bits)419 static inline __le32 fm10k_test_staterr(union fm10k_rx_desc *rx_desc,
420 const u32 stat_err_bits)
421 {
422 return rx_desc->d.staterr & cpu_to_le32(stat_err_bits);
423 }
424
425 /* fm10k_desc_unused - calculate if we have unused descriptors */
fm10k_desc_unused(struct fm10k_ring * ring)426 static inline u16 fm10k_desc_unused(struct fm10k_ring *ring)
427 {
428 s16 unused = ring->next_to_clean - ring->next_to_use - 1;
429
430 return likely(unused < 0) ? unused + ring->count : unused;
431 }
432
433 #define FM10K_TX_DESC(R, i) \
434 (&(((struct fm10k_tx_desc *)((R)->desc))[i]))
435 #define FM10K_RX_DESC(R, i) \
436 (&(((union fm10k_rx_desc *)((R)->desc))[i]))
437
438 #define FM10K_MAX_TXD_PWR 14
439 #define FM10K_MAX_DATA_PER_TXD (1u << FM10K_MAX_TXD_PWR)
440
441 /* Tx Descriptors needed, worst case */
442 #define TXD_USE_COUNT(S) DIV_ROUND_UP((S), FM10K_MAX_DATA_PER_TXD)
443 #define DESC_NEEDED (MAX_SKB_FRAGS + 4)
444
445 enum fm10k_tx_flags {
446 /* Tx offload flags */
447 FM10K_TX_FLAGS_CSUM = 0x01,
448 };
449
450 /* This structure is stored as little endian values as that is the native
451 * format of the Rx descriptor. The ordering of these fields is reversed
452 * from the actual ftag header to allow for a single bswap to take care
453 * of placing all of the values in network order
454 */
455 union fm10k_ftag_info {
456 __le64 ftag;
457 struct {
458 /* dglort and sglort combined into a single 32bit desc read */
459 __le32 glort;
460 /* upper 16 bits of VLAN are reserved 0 for swpri_type_user */
461 __le32 vlan;
462 } d;
463 struct {
464 __le16 dglort;
465 __le16 sglort;
466 __le16 vlan;
467 __le16 swpri_type_user;
468 } w;
469 };
470
471 struct fm10k_cb {
472 union {
473 __le64 tstamp;
474 unsigned long ts_tx_timeout;
475 };
476 union fm10k_ftag_info fi;
477 };
478
479 #define FM10K_CB(skb) ((struct fm10k_cb *)(skb)->cb)
480
481 /* main */
482 extern char fm10k_driver_name[];
483 extern const char fm10k_driver_version[];
484 int fm10k_init_queueing_scheme(struct fm10k_intfc *interface);
485 void fm10k_clear_queueing_scheme(struct fm10k_intfc *interface);
486 __be16 fm10k_tx_encap_offload(struct sk_buff *skb);
487 netdev_tx_t fm10k_xmit_frame_ring(struct sk_buff *skb,
488 struct fm10k_ring *tx_ring);
489 void fm10k_tx_timeout_reset(struct fm10k_intfc *interface);
490 u64 fm10k_get_tx_pending(struct fm10k_ring *ring, bool in_sw);
491 bool fm10k_check_tx_hang(struct fm10k_ring *tx_ring);
492 void fm10k_alloc_rx_buffers(struct fm10k_ring *rx_ring, u16 cleaned_count);
493
494 /* PCI */
495 void fm10k_mbx_free_irq(struct fm10k_intfc *);
496 int fm10k_mbx_request_irq(struct fm10k_intfc *);
497 void fm10k_qv_free_irq(struct fm10k_intfc *interface);
498 int fm10k_qv_request_irq(struct fm10k_intfc *interface);
499 int fm10k_register_pci_driver(void);
500 void fm10k_unregister_pci_driver(void);
501 void fm10k_up(struct fm10k_intfc *interface);
502 void fm10k_down(struct fm10k_intfc *interface);
503 void fm10k_update_stats(struct fm10k_intfc *interface);
504 void fm10k_service_event_schedule(struct fm10k_intfc *interface);
505 void fm10k_macvlan_schedule(struct fm10k_intfc *interface);
506 void fm10k_update_rx_drop_en(struct fm10k_intfc *interface);
507
508 /* Netdev */
509 struct net_device *fm10k_alloc_netdev(const struct fm10k_info *info);
510 int fm10k_setup_rx_resources(struct fm10k_ring *);
511 int fm10k_setup_tx_resources(struct fm10k_ring *);
512 void fm10k_free_rx_resources(struct fm10k_ring *);
513 void fm10k_free_tx_resources(struct fm10k_ring *);
514 void fm10k_clean_all_rx_rings(struct fm10k_intfc *);
515 void fm10k_clean_all_tx_rings(struct fm10k_intfc *);
516 void fm10k_unmap_and_free_tx_resource(struct fm10k_ring *,
517 struct fm10k_tx_buffer *);
518 void fm10k_restore_rx_state(struct fm10k_intfc *);
519 void fm10k_reset_rx_state(struct fm10k_intfc *);
520 int fm10k_setup_tc(struct net_device *dev, u8 tc);
521 int fm10k_open(struct net_device *netdev);
522 int fm10k_close(struct net_device *netdev);
523 int fm10k_queue_vlan_request(struct fm10k_intfc *interface, u32 vid,
524 u8 vsi, bool set);
525 int fm10k_queue_mac_request(struct fm10k_intfc *interface, u16 glort,
526 const unsigned char *addr, u16 vid, bool set);
527 void fm10k_clear_macvlan_queue(struct fm10k_intfc *interface,
528 u16 glort, bool vlans);
529
530 /* Ethtool */
531 void fm10k_set_ethtool_ops(struct net_device *dev);
532 void fm10k_write_reta(struct fm10k_intfc *interface, const u32 *indir);
533
534 /* IOV */
535 s32 fm10k_iov_event(struct fm10k_intfc *interface);
536 s32 fm10k_iov_mbx(struct fm10k_intfc *interface);
537 void fm10k_iov_suspend(struct pci_dev *pdev);
538 int fm10k_iov_resume(struct pci_dev *pdev);
539 void fm10k_iov_disable(struct pci_dev *pdev);
540 int fm10k_iov_configure(struct pci_dev *pdev, int num_vfs);
541 s32 fm10k_iov_update_pvid(struct fm10k_intfc *interface, u16 glort, u16 pvid);
542 int fm10k_ndo_set_vf_mac(struct net_device *netdev, int vf_idx, u8 *mac);
543 int fm10k_ndo_set_vf_vlan(struct net_device *netdev,
544 int vf_idx, u16 vid, u8 qos, __be16 vlan_proto);
545 int fm10k_ndo_set_vf_bw(struct net_device *netdev, int vf_idx,
546 int __always_unused min_rate, int max_rate);
547 int fm10k_ndo_get_vf_config(struct net_device *netdev,
548 int vf_idx, struct ifla_vf_info *ivi);
549
550 /* DebugFS */
551 #ifdef CONFIG_DEBUG_FS
552 void fm10k_dbg_q_vector_init(struct fm10k_q_vector *q_vector);
553 void fm10k_dbg_q_vector_exit(struct fm10k_q_vector *q_vector);
554 void fm10k_dbg_intfc_init(struct fm10k_intfc *interface);
555 void fm10k_dbg_intfc_exit(struct fm10k_intfc *interface);
556 void fm10k_dbg_init(void);
557 void fm10k_dbg_exit(void);
558 #else
fm10k_dbg_q_vector_init(struct fm10k_q_vector * q_vector)559 static inline void fm10k_dbg_q_vector_init(struct fm10k_q_vector *q_vector) {}
fm10k_dbg_q_vector_exit(struct fm10k_q_vector * q_vector)560 static inline void fm10k_dbg_q_vector_exit(struct fm10k_q_vector *q_vector) {}
fm10k_dbg_intfc_init(struct fm10k_intfc * interface)561 static inline void fm10k_dbg_intfc_init(struct fm10k_intfc *interface) {}
fm10k_dbg_intfc_exit(struct fm10k_intfc * interface)562 static inline void fm10k_dbg_intfc_exit(struct fm10k_intfc *interface) {}
fm10k_dbg_init(void)563 static inline void fm10k_dbg_init(void) {}
fm10k_dbg_exit(void)564 static inline void fm10k_dbg_exit(void) {}
565 #endif /* CONFIG_DEBUG_FS */
566
567 /* DCB */
568 #ifdef CONFIG_DCB
569 void fm10k_dcbnl_set_ops(struct net_device *dev);
570 #else
fm10k_dcbnl_set_ops(struct net_device * dev)571 static inline void fm10k_dcbnl_set_ops(struct net_device *dev) {}
572 #endif
573 #endif /* _FM10K_H_ */
574
