1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /**************************************************************************** 3 * Driver for Solarflare network controllers and boards 4 * Copyright 2018 Solarflare Communications Inc. 5 * Copyright 2019-2020 Xilinx Inc. 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License version 2 as published 9 * by the Free Software Foundation, incorporated herein by reference. 10 */ 11 #ifndef EFX_EF100_NIC_H 12 #define EFX_EF100_NIC_H 13 14 #include "net_driver.h" 15 #include "nic_common.h" 16 17 extern const struct efx_nic_type ef100_pf_nic_type; 18 extern const struct efx_nic_type ef100_vf_nic_type; 19 20 int ef100_probe_netdev_pf(struct efx_nic *efx); 21 int ef100_probe_vf(struct efx_nic *efx); 22 void ef100_remove(struct efx_nic *efx); 23 24 enum { 25 EF100_STAT_port_tx_bytes = GENERIC_STAT_COUNT, 26 EF100_STAT_port_tx_packets, 27 EF100_STAT_port_tx_pause, 28 EF100_STAT_port_tx_unicast, 29 EF100_STAT_port_tx_multicast, 30 EF100_STAT_port_tx_broadcast, 31 EF100_STAT_port_tx_lt64, 32 EF100_STAT_port_tx_64, 33 EF100_STAT_port_tx_65_to_127, 34 EF100_STAT_port_tx_128_to_255, 35 EF100_STAT_port_tx_256_to_511, 36 EF100_STAT_port_tx_512_to_1023, 37 EF100_STAT_port_tx_1024_to_15xx, 38 EF100_STAT_port_tx_15xx_to_jumbo, 39 EF100_STAT_port_rx_bytes, 40 EF100_STAT_port_rx_packets, 41 EF100_STAT_port_rx_good, 42 EF100_STAT_port_rx_bad, 43 EF100_STAT_port_rx_pause, 44 EF100_STAT_port_rx_unicast, 45 EF100_STAT_port_rx_multicast, 46 EF100_STAT_port_rx_broadcast, 47 EF100_STAT_port_rx_lt64, 48 EF100_STAT_port_rx_64, 49 EF100_STAT_port_rx_65_to_127, 50 EF100_STAT_port_rx_128_to_255, 51 EF100_STAT_port_rx_256_to_511, 52 EF100_STAT_port_rx_512_to_1023, 53 EF100_STAT_port_rx_1024_to_15xx, 54 EF100_STAT_port_rx_15xx_to_jumbo, 55 EF100_STAT_port_rx_gtjumbo, 56 EF100_STAT_port_rx_bad_gtjumbo, 57 EF100_STAT_port_rx_align_error, 58 EF100_STAT_port_rx_length_error, 59 EF100_STAT_port_rx_overflow, 60 EF100_STAT_port_rx_nodesc_drops, 61 EF100_STAT_COUNT 62 }; 63 64 struct ef100_nic_data { 65 struct efx_nic *efx; 66 struct efx_buffer mcdi_buf; 67 u32 datapath_caps; 68 u32 datapath_caps2; 69 u32 datapath_caps3; 70 unsigned int pf_index; 71 u16 warm_boot_count; 72 u8 port_id[ETH_ALEN]; 73 DECLARE_BITMAP(evq_phases, EFX_MAX_CHANNELS); 74 u64 stats[EF100_STAT_COUNT]; 75 u32 base_mport; 76 bool have_mport; /* base_mport was populated successfully */ 77 bool grp_mae; /* MAE Privilege */ 78 u16 tso_max_hdr_len; 79 u16 tso_max_payload_num_segs; 80 u16 tso_max_frames; 81 unsigned int tso_max_payload_len; 82 }; 83 84 #define efx_ef100_has_cap(caps, flag) \ 85 (!!((caps) & BIT_ULL(MC_CMD_GET_CAPABILITIES_V4_OUT_ ## flag ## _LBN))) 86 87 int efx_ef100_init_datapath_caps(struct efx_nic *efx); 88 int ef100_phy_probe(struct efx_nic *efx); 89 int ef100_filter_table_probe(struct efx_nic *efx); 90 91 #endif /* EFX_EF100_NIC_H */ 92
