1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * DPAA2 Ethernet Switch declarations 4 * 5 * Copyright 2014-2016 Freescale Semiconductor Inc. 6 * Copyright 2017-2018 NXP 7 * 8 */ 9 10 #ifndef __ETHSW_H 11 #define __ETHSW_H 12 13 #include <linux/netdevice.h> 14 #include <linux/etherdevice.h> 15 #include <linux/rtnetlink.h> 16 #include <linux/if_vlan.h> 17 #include <uapi/linux/if_bridge.h> 18 #include <net/switchdev.h> 19 #include <linux/if_bridge.h> 20 21 #include "dpsw.h" 22 23 /* Number of IRQs supported */ 24 #define DPSW_IRQ_NUM 2 25 26 #define ETHSW_VLAN_MEMBER 1 27 #define ETHSW_VLAN_UNTAGGED 2 28 #define ETHSW_VLAN_PVID 4 29 #define ETHSW_VLAN_GLOBAL 8 30 31 /* Maximum Frame Length supported by HW (currently 10k) */ 32 #define DPAA2_MFL (10 * 1024) 33 #define ETHSW_MAX_FRAME_LENGTH (DPAA2_MFL - VLAN_ETH_HLEN - ETH_FCS_LEN) 34 #define ETHSW_L2_MAX_FRM(mtu) ((mtu) + VLAN_ETH_HLEN + ETH_FCS_LEN) 35 36 extern const struct ethtool_ops ethsw_port_ethtool_ops; 37 38 struct ethsw_core; 39 40 /* Per port private data */ 41 struct ethsw_port_priv { 42 struct net_device *netdev; 43 u16 idx; 44 struct ethsw_core *ethsw_data; 45 u8 link_state; 46 u8 stp_state; 47 bool flood; 48 49 u8 vlans[VLAN_VID_MASK + 1]; 50 u16 pvid; 51 struct net_device *bridge_dev; 52 }; 53 54 /* Switch data */ 55 struct ethsw_core { 56 struct device *dev; 57 struct fsl_mc_io *mc_io; 58 u16 dpsw_handle; 59 struct dpsw_attr sw_attr; 60 int dev_id; 61 struct ethsw_port_priv **ports; 62 63 u8 vlans[VLAN_VID_MASK + 1]; 64 bool learning; 65 }; 66 67 #endif /* __ETHSW_H */ 68
