1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright 2014-2016 Freescale Semiconductor Inc. 4 * Copyright 2017-2018 NXP 5 * 6 */ 7 8 #ifndef __FSL_DPSW_CMD_H 9 #define __FSL_DPSW_CMD_H 10 11 /* DPSW Version */ 12 #define DPSW_VER_MAJOR 8 13 #define DPSW_VER_MINOR 0 14 15 #define DPSW_CMD_BASE_VERSION 1 16 #define DPSW_CMD_ID_OFFSET 4 17 18 #define DPSW_CMD_ID(id) (((id) << DPSW_CMD_ID_OFFSET) | DPSW_CMD_BASE_VERSION) 19 20 /* Command IDs */ 21 #define DPSW_CMDID_CLOSE DPSW_CMD_ID(0x800) 22 #define DPSW_CMDID_OPEN DPSW_CMD_ID(0x802) 23 24 #define DPSW_CMDID_GET_API_VERSION DPSW_CMD_ID(0xa02) 25 26 #define DPSW_CMDID_ENABLE DPSW_CMD_ID(0x002) 27 #define DPSW_CMDID_DISABLE DPSW_CMD_ID(0x003) 28 #define DPSW_CMDID_GET_ATTR DPSW_CMD_ID(0x004) 29 #define DPSW_CMDID_RESET DPSW_CMD_ID(0x005) 30 31 #define DPSW_CMDID_SET_IRQ_ENABLE DPSW_CMD_ID(0x012) 32 33 #define DPSW_CMDID_SET_IRQ_MASK DPSW_CMD_ID(0x014) 34 35 #define DPSW_CMDID_GET_IRQ_STATUS DPSW_CMD_ID(0x016) 36 #define DPSW_CMDID_CLEAR_IRQ_STATUS DPSW_CMD_ID(0x017) 37 38 #define DPSW_CMDID_IF_SET_TCI DPSW_CMD_ID(0x030) 39 #define DPSW_CMDID_IF_SET_STP DPSW_CMD_ID(0x031) 40 41 #define DPSW_CMDID_IF_GET_COUNTER DPSW_CMD_ID(0x034) 42 43 #define DPSW_CMDID_IF_ENABLE DPSW_CMD_ID(0x03D) 44 #define DPSW_CMDID_IF_DISABLE DPSW_CMD_ID(0x03E) 45 46 #define DPSW_CMDID_IF_SET_MAX_FRAME_LENGTH DPSW_CMD_ID(0x044) 47 48 #define DPSW_CMDID_IF_GET_LINK_STATE DPSW_CMD_ID(0x046) 49 #define DPSW_CMDID_IF_SET_FLOODING DPSW_CMD_ID(0x047) 50 #define DPSW_CMDID_IF_SET_BROADCAST DPSW_CMD_ID(0x048) 51 52 #define DPSW_CMDID_IF_GET_TCI DPSW_CMD_ID(0x04A) 53 54 #define DPSW_CMDID_IF_SET_LINK_CFG DPSW_CMD_ID(0x04C) 55 56 #define DPSW_CMDID_VLAN_ADD DPSW_CMD_ID(0x060) 57 #define DPSW_CMDID_VLAN_ADD_IF DPSW_CMD_ID(0x061) 58 #define DPSW_CMDID_VLAN_ADD_IF_UNTAGGED DPSW_CMD_ID(0x062) 59 60 #define DPSW_CMDID_VLAN_REMOVE_IF DPSW_CMD_ID(0x064) 61 #define DPSW_CMDID_VLAN_REMOVE_IF_UNTAGGED DPSW_CMD_ID(0x065) 62 #define DPSW_CMDID_VLAN_REMOVE_IF_FLOODING DPSW_CMD_ID(0x066) 63 #define DPSW_CMDID_VLAN_REMOVE DPSW_CMD_ID(0x067) 64 65 #define DPSW_CMDID_FDB_ADD_UNICAST DPSW_CMD_ID(0x084) 66 #define DPSW_CMDID_FDB_REMOVE_UNICAST DPSW_CMD_ID(0x085) 67 #define DPSW_CMDID_FDB_ADD_MULTICAST DPSW_CMD_ID(0x086) 68 #define DPSW_CMDID_FDB_REMOVE_MULTICAST DPSW_CMD_ID(0x087) 69 #define DPSW_CMDID_FDB_SET_LEARNING_MODE DPSW_CMD_ID(0x088) 70 71 /* Macros for accessing command fields smaller than 1byte */ 72 #define DPSW_MASK(field) \ 73 GENMASK(DPSW_##field##_SHIFT + DPSW_##field##_SIZE - 1, \ 74 DPSW_##field##_SHIFT) 75 #define dpsw_set_field(var, field, val) \ 76 ((var) |= (((val) << DPSW_##field##_SHIFT) & DPSW_MASK(field))) 77 #define dpsw_get_field(var, field) \ 78 (((var) & DPSW_MASK(field)) >> DPSW_##field##_SHIFT) 79 #define dpsw_get_bit(var, bit) \ 80 (((var) >> (bit)) & GENMASK(0, 0)) 81 82 struct dpsw_cmd_open { 83 __le32 dpsw_id; 84 }; 85 86 #define DPSW_COMPONENT_TYPE_SHIFT 0 87 #define DPSW_COMPONENT_TYPE_SIZE 4 88 89 struct dpsw_cmd_create { 90 /* cmd word 0 */ 91 __le16 num_ifs; 92 u8 max_fdbs; 93 u8 max_meters_per_if; 94 /* from LSB: only the first 4 bits */ 95 u8 component_type; 96 u8 pad[3]; 97 /* cmd word 1 */ 98 __le16 max_vlans; 99 __le16 max_fdb_entries; 100 __le16 fdb_aging_time; 101 __le16 max_fdb_mc_groups; 102 /* cmd word 2 */ 103 __le64 options; 104 }; 105 106 struct dpsw_cmd_destroy { 107 __le32 dpsw_id; 108 }; 109 110 #define DPSW_ENABLE_SHIFT 0 111 #define DPSW_ENABLE_SIZE 1 112 113 struct dpsw_rsp_is_enabled { 114 /* from LSB: enable:1 */ 115 u8 enabled; 116 }; 117 118 struct dpsw_cmd_set_irq_enable { 119 u8 enable_state; 120 u8 pad[3]; 121 u8 irq_index; 122 }; 123 124 struct dpsw_cmd_get_irq_enable { 125 __le32 pad; 126 u8 irq_index; 127 }; 128 129 struct dpsw_rsp_get_irq_enable { 130 u8 enable_state; 131 }; 132 133 struct dpsw_cmd_set_irq_mask { 134 __le32 mask; 135 u8 irq_index; 136 }; 137 138 struct dpsw_cmd_get_irq_mask { 139 __le32 pad; 140 u8 irq_index; 141 }; 142 143 struct dpsw_rsp_get_irq_mask { 144 __le32 mask; 145 }; 146 147 struct dpsw_cmd_get_irq_status { 148 __le32 status; 149 u8 irq_index; 150 }; 151 152 struct dpsw_rsp_get_irq_status { 153 __le32 status; 154 }; 155 156 struct dpsw_cmd_clear_irq_status { 157 __le32 status; 158 u8 irq_index; 159 }; 160 161 #define DPSW_COMPONENT_TYPE_SHIFT 0 162 #define DPSW_COMPONENT_TYPE_SIZE 4 163 164 struct dpsw_rsp_get_attr { 165 /* cmd word 0 */ 166 __le16 num_ifs; 167 u8 max_fdbs; 168 u8 num_fdbs; 169 __le16 max_vlans; 170 __le16 num_vlans; 171 /* cmd word 1 */ 172 __le16 max_fdb_entries; 173 __le16 fdb_aging_time; 174 __le32 dpsw_id; 175 /* cmd word 2 */ 176 __le16 mem_size; 177 __le16 max_fdb_mc_groups; 178 u8 max_meters_per_if; 179 /* from LSB only the first 4 bits */ 180 u8 component_type; 181 __le16 pad; 182 /* cmd word 3 */ 183 __le64 options; 184 }; 185 186 struct dpsw_cmd_if_set_flooding { 187 __le16 if_id; 188 /* from LSB: enable:1 */ 189 u8 enable; 190 }; 191 192 struct dpsw_cmd_if_set_broadcast { 193 __le16 if_id; 194 /* from LSB: enable:1 */ 195 u8 enable; 196 }; 197 198 #define DPSW_VLAN_ID_SHIFT 0 199 #define DPSW_VLAN_ID_SIZE 12 200 #define DPSW_DEI_SHIFT 12 201 #define DPSW_DEI_SIZE 1 202 #define DPSW_PCP_SHIFT 13 203 #define DPSW_PCP_SIZE 3 204 205 struct dpsw_cmd_if_set_tci { 206 __le16 if_id; 207 /* from LSB: VLAN_ID:12 DEI:1 PCP:3 */ 208 __le16 conf; 209 }; 210 211 struct dpsw_cmd_if_get_tci { 212 __le16 if_id; 213 }; 214 215 struct dpsw_rsp_if_get_tci { 216 __le16 pad; 217 __le16 vlan_id; 218 u8 dei; 219 u8 pcp; 220 }; 221 222 #define DPSW_STATE_SHIFT 0 223 #define DPSW_STATE_SIZE 4 224 225 struct dpsw_cmd_if_set_stp { 226 __le16 if_id; 227 __le16 vlan_id; 228 /* only the first LSB 4 bits */ 229 u8 state; 230 }; 231 232 #define DPSW_COUNTER_TYPE_SHIFT 0 233 #define DPSW_COUNTER_TYPE_SIZE 5 234 235 struct dpsw_cmd_if_get_counter { 236 __le16 if_id; 237 /* from LSB: type:5 */ 238 u8 type; 239 }; 240 241 struct dpsw_rsp_if_get_counter { 242 __le64 pad; 243 __le64 counter; 244 }; 245 246 struct dpsw_cmd_if { 247 __le16 if_id; 248 }; 249 250 struct dpsw_cmd_if_set_max_frame_length { 251 __le16 if_id; 252 __le16 frame_length; 253 }; 254 255 struct dpsw_cmd_if_set_link_cfg { 256 /* cmd word 0 */ 257 __le16 if_id; 258 u8 pad[6]; 259 /* cmd word 1 */ 260 __le32 rate; 261 __le32 pad1; 262 /* cmd word 2 */ 263 __le64 options; 264 }; 265 266 struct dpsw_cmd_if_get_link_state { 267 __le16 if_id; 268 }; 269 270 #define DPSW_UP_SHIFT 0 271 #define DPSW_UP_SIZE 1 272 273 struct dpsw_rsp_if_get_link_state { 274 /* cmd word 0 */ 275 __le32 pad0; 276 u8 up; 277 u8 pad1[3]; 278 /* cmd word 1 */ 279 __le32 rate; 280 __le32 pad2; 281 /* cmd word 2 */ 282 __le64 options; 283 }; 284 285 struct dpsw_vlan_add { 286 __le16 fdb_id; 287 __le16 vlan_id; 288 }; 289 290 struct dpsw_cmd_vlan_manage_if { 291 /* cmd word 0 */ 292 __le16 pad0; 293 __le16 vlan_id; 294 __le32 pad1; 295 /* cmd word 1-4 */ 296 __le64 if_id[4]; 297 }; 298 299 struct dpsw_cmd_vlan_remove { 300 __le16 pad; 301 __le16 vlan_id; 302 }; 303 304 struct dpsw_cmd_fdb_add { 305 __le32 pad; 306 __le16 fdb_aging_time; 307 __le16 num_fdb_entries; 308 }; 309 310 struct dpsw_rsp_fdb_add { 311 __le16 fdb_id; 312 }; 313 314 struct dpsw_cmd_fdb_remove { 315 __le16 fdb_id; 316 }; 317 318 #define DPSW_ENTRY_TYPE_SHIFT 0 319 #define DPSW_ENTRY_TYPE_SIZE 4 320 321 struct dpsw_cmd_fdb_unicast_op { 322 /* cmd word 0 */ 323 __le16 fdb_id; 324 u8 mac_addr[6]; 325 /* cmd word 1 */ 326 __le16 if_egress; 327 /* only the first 4 bits from LSB */ 328 u8 type; 329 }; 330 331 struct dpsw_cmd_fdb_multicast_op { 332 /* cmd word 0 */ 333 __le16 fdb_id; 334 __le16 num_ifs; 335 /* only the first 4 bits from LSB */ 336 u8 type; 337 u8 pad[3]; 338 /* cmd word 1 */ 339 u8 mac_addr[6]; 340 __le16 pad2; 341 /* cmd word 2-5 */ 342 __le64 if_id[4]; 343 }; 344 345 #define DPSW_LEARNING_MODE_SHIFT 0 346 #define DPSW_LEARNING_MODE_SIZE 4 347 348 struct dpsw_cmd_fdb_set_learning_mode { 349 __le16 fdb_id; 350 /* only the first 4 bits from LSB */ 351 u8 mode; 352 }; 353 354 struct dpsw_rsp_get_api_version { 355 __le16 version_major; 356 __le16 version_minor; 357 }; 358 359 #endif /* __FSL_DPSW_CMD_H */ 360