1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ 2 /* Copyright 2013-2016 Freescale Semiconductor Inc. 3 * Copyright 2016 NXP 4 */ 5 #ifndef _FSL_DPNI_CMD_H 6 #define _FSL_DPNI_CMD_H 7 8 #include "dpni.h" 9 10 /* DPNI Version */ 11 #define DPNI_VER_MAJOR 7 12 #define DPNI_VER_MINOR 0 13 #define DPNI_CMD_BASE_VERSION 1 14 #define DPNI_CMD_ID_OFFSET 4 15 16 #define DPNI_CMD(id) (((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_BASE_VERSION) 17 18 #define DPNI_CMDID_OPEN DPNI_CMD(0x801) 19 #define DPNI_CMDID_CLOSE DPNI_CMD(0x800) 20 #define DPNI_CMDID_CREATE DPNI_CMD(0x901) 21 #define DPNI_CMDID_DESTROY DPNI_CMD(0x900) 22 #define DPNI_CMDID_GET_API_VERSION DPNI_CMD(0xa01) 23 24 #define DPNI_CMDID_ENABLE DPNI_CMD(0x002) 25 #define DPNI_CMDID_DISABLE DPNI_CMD(0x003) 26 #define DPNI_CMDID_GET_ATTR DPNI_CMD(0x004) 27 #define DPNI_CMDID_RESET DPNI_CMD(0x005) 28 #define DPNI_CMDID_IS_ENABLED DPNI_CMD(0x006) 29 30 #define DPNI_CMDID_SET_IRQ DPNI_CMD(0x010) 31 #define DPNI_CMDID_GET_IRQ DPNI_CMD(0x011) 32 #define DPNI_CMDID_SET_IRQ_ENABLE DPNI_CMD(0x012) 33 #define DPNI_CMDID_GET_IRQ_ENABLE DPNI_CMD(0x013) 34 #define DPNI_CMDID_SET_IRQ_MASK DPNI_CMD(0x014) 35 #define DPNI_CMDID_GET_IRQ_MASK DPNI_CMD(0x015) 36 #define DPNI_CMDID_GET_IRQ_STATUS DPNI_CMD(0x016) 37 #define DPNI_CMDID_CLEAR_IRQ_STATUS DPNI_CMD(0x017) 38 39 #define DPNI_CMDID_SET_POOLS DPNI_CMD(0x200) 40 #define DPNI_CMDID_SET_ERRORS_BEHAVIOR DPNI_CMD(0x20B) 41 42 #define DPNI_CMDID_GET_QDID DPNI_CMD(0x210) 43 #define DPNI_CMDID_GET_TX_DATA_OFFSET DPNI_CMD(0x212) 44 #define DPNI_CMDID_GET_LINK_STATE DPNI_CMD(0x215) 45 #define DPNI_CMDID_SET_MAX_FRAME_LENGTH DPNI_CMD(0x216) 46 #define DPNI_CMDID_GET_MAX_FRAME_LENGTH DPNI_CMD(0x217) 47 #define DPNI_CMDID_SET_LINK_CFG DPNI_CMD(0x21A) 48 #define DPNI_CMDID_SET_TX_SHAPING DPNI_CMD(0x21B) 49 50 #define DPNI_CMDID_SET_MCAST_PROMISC DPNI_CMD(0x220) 51 #define DPNI_CMDID_GET_MCAST_PROMISC DPNI_CMD(0x221) 52 #define DPNI_CMDID_SET_UNICAST_PROMISC DPNI_CMD(0x222) 53 #define DPNI_CMDID_GET_UNICAST_PROMISC DPNI_CMD(0x223) 54 #define DPNI_CMDID_SET_PRIM_MAC DPNI_CMD(0x224) 55 #define DPNI_CMDID_GET_PRIM_MAC DPNI_CMD(0x225) 56 #define DPNI_CMDID_ADD_MAC_ADDR DPNI_CMD(0x226) 57 #define DPNI_CMDID_REMOVE_MAC_ADDR DPNI_CMD(0x227) 58 #define DPNI_CMDID_CLR_MAC_FILTERS DPNI_CMD(0x228) 59 60 #define DPNI_CMDID_SET_RX_TC_DIST DPNI_CMD(0x235) 61 62 #define DPNI_CMDID_ADD_FS_ENT DPNI_CMD(0x244) 63 #define DPNI_CMDID_REMOVE_FS_ENT DPNI_CMD(0x245) 64 #define DPNI_CMDID_CLR_FS_ENT DPNI_CMD(0x246) 65 66 #define DPNI_CMDID_GET_STATISTICS DPNI_CMD(0x25D) 67 #define DPNI_CMDID_GET_QUEUE DPNI_CMD(0x25F) 68 #define DPNI_CMDID_SET_QUEUE DPNI_CMD(0x260) 69 #define DPNI_CMDID_GET_TAILDROP DPNI_CMD(0x261) 70 #define DPNI_CMDID_SET_TAILDROP DPNI_CMD(0x262) 71 72 #define DPNI_CMDID_GET_PORT_MAC_ADDR DPNI_CMD(0x263) 73 74 #define DPNI_CMDID_GET_BUFFER_LAYOUT DPNI_CMD(0x264) 75 #define DPNI_CMDID_SET_BUFFER_LAYOUT DPNI_CMD(0x265) 76 77 #define DPNI_CMDID_SET_TX_CONFIRMATION_MODE DPNI_CMD(0x266) 78 #define DPNI_CMDID_SET_CONGESTION_NOTIFICATION DPNI_CMD(0x267) 79 #define DPNI_CMDID_GET_CONGESTION_NOTIFICATION DPNI_CMD(0x268) 80 #define DPNI_CMDID_SET_EARLY_DROP DPNI_CMD(0x269) 81 #define DPNI_CMDID_GET_EARLY_DROP DPNI_CMD(0x26A) 82 #define DPNI_CMDID_GET_OFFLOAD DPNI_CMD(0x26B) 83 #define DPNI_CMDID_SET_OFFLOAD DPNI_CMD(0x26C) 84 85 /* Macros for accessing command fields smaller than 1byte */ 86 #define DPNI_MASK(field) \ 87 GENMASK(DPNI_##field##_SHIFT + DPNI_##field##_SIZE - 1, \ 88 DPNI_##field##_SHIFT) 89 90 #define dpni_set_field(var, field, val) \ 91 ((var) |= (((val) << DPNI_##field##_SHIFT) & DPNI_MASK(field))) 92 #define dpni_get_field(var, field) \ 93 (((var) & DPNI_MASK(field)) >> DPNI_##field##_SHIFT) 94 95 struct dpni_cmd_open { 96 __le32 dpni_id; 97 }; 98 99 #define DPNI_BACKUP_POOL(val, order) (((val) & 0x1) << (order)) 100 struct dpni_cmd_set_pools { 101 /* cmd word 0 */ 102 u8 num_dpbp; 103 u8 backup_pool_mask; 104 __le16 pad; 105 /* cmd word 0..4 */ 106 __le32 dpbp_id[DPNI_MAX_DPBP]; 107 /* cmd word 4..6 */ 108 __le16 buffer_size[DPNI_MAX_DPBP]; 109 }; 110 111 /* The enable indication is always the least significant bit */ 112 #define DPNI_ENABLE_SHIFT 0 113 #define DPNI_ENABLE_SIZE 1 114 115 struct dpni_rsp_is_enabled { 116 u8 enabled; 117 }; 118 119 struct dpni_rsp_get_irq { 120 /* response word 0 */ 121 __le32 irq_val; 122 __le32 pad; 123 /* response word 1 */ 124 __le64 irq_addr; 125 /* response word 2 */ 126 __le32 irq_num; 127 __le32 type; 128 }; 129 130 struct dpni_cmd_set_irq_enable { 131 u8 enable; 132 u8 pad[3]; 133 u8 irq_index; 134 }; 135 136 struct dpni_cmd_get_irq_enable { 137 __le32 pad; 138 u8 irq_index; 139 }; 140 141 struct dpni_rsp_get_irq_enable { 142 u8 enabled; 143 }; 144 145 struct dpni_cmd_set_irq_mask { 146 __le32 mask; 147 u8 irq_index; 148 }; 149 150 struct dpni_cmd_get_irq_mask { 151 __le32 pad; 152 u8 irq_index; 153 }; 154 155 struct dpni_rsp_get_irq_mask { 156 __le32 mask; 157 }; 158 159 struct dpni_cmd_get_irq_status { 160 __le32 status; 161 u8 irq_index; 162 }; 163 164 struct dpni_rsp_get_irq_status { 165 __le32 status; 166 }; 167 168 struct dpni_cmd_clear_irq_status { 169 __le32 status; 170 u8 irq_index; 171 }; 172 173 struct dpni_rsp_get_attr { 174 /* response word 0 */ 175 __le32 options; 176 u8 num_queues; 177 u8 num_tcs; 178 u8 mac_filter_entries; 179 u8 pad0; 180 /* response word 1 */ 181 u8 vlan_filter_entries; 182 u8 pad1; 183 u8 qos_entries; 184 u8 pad2; 185 __le16 fs_entries; 186 __le16 pad3; 187 /* response word 2 */ 188 u8 qos_key_size; 189 u8 fs_key_size; 190 __le16 wriop_version; 191 }; 192 193 #define DPNI_ERROR_ACTION_SHIFT 0 194 #define DPNI_ERROR_ACTION_SIZE 4 195 #define DPNI_FRAME_ANN_SHIFT 4 196 #define DPNI_FRAME_ANN_SIZE 1 197 198 struct dpni_cmd_set_errors_behavior { 199 __le32 errors; 200 /* from least significant bit: error_action:4, set_frame_annotation:1 */ 201 u8 flags; 202 }; 203 204 /* There are 3 separate commands for configuring Rx, Tx and Tx confirmation 205 * buffer layouts, but they all share the same parameters. 206 * If one of the functions changes, below structure needs to be split. 207 */ 208 209 #define DPNI_PASS_TS_SHIFT 0 210 #define DPNI_PASS_TS_SIZE 1 211 #define DPNI_PASS_PR_SHIFT 1 212 #define DPNI_PASS_PR_SIZE 1 213 #define DPNI_PASS_FS_SHIFT 2 214 #define DPNI_PASS_FS_SIZE 1 215 216 struct dpni_cmd_get_buffer_layout { 217 u8 qtype; 218 }; 219 220 struct dpni_rsp_get_buffer_layout { 221 /* response word 0 */ 222 u8 pad0[6]; 223 /* from LSB: pass_timestamp:1, parser_result:1, frame_status:1 */ 224 u8 flags; 225 u8 pad1; 226 /* response word 1 */ 227 __le16 private_data_size; 228 __le16 data_align; 229 __le16 head_room; 230 __le16 tail_room; 231 }; 232 233 struct dpni_cmd_set_buffer_layout { 234 /* cmd word 0 */ 235 u8 qtype; 236 u8 pad0[3]; 237 __le16 options; 238 /* from LSB: pass_timestamp:1, parser_result:1, frame_status:1 */ 239 u8 flags; 240 u8 pad1; 241 /* cmd word 1 */ 242 __le16 private_data_size; 243 __le16 data_align; 244 __le16 head_room; 245 __le16 tail_room; 246 }; 247 248 struct dpni_cmd_set_offload { 249 u8 pad[3]; 250 u8 dpni_offload; 251 __le32 config; 252 }; 253 254 struct dpni_cmd_get_offload { 255 u8 pad[3]; 256 u8 dpni_offload; 257 }; 258 259 struct dpni_rsp_get_offload { 260 __le32 pad; 261 __le32 config; 262 }; 263 264 struct dpni_cmd_get_qdid { 265 u8 qtype; 266 }; 267 268 struct dpni_rsp_get_qdid { 269 __le16 qdid; 270 }; 271 272 struct dpni_rsp_get_tx_data_offset { 273 __le16 data_offset; 274 }; 275 276 struct dpni_cmd_get_statistics { 277 u8 page_number; 278 }; 279 280 struct dpni_rsp_get_statistics { 281 __le64 counter[DPNI_STATISTICS_CNT]; 282 }; 283 284 struct dpni_cmd_set_link_cfg { 285 /* cmd word 0 */ 286 __le64 pad0; 287 /* cmd word 1 */ 288 __le32 rate; 289 __le32 pad1; 290 /* cmd word 2 */ 291 __le64 options; 292 }; 293 294 #define DPNI_LINK_STATE_SHIFT 0 295 #define DPNI_LINK_STATE_SIZE 1 296 297 struct dpni_rsp_get_link_state { 298 /* response word 0 */ 299 __le32 pad0; 300 /* from LSB: up:1 */ 301 u8 flags; 302 u8 pad1[3]; 303 /* response word 1 */ 304 __le32 rate; 305 __le32 pad2; 306 /* response word 2 */ 307 __le64 options; 308 }; 309 310 struct dpni_cmd_set_max_frame_length { 311 __le16 max_frame_length; 312 }; 313 314 struct dpni_rsp_get_max_frame_length { 315 __le16 max_frame_length; 316 }; 317 318 struct dpni_cmd_set_multicast_promisc { 319 u8 enable; 320 }; 321 322 struct dpni_rsp_get_multicast_promisc { 323 u8 enabled; 324 }; 325 326 struct dpni_cmd_set_unicast_promisc { 327 u8 enable; 328 }; 329 330 struct dpni_rsp_get_unicast_promisc { 331 u8 enabled; 332 }; 333 334 struct dpni_cmd_set_primary_mac_addr { 335 __le16 pad; 336 u8 mac_addr[6]; 337 }; 338 339 struct dpni_rsp_get_primary_mac_addr { 340 __le16 pad; 341 u8 mac_addr[6]; 342 }; 343 344 struct dpni_rsp_get_port_mac_addr { 345 __le16 pad; 346 u8 mac_addr[6]; 347 }; 348 349 struct dpni_cmd_add_mac_addr { 350 __le16 pad; 351 u8 mac_addr[6]; 352 }; 353 354 struct dpni_cmd_remove_mac_addr { 355 __le16 pad; 356 u8 mac_addr[6]; 357 }; 358 359 #define DPNI_UNICAST_FILTERS_SHIFT 0 360 #define DPNI_UNICAST_FILTERS_SIZE 1 361 #define DPNI_MULTICAST_FILTERS_SHIFT 1 362 #define DPNI_MULTICAST_FILTERS_SIZE 1 363 364 struct dpni_cmd_clear_mac_filters { 365 /* from LSB: unicast:1, multicast:1 */ 366 u8 flags; 367 }; 368 369 #define DPNI_DIST_MODE_SHIFT 0 370 #define DPNI_DIST_MODE_SIZE 4 371 #define DPNI_MISS_ACTION_SHIFT 4 372 #define DPNI_MISS_ACTION_SIZE 4 373 374 struct dpni_cmd_set_rx_tc_dist { 375 /* cmd word 0 */ 376 __le16 dist_size; 377 u8 tc_id; 378 /* from LSB: dist_mode:4, miss_action:4 */ 379 u8 flags; 380 __le16 pad0; 381 __le16 default_flow_id; 382 /* cmd word 1..5 */ 383 __le64 pad1[5]; 384 /* cmd word 6 */ 385 __le64 key_cfg_iova; 386 }; 387 388 /* dpni_set_rx_tc_dist extension (structure of the DMA-able memory at 389 * key_cfg_iova) 390 */ 391 struct dpni_mask_cfg { 392 u8 mask; 393 u8 offset; 394 }; 395 396 #define DPNI_EFH_TYPE_SHIFT 0 397 #define DPNI_EFH_TYPE_SIZE 4 398 #define DPNI_EXTRACT_TYPE_SHIFT 0 399 #define DPNI_EXTRACT_TYPE_SIZE 4 400 401 struct dpni_dist_extract { 402 /* word 0 */ 403 u8 prot; 404 /* EFH type stored in the 4 least significant bits */ 405 u8 efh_type; 406 u8 size; 407 u8 offset; 408 __le32 field; 409 /* word 1 */ 410 u8 hdr_index; 411 u8 constant; 412 u8 num_of_repeats; 413 u8 num_of_byte_masks; 414 /* Extraction type is stored in the 4 LSBs */ 415 u8 extract_type; 416 u8 pad[3]; 417 /* word 2 */ 418 struct dpni_mask_cfg masks[4]; 419 }; 420 421 struct dpni_ext_set_rx_tc_dist { 422 /* extension word 0 */ 423 u8 num_extracts; 424 u8 pad[7]; 425 /* words 1..25 */ 426 struct dpni_dist_extract extracts[DPKG_MAX_NUM_OF_EXTRACTS]; 427 }; 428 429 struct dpni_cmd_get_queue { 430 u8 qtype; 431 u8 tc; 432 u8 index; 433 }; 434 435 #define DPNI_DEST_TYPE_SHIFT 0 436 #define DPNI_DEST_TYPE_SIZE 4 437 #define DPNI_STASH_CTRL_SHIFT 6 438 #define DPNI_STASH_CTRL_SIZE 1 439 #define DPNI_HOLD_ACTIVE_SHIFT 7 440 #define DPNI_HOLD_ACTIVE_SIZE 1 441 442 struct dpni_rsp_get_queue { 443 /* response word 0 */ 444 __le64 pad0; 445 /* response word 1 */ 446 __le32 dest_id; 447 __le16 pad1; 448 u8 dest_prio; 449 /* From LSB: dest_type:4, pad:2, flc_stash_ctrl:1, hold_active:1 */ 450 u8 flags; 451 /* response word 2 */ 452 __le64 flc; 453 /* response word 3 */ 454 __le64 user_context; 455 /* response word 4 */ 456 __le32 fqid; 457 __le16 qdbin; 458 }; 459 460 struct dpni_cmd_set_queue { 461 /* cmd word 0 */ 462 u8 qtype; 463 u8 tc; 464 u8 index; 465 u8 options; 466 __le32 pad0; 467 /* cmd word 1 */ 468 __le32 dest_id; 469 __le16 pad1; 470 u8 dest_prio; 471 u8 flags; 472 /* cmd word 2 */ 473 __le64 flc; 474 /* cmd word 3 */ 475 __le64 user_context; 476 }; 477 478 struct dpni_cmd_set_taildrop { 479 /* cmd word 0 */ 480 u8 congestion_point; 481 u8 qtype; 482 u8 tc; 483 u8 index; 484 __le32 pad0; 485 /* cmd word 1 */ 486 /* Only least significant bit is relevant */ 487 u8 enable; 488 u8 pad1; 489 u8 units; 490 u8 pad2; 491 __le32 threshold; 492 }; 493 494 struct dpni_cmd_get_taildrop { 495 u8 congestion_point; 496 u8 qtype; 497 u8 tc; 498 u8 index; 499 }; 500 501 struct dpni_rsp_get_taildrop { 502 /* cmd word 0 */ 503 __le64 pad0; 504 /* cmd word 1 */ 505 /* only least significant bit is relevant */ 506 u8 enable; 507 u8 pad1; 508 u8 units; 509 u8 pad2; 510 __le32 threshold; 511 }; 512 513 struct dpni_rsp_get_api_version { 514 __le16 major; 515 __le16 minor; 516 }; 517 518 #endif /* _FSL_DPNI_CMD_H */ 519