1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /****************************************************************************** 3 * 4 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. 5 * 6 ******************************************************************************/ 7 #ifndef __HAL_COMMON_H__ 8 #define __HAL_COMMON_H__ 9 10 #include "HalVerDef.h" 11 #include "hal_pg.h" 12 #include "hal_phy.h" 13 #include "hal_phy_reg.h" 14 #include "hal_com_reg.h" 15 #include "hal_com_phycfg.h" 16 17 /*------------------------------ Tx Desc definition Macro ------------------------*/ 18 /* pragma mark -- Tx Desc related definition. -- */ 19 /* */ 20 /* */ 21 /* Rate */ 22 /* */ 23 /* CCK Rates, TxHT = 0 */ 24 #define DESC_RATE1M 0x00 25 #define DESC_RATE2M 0x01 26 #define DESC_RATE5_5M 0x02 27 #define DESC_RATE11M 0x03 28 29 /* OFDM Rates, TxHT = 0 */ 30 #define DESC_RATE6M 0x04 31 #define DESC_RATE9M 0x05 32 #define DESC_RATE12M 0x06 33 #define DESC_RATE18M 0x07 34 #define DESC_RATE24M 0x08 35 #define DESC_RATE36M 0x09 36 #define DESC_RATE48M 0x0a 37 #define DESC_RATE54M 0x0b 38 39 /* MCS Rates, TxHT = 1 */ 40 #define DESC_RATEMCS0 0x0c 41 #define DESC_RATEMCS1 0x0d 42 #define DESC_RATEMCS2 0x0e 43 #define DESC_RATEMCS3 0x0f 44 #define DESC_RATEMCS4 0x10 45 #define DESC_RATEMCS5 0x11 46 #define DESC_RATEMCS6 0x12 47 #define DESC_RATEMCS7 0x13 48 #define DESC_RATEMCS8 0x14 49 #define DESC_RATEMCS9 0x15 50 #define DESC_RATEMCS10 0x16 51 #define DESC_RATEMCS11 0x17 52 #define DESC_RATEMCS12 0x18 53 #define DESC_RATEMCS13 0x19 54 #define DESC_RATEMCS14 0x1a 55 #define DESC_RATEMCS15 0x1b 56 #define DESC_RATEMCS16 0x1C 57 #define DESC_RATEMCS17 0x1D 58 #define DESC_RATEMCS18 0x1E 59 #define DESC_RATEMCS19 0x1F 60 #define DESC_RATEMCS20 0x20 61 #define DESC_RATEMCS21 0x21 62 #define DESC_RATEMCS22 0x22 63 #define DESC_RATEMCS23 0x23 64 #define DESC_RATEMCS24 0x24 65 #define DESC_RATEMCS25 0x25 66 #define DESC_RATEMCS26 0x26 67 #define DESC_RATEMCS27 0x27 68 #define DESC_RATEMCS28 0x28 69 #define DESC_RATEMCS29 0x29 70 #define DESC_RATEMCS30 0x2A 71 #define DESC_RATEMCS31 0x2B 72 #define DESC_RATEVHTSS1MCS0 0x2C 73 #define DESC_RATEVHTSS1MCS1 0x2D 74 #define DESC_RATEVHTSS1MCS2 0x2E 75 #define DESC_RATEVHTSS1MCS3 0x2F 76 #define DESC_RATEVHTSS1MCS4 0x30 77 #define DESC_RATEVHTSS1MCS5 0x31 78 #define DESC_RATEVHTSS1MCS6 0x32 79 #define DESC_RATEVHTSS1MCS7 0x33 80 #define DESC_RATEVHTSS1MCS8 0x34 81 #define DESC_RATEVHTSS1MCS9 0x35 82 #define DESC_RATEVHTSS2MCS0 0x36 83 #define DESC_RATEVHTSS2MCS1 0x37 84 #define DESC_RATEVHTSS2MCS2 0x38 85 #define DESC_RATEVHTSS2MCS3 0x39 86 #define DESC_RATEVHTSS2MCS4 0x3A 87 #define DESC_RATEVHTSS2MCS5 0x3B 88 #define DESC_RATEVHTSS2MCS6 0x3C 89 #define DESC_RATEVHTSS2MCS7 0x3D 90 #define DESC_RATEVHTSS2MCS8 0x3E 91 #define DESC_RATEVHTSS2MCS9 0x3F 92 #define DESC_RATEVHTSS3MCS0 0x40 93 #define DESC_RATEVHTSS3MCS1 0x41 94 #define DESC_RATEVHTSS3MCS2 0x42 95 #define DESC_RATEVHTSS3MCS3 0x43 96 #define DESC_RATEVHTSS3MCS4 0x44 97 #define DESC_RATEVHTSS3MCS5 0x45 98 #define DESC_RATEVHTSS3MCS6 0x46 99 #define DESC_RATEVHTSS3MCS7 0x47 100 #define DESC_RATEVHTSS3MCS8 0x48 101 #define DESC_RATEVHTSS3MCS9 0x49 102 #define DESC_RATEVHTSS4MCS0 0x4A 103 #define DESC_RATEVHTSS4MCS1 0x4B 104 #define DESC_RATEVHTSS4MCS2 0x4C 105 #define DESC_RATEVHTSS4MCS3 0x4D 106 #define DESC_RATEVHTSS4MCS4 0x4E 107 #define DESC_RATEVHTSS4MCS5 0x4F 108 #define DESC_RATEVHTSS4MCS6 0x50 109 #define DESC_RATEVHTSS4MCS7 0x51 110 #define DESC_RATEVHTSS4MCS8 0x52 111 #define DESC_RATEVHTSS4MCS9 0x53 112 113 #define HDATA_RATE(rate)\ 114 (rate ==DESC_RATE1M)?"CCK_1M":\ 115 (rate ==DESC_RATE2M)?"CCK_2M":\ 116 (rate ==DESC_RATE5_5M)?"CCK5_5M":\ 117 (rate ==DESC_RATE11M)?"CCK_11M":\ 118 (rate ==DESC_RATE6M)?"OFDM_6M":\ 119 (rate ==DESC_RATE9M)?"OFDM_9M":\ 120 (rate ==DESC_RATE12M)?"OFDM_12M":\ 121 (rate ==DESC_RATE18M)?"OFDM_18M":\ 122 (rate ==DESC_RATE24M)?"OFDM_24M":\ 123 (rate ==DESC_RATE36M)?"OFDM_36M":\ 124 (rate ==DESC_RATE48M)?"OFDM_48M":\ 125 (rate ==DESC_RATE54M)?"OFDM_54M":\ 126 (rate ==DESC_RATEMCS0)?"MCS0":\ 127 (rate ==DESC_RATEMCS1)?"MCS1":\ 128 (rate ==DESC_RATEMCS2)?"MCS2":\ 129 (rate ==DESC_RATEMCS3)?"MCS3":\ 130 (rate ==DESC_RATEMCS4)?"MCS4":\ 131 (rate ==DESC_RATEMCS5)?"MCS5":\ 132 (rate ==DESC_RATEMCS6)?"MCS6":\ 133 (rate ==DESC_RATEMCS7)?"MCS7":\ 134 (rate ==DESC_RATEMCS8)?"MCS8":\ 135 (rate ==DESC_RATEMCS9)?"MCS9":\ 136 (rate ==DESC_RATEMCS10)?"MCS10":\ 137 (rate ==DESC_RATEMCS11)?"MCS11":\ 138 (rate ==DESC_RATEMCS12)?"MCS12":\ 139 (rate ==DESC_RATEMCS13)?"MCS13":\ 140 (rate ==DESC_RATEMCS14)?"MCS14":\ 141 (rate ==DESC_RATEMCS15)?"MCS15":\ 142 (rate ==DESC_RATEVHTSS1MCS0)?"VHTSS1MCS0":\ 143 (rate ==DESC_RATEVHTSS1MCS1)?"VHTSS1MCS1":\ 144 (rate ==DESC_RATEVHTSS1MCS2)?"VHTSS1MCS2":\ 145 (rate ==DESC_RATEVHTSS1MCS3)?"VHTSS1MCS3":\ 146 (rate ==DESC_RATEVHTSS1MCS4)?"VHTSS1MCS4":\ 147 (rate ==DESC_RATEVHTSS1MCS5)?"VHTSS1MCS5":\ 148 (rate ==DESC_RATEVHTSS1MCS6)?"VHTSS1MCS6":\ 149 (rate ==DESC_RATEVHTSS1MCS7)?"VHTSS1MCS7":\ 150 (rate ==DESC_RATEVHTSS1MCS8)?"VHTSS1MCS8":\ 151 (rate ==DESC_RATEVHTSS1MCS9)?"VHTSS1MCS9":\ 152 (rate ==DESC_RATEVHTSS2MCS0)?"VHTSS2MCS0":\ 153 (rate ==DESC_RATEVHTSS2MCS1)?"VHTSS2MCS1":\ 154 (rate ==DESC_RATEVHTSS2MCS2)?"VHTSS2MCS2":\ 155 (rate ==DESC_RATEVHTSS2MCS3)?"VHTSS2MCS3":\ 156 (rate ==DESC_RATEVHTSS2MCS4)?"VHTSS2MCS4":\ 157 (rate ==DESC_RATEVHTSS2MCS5)?"VHTSS2MCS5":\ 158 (rate ==DESC_RATEVHTSS2MCS6)?"VHTSS2MCS6":\ 159 (rate ==DESC_RATEVHTSS2MCS7)?"VHTSS2MCS7":\ 160 (rate ==DESC_RATEVHTSS2MCS8)?"VHTSS2MCS8":\ 161 (rate ==DESC_RATEVHTSS2MCS9)?"VHTSS2MCS9":"UNKNOW" 162 163 164 enum{ 165 UP_LINK, 166 DOWN_LINK, 167 }; 168 typedef enum _RT_MEDIA_STATUS { 169 RT_MEDIA_DISCONNECT = 0, 170 RT_MEDIA_CONNECT = 1 171 } RT_MEDIA_STATUS; 172 173 #define MAX_DLFW_PAGE_SIZE 4096 /* @ page : 4k bytes */ 174 enum FIRMWARE_SOURCE { 175 FW_SOURCE_IMG_FILE = 0, 176 FW_SOURCE_HEADER_FILE = 1, /* from header file */ 177 }; 178 179 /* BK, BE, VI, VO, HCCA, MANAGEMENT, COMMAND, HIGH, BEACON. */ 180 /* define MAX_TX_QUEUE 9 */ 181 182 #define TX_SELE_HQ BIT(0) /* High Queue */ 183 #define TX_SELE_LQ BIT(1) /* Low Queue */ 184 #define TX_SELE_NQ BIT(2) /* Normal Queue */ 185 #define TX_SELE_EQ BIT(3) /* Extern Queue */ 186 187 #define PageNum_128(_Len) (u32)(((_Len)>>7) + ((_Len)&0x7F ? 1:0)) 188 #define PageNum_256(_Len) (u32)(((_Len)>>8) + ((_Len)&0xFF ? 1:0)) 189 #define PageNum_512(_Len) (u32)(((_Len)>>9) + ((_Len)&0x1FF ? 1:0)) 190 #define PageNum(_Len, _Size) (u32)(((_Len)/(_Size)) + ((_Len)&((_Size) - 1) ? 1:0)) 191 192 193 u8 rtw_hal_data_init(struct adapter *padapter); 194 void rtw_hal_data_deinit(struct adapter *padapter); 195 196 void dump_chip_info(HAL_VERSION ChipVersion); 197 198 u8 /* return the final channel plan decision */ 199 hal_com_config_channel_plan( 200 struct adapter *padapter, 201 u8 hw_channel_plan, /* channel plan from HW (efuse/eeprom) */ 202 u8 sw_channel_plan, /* channel plan from SW (registry/module param) */ 203 u8 def_channel_plan, /* channel plan used when the former two is invalid */ 204 bool AutoLoadFail 205 ); 206 207 bool 208 HAL_IsLegalChannel( 209 struct adapter *Adapter, 210 u32 Channel 211 ); 212 213 u8 MRateToHwRate(u8 rate); 214 215 u8 HwRateToMRate(u8 rate); 216 217 void HalSetBrateCfg( 218 struct adapter * Adapter, 219 u8 *mBratesOS, 220 u16 *pBrateCfg); 221 222 bool 223 Hal_MappingOutPipe( 224 struct adapter *padapter, 225 u8 NumOutPipe 226 ); 227 228 void hal_init_macaddr(struct adapter *adapter); 229 230 void rtw_init_hal_com_default_value(struct adapter * Adapter); 231 232 void c2h_evt_clear(struct adapter *adapter); 233 s32 c2h_evt_read_88xx(struct adapter *adapter, u8 *buf); 234 235 u8 rtw_hal_networktype_to_raid(struct adapter *adapter, struct sta_info *psta); 236 u8 rtw_get_mgntframe_raid(struct adapter *adapter, unsigned char network_type); 237 void rtw_hal_update_sta_rate_mask(struct adapter *padapter, struct sta_info *psta); 238 239 void hw_var_port_switch (struct adapter *adapter); 240 241 void SetHwReg(struct adapter *padapter, u8 variable, u8 *val); 242 void GetHwReg(struct adapter *padapter, u8 variable, u8 *val); 243 void rtw_hal_check_rxfifo_full(struct adapter *adapter); 244 245 u8 SetHalDefVar(struct adapter *adapter, enum HAL_DEF_VARIABLE variable, 246 void *value); 247 u8 GetHalDefVar(struct adapter *adapter, enum HAL_DEF_VARIABLE variable, 248 void *value); 249 250 bool eqNByte(u8 *str1, u8 *str2, u32 num); 251 252 bool IsHexDigit(char chTmp); 253 254 u32 MapCharToHexDigit(char chTmp); 255 256 bool GetHexValueFromString(char *szStr, u32 *pu4bVal, u32 *pu4bMove); 257 258 bool GetFractionValueFromString(char *szStr, u8 *pInteger, u8 *pFraction, 259 u32 *pu4bMove); 260 261 bool IsCommentString(char *szStr); 262 263 bool ParseQualifiedString(char *In, u32 *Start, char *Out, char LeftQualifier, 264 char RightQualifier); 265 266 bool GetU1ByteIntegerFromStringInDecimal(char *str, u8 *in); 267 268 bool isAllSpaceOrTab(u8 *data, u8 size); 269 270 void linked_info_dump(struct adapter *padapter, u8 benable); 271 #ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA 272 void rtw_get_raw_rssi_info(void *sel, struct adapter *padapter); 273 void rtw_store_phy_info(struct adapter *padapter, union recv_frame *prframe); 274 void rtw_dump_raw_rssi_info(struct adapter *padapter); 275 #endif 276 277 #define HWSET_MAX_SIZE 512 278 279 void rtw_bb_rf_gain_offset(struct adapter *padapter); 280 281 void GetHalODMVar(struct adapter *Adapter, 282 enum HAL_ODM_VARIABLE eVariable, 283 void * pValue1, 284 void * pValue2); 285 void SetHalODMVar( 286 struct adapter * Adapter, 287 enum HAL_ODM_VARIABLE eVariable, 288 void * pValue1, 289 bool bSet); 290 291 #ifdef CONFIG_BACKGROUND_NOISE_MONITOR 292 struct noise_info 293 { 294 u8 bPauseDIG; 295 u8 IGIValue; 296 u32 max_time;/* ms */ 297 u8 chan; 298 }; 299 #endif 300 301 #endif /* __HAL_COMMON_H__ */ 302
