1 /*
2
3 Linux Driver for Mylex DAC960/AcceleRAID/eXtremeRAID PCI RAID Controllers
4
5 Copyright 1998-2001 by Leonard N. Zubkoff <lnz@dandelion.com>
6 Portions Copyright 2002 by Mylex (An IBM Business Unit)
7
8 This program is free software; you may redistribute and/or modify it under
9 the terms of the GNU General Public License Version 2 as published by the
10 Free Software Foundation.
11
12 This program is distributed in the hope that it will be useful, but
13 WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for complete details.
16
17 */
18
19
20 #define DAC960_DriverVersion "2.5.49"
21 #define DAC960_DriverDate "21 Aug 2007"
22
23
24 #include <linux/compiler.h>
25 #include <linux/module.h>
26 #include <linux/types.h>
27 #include <linux/miscdevice.h>
28 #include <linux/blkdev.h>
29 #include <linux/bio.h>
30 #include <linux/completion.h>
31 #include <linux/delay.h>
32 #include <linux/genhd.h>
33 #include <linux/hdreg.h>
34 #include <linux/blkpg.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/interrupt.h>
37 #include <linux/ioport.h>
38 #include <linux/mm.h>
39 #include <linux/slab.h>
40 #include <linux/mutex.h>
41 #include <linux/proc_fs.h>
42 #include <linux/seq_file.h>
43 #include <linux/reboot.h>
44 #include <linux/spinlock.h>
45 #include <linux/timer.h>
46 #include <linux/pci.h>
47 #include <linux/init.h>
48 #include <linux/jiffies.h>
49 #include <linux/random.h>
50 #include <linux/scatterlist.h>
51 #include <asm/io.h>
52 #include <linux/uaccess.h>
53 #include "DAC960.h"
54
55 #define DAC960_GAM_MINOR 252
56
57
58 static DEFINE_MUTEX(DAC960_mutex);
59 static DAC960_Controller_T *DAC960_Controllers[DAC960_MaxControllers];
60 static int DAC960_ControllerCount;
61 static struct proc_dir_entry *DAC960_ProcDirectoryEntry;
62
disk_size(DAC960_Controller_T * p,int drive_nr)63 static long disk_size(DAC960_Controller_T *p, int drive_nr)
64 {
65 if (p->FirmwareType == DAC960_V1_Controller) {
66 if (drive_nr >= p->LogicalDriveCount)
67 return 0;
68 return p->V1.LogicalDriveInformation[drive_nr].
69 LogicalDriveSize;
70 } else {
71 DAC960_V2_LogicalDeviceInfo_T *i =
72 p->V2.LogicalDeviceInformation[drive_nr];
73 if (i == NULL)
74 return 0;
75 return i->ConfigurableDeviceSize;
76 }
77 }
78
DAC960_open(struct block_device * bdev,fmode_t mode)79 static int DAC960_open(struct block_device *bdev, fmode_t mode)
80 {
81 struct gendisk *disk = bdev->bd_disk;
82 DAC960_Controller_T *p = disk->queue->queuedata;
83 int drive_nr = (long)disk->private_data;
84 int ret = -ENXIO;
85
86 mutex_lock(&DAC960_mutex);
87 if (p->FirmwareType == DAC960_V1_Controller) {
88 if (p->V1.LogicalDriveInformation[drive_nr].
89 LogicalDriveState == DAC960_V1_LogicalDrive_Offline)
90 goto out;
91 } else {
92 DAC960_V2_LogicalDeviceInfo_T *i =
93 p->V2.LogicalDeviceInformation[drive_nr];
94 if (!i || i->LogicalDeviceState == DAC960_V2_LogicalDevice_Offline)
95 goto out;
96 }
97
98 check_disk_change(bdev);
99
100 if (!get_capacity(p->disks[drive_nr]))
101 goto out;
102 ret = 0;
103 out:
104 mutex_unlock(&DAC960_mutex);
105 return ret;
106 }
107
DAC960_getgeo(struct block_device * bdev,struct hd_geometry * geo)108 static int DAC960_getgeo(struct block_device *bdev, struct hd_geometry *geo)
109 {
110 struct gendisk *disk = bdev->bd_disk;
111 DAC960_Controller_T *p = disk->queue->queuedata;
112 int drive_nr = (long)disk->private_data;
113
114 if (p->FirmwareType == DAC960_V1_Controller) {
115 geo->heads = p->V1.GeometryTranslationHeads;
116 geo->sectors = p->V1.GeometryTranslationSectors;
117 geo->cylinders = p->V1.LogicalDriveInformation[drive_nr].
118 LogicalDriveSize / (geo->heads * geo->sectors);
119 } else {
120 DAC960_V2_LogicalDeviceInfo_T *i =
121 p->V2.LogicalDeviceInformation[drive_nr];
122 switch (i->DriveGeometry) {
123 case DAC960_V2_Geometry_128_32:
124 geo->heads = 128;
125 geo->sectors = 32;
126 break;
127 case DAC960_V2_Geometry_255_63:
128 geo->heads = 255;
129 geo->sectors = 63;
130 break;
131 default:
132 DAC960_Error("Illegal Logical Device Geometry %d\n",
133 p, i->DriveGeometry);
134 return -EINVAL;
135 }
136
137 geo->cylinders = i->ConfigurableDeviceSize /
138 (geo->heads * geo->sectors);
139 }
140
141 return 0;
142 }
143
DAC960_check_events(struct gendisk * disk,unsigned int clearing)144 static unsigned int DAC960_check_events(struct gendisk *disk,
145 unsigned int clearing)
146 {
147 DAC960_Controller_T *p = disk->queue->queuedata;
148 int drive_nr = (long)disk->private_data;
149
150 if (!p->LogicalDriveInitiallyAccessible[drive_nr])
151 return DISK_EVENT_MEDIA_CHANGE;
152 return 0;
153 }
154
DAC960_revalidate_disk(struct gendisk * disk)155 static int DAC960_revalidate_disk(struct gendisk *disk)
156 {
157 DAC960_Controller_T *p = disk->queue->queuedata;
158 int unit = (long)disk->private_data;
159
160 set_capacity(disk, disk_size(p, unit));
161 return 0;
162 }
163
164 static const struct block_device_operations DAC960_BlockDeviceOperations = {
165 .owner = THIS_MODULE,
166 .open = DAC960_open,
167 .getgeo = DAC960_getgeo,
168 .check_events = DAC960_check_events,
169 .revalidate_disk = DAC960_revalidate_disk,
170 };
171
172
173 /*
174 DAC960_AnnounceDriver announces the Driver Version and Date, Author's Name,
175 Copyright Notice, and Electronic Mail Address.
176 */
177
DAC960_AnnounceDriver(DAC960_Controller_T * Controller)178 static void DAC960_AnnounceDriver(DAC960_Controller_T *Controller)
179 {
180 DAC960_Announce("***** DAC960 RAID Driver Version "
181 DAC960_DriverVersion " of "
182 DAC960_DriverDate " *****\n", Controller);
183 DAC960_Announce("Copyright 1998-2001 by Leonard N. Zubkoff "
184 "<lnz@dandelion.com>\n", Controller);
185 }
186
187
188 /*
189 DAC960_Failure prints a standardized error message, and then returns false.
190 */
191
DAC960_Failure(DAC960_Controller_T * Controller,unsigned char * ErrorMessage)192 static bool DAC960_Failure(DAC960_Controller_T *Controller,
193 unsigned char *ErrorMessage)
194 {
195 DAC960_Error("While configuring DAC960 PCI RAID Controller at\n",
196 Controller);
197 if (Controller->IO_Address == 0)
198 DAC960_Error("PCI Bus %d Device %d Function %d I/O Address N/A "
199 "PCI Address 0x%X\n", Controller,
200 Controller->Bus, Controller->Device,
201 Controller->Function, Controller->PCI_Address);
202 else DAC960_Error("PCI Bus %d Device %d Function %d I/O Address "
203 "0x%X PCI Address 0x%X\n", Controller,
204 Controller->Bus, Controller->Device,
205 Controller->Function, Controller->IO_Address,
206 Controller->PCI_Address);
207 DAC960_Error("%s FAILED - DETACHING\n", Controller, ErrorMessage);
208 return false;
209 }
210
211 /*
212 init_dma_loaf() and slice_dma_loaf() are helper functions for
213 aggregating the dma-mapped memory for a well-known collection of
214 data structures that are of different lengths.
215
216 These routines don't guarantee any alignment. The caller must
217 include any space needed for alignment in the sizes of the structures
218 that are passed in.
219 */
220
init_dma_loaf(struct pci_dev * dev,struct dma_loaf * loaf,size_t len)221 static bool init_dma_loaf(struct pci_dev *dev, struct dma_loaf *loaf,
222 size_t len)
223 {
224 void *cpu_addr;
225 dma_addr_t dma_handle;
226
227 cpu_addr = pci_alloc_consistent(dev, len, &dma_handle);
228 if (cpu_addr == NULL)
229 return false;
230
231 loaf->cpu_free = loaf->cpu_base = cpu_addr;
232 loaf->dma_free =loaf->dma_base = dma_handle;
233 loaf->length = len;
234 memset(cpu_addr, 0, len);
235 return true;
236 }
237
slice_dma_loaf(struct dma_loaf * loaf,size_t len,dma_addr_t * dma_handle)238 static void *slice_dma_loaf(struct dma_loaf *loaf, size_t len,
239 dma_addr_t *dma_handle)
240 {
241 void *cpu_end = loaf->cpu_free + len;
242 void *cpu_addr = loaf->cpu_free;
243
244 BUG_ON(cpu_end > loaf->cpu_base + loaf->length);
245 *dma_handle = loaf->dma_free;
246 loaf->cpu_free = cpu_end;
247 loaf->dma_free += len;
248 return cpu_addr;
249 }
250
free_dma_loaf(struct pci_dev * dev,struct dma_loaf * loaf_handle)251 static void free_dma_loaf(struct pci_dev *dev, struct dma_loaf *loaf_handle)
252 {
253 if (loaf_handle->cpu_base != NULL)
254 pci_free_consistent(dev, loaf_handle->length,
255 loaf_handle->cpu_base, loaf_handle->dma_base);
256 }
257
258
259 /*
260 DAC960_CreateAuxiliaryStructures allocates and initializes the auxiliary
261 data structures for Controller. It returns true on success and false on
262 failure.
263 */
264
DAC960_CreateAuxiliaryStructures(DAC960_Controller_T * Controller)265 static bool DAC960_CreateAuxiliaryStructures(DAC960_Controller_T *Controller)
266 {
267 int CommandAllocationLength, CommandAllocationGroupSize;
268 int CommandsRemaining = 0, CommandIdentifier, CommandGroupByteCount;
269 void *AllocationPointer = NULL;
270 void *ScatterGatherCPU = NULL;
271 dma_addr_t ScatterGatherDMA;
272 struct dma_pool *ScatterGatherPool;
273 void *RequestSenseCPU = NULL;
274 dma_addr_t RequestSenseDMA;
275 struct dma_pool *RequestSensePool = NULL;
276
277 if (Controller->FirmwareType == DAC960_V1_Controller)
278 {
279 CommandAllocationLength = offsetof(DAC960_Command_T, V1.EndMarker);
280 CommandAllocationGroupSize = DAC960_V1_CommandAllocationGroupSize;
281 ScatterGatherPool = dma_pool_create("DAC960_V1_ScatterGather",
282 &Controller->PCIDevice->dev,
283 DAC960_V1_ScatterGatherLimit * sizeof(DAC960_V1_ScatterGatherSegment_T),
284 sizeof(DAC960_V1_ScatterGatherSegment_T), 0);
285 if (ScatterGatherPool == NULL)
286 return DAC960_Failure(Controller,
287 "AUXILIARY STRUCTURE CREATION (SG)");
288 Controller->ScatterGatherPool = ScatterGatherPool;
289 }
290 else
291 {
292 CommandAllocationLength = offsetof(DAC960_Command_T, V2.EndMarker);
293 CommandAllocationGroupSize = DAC960_V2_CommandAllocationGroupSize;
294 ScatterGatherPool = dma_pool_create("DAC960_V2_ScatterGather",
295 &Controller->PCIDevice->dev,
296 DAC960_V2_ScatterGatherLimit * sizeof(DAC960_V2_ScatterGatherSegment_T),
297 sizeof(DAC960_V2_ScatterGatherSegment_T), 0);
298 if (ScatterGatherPool == NULL)
299 return DAC960_Failure(Controller,
300 "AUXILIARY STRUCTURE CREATION (SG)");
301 RequestSensePool = dma_pool_create("DAC960_V2_RequestSense",
302 &Controller->PCIDevice->dev, sizeof(DAC960_SCSI_RequestSense_T),
303 sizeof(int), 0);
304 if (RequestSensePool == NULL) {
305 dma_pool_destroy(ScatterGatherPool);
306 return DAC960_Failure(Controller,
307 "AUXILIARY STRUCTURE CREATION (SG)");
308 }
309 Controller->ScatterGatherPool = ScatterGatherPool;
310 Controller->V2.RequestSensePool = RequestSensePool;
311 }
312 Controller->CommandAllocationGroupSize = CommandAllocationGroupSize;
313 Controller->FreeCommands = NULL;
314 for (CommandIdentifier = 1;
315 CommandIdentifier <= Controller->DriverQueueDepth;
316 CommandIdentifier++)
317 {
318 DAC960_Command_T *Command;
319 if (--CommandsRemaining <= 0)
320 {
321 CommandsRemaining =
322 Controller->DriverQueueDepth - CommandIdentifier + 1;
323 if (CommandsRemaining > CommandAllocationGroupSize)
324 CommandsRemaining = CommandAllocationGroupSize;
325 CommandGroupByteCount =
326 CommandsRemaining * CommandAllocationLength;
327 AllocationPointer = kzalloc(CommandGroupByteCount, GFP_ATOMIC);
328 if (AllocationPointer == NULL)
329 return DAC960_Failure(Controller,
330 "AUXILIARY STRUCTURE CREATION");
331 }
332 Command = (DAC960_Command_T *) AllocationPointer;
333 AllocationPointer += CommandAllocationLength;
334 Command->CommandIdentifier = CommandIdentifier;
335 Command->Controller = Controller;
336 Command->Next = Controller->FreeCommands;
337 Controller->FreeCommands = Command;
338 Controller->Commands[CommandIdentifier-1] = Command;
339 ScatterGatherCPU = dma_pool_alloc(ScatterGatherPool, GFP_ATOMIC,
340 &ScatterGatherDMA);
341 if (ScatterGatherCPU == NULL)
342 return DAC960_Failure(Controller, "AUXILIARY STRUCTURE CREATION");
343
344 if (RequestSensePool != NULL) {
345 RequestSenseCPU = dma_pool_alloc(RequestSensePool, GFP_ATOMIC,
346 &RequestSenseDMA);
347 if (RequestSenseCPU == NULL) {
348 dma_pool_free(ScatterGatherPool, ScatterGatherCPU,
349 ScatterGatherDMA);
350 return DAC960_Failure(Controller,
351 "AUXILIARY STRUCTURE CREATION");
352 }
353 }
354 if (Controller->FirmwareType == DAC960_V1_Controller) {
355 Command->cmd_sglist = Command->V1.ScatterList;
356 Command->V1.ScatterGatherList =
357 (DAC960_V1_ScatterGatherSegment_T *)ScatterGatherCPU;
358 Command->V1.ScatterGatherListDMA = ScatterGatherDMA;
359 sg_init_table(Command->cmd_sglist, DAC960_V1_ScatterGatherLimit);
360 } else {
361 Command->cmd_sglist = Command->V2.ScatterList;
362 Command->V2.ScatterGatherList =
363 (DAC960_V2_ScatterGatherSegment_T *)ScatterGatherCPU;
364 Command->V2.ScatterGatherListDMA = ScatterGatherDMA;
365 Command->V2.RequestSense =
366 (DAC960_SCSI_RequestSense_T *)RequestSenseCPU;
367 Command->V2.RequestSenseDMA = RequestSenseDMA;
368 sg_init_table(Command->cmd_sglist, DAC960_V2_ScatterGatherLimit);
369 }
370 }
371 return true;
372 }
373
374
375 /*
376 DAC960_DestroyAuxiliaryStructures deallocates the auxiliary data
377 structures for Controller.
378 */
379
DAC960_DestroyAuxiliaryStructures(DAC960_Controller_T * Controller)380 static void DAC960_DestroyAuxiliaryStructures(DAC960_Controller_T *Controller)
381 {
382 int i;
383 struct dma_pool *ScatterGatherPool = Controller->ScatterGatherPool;
384 struct dma_pool *RequestSensePool = NULL;
385 void *ScatterGatherCPU;
386 dma_addr_t ScatterGatherDMA;
387 void *RequestSenseCPU;
388 dma_addr_t RequestSenseDMA;
389 DAC960_Command_T *CommandGroup = NULL;
390
391
392 if (Controller->FirmwareType == DAC960_V2_Controller)
393 RequestSensePool = Controller->V2.RequestSensePool;
394
395 Controller->FreeCommands = NULL;
396 for (i = 0; i < Controller->DriverQueueDepth; i++)
397 {
398 DAC960_Command_T *Command = Controller->Commands[i];
399
400 if (Command == NULL)
401 continue;
402
403 if (Controller->FirmwareType == DAC960_V1_Controller) {
404 ScatterGatherCPU = (void *)Command->V1.ScatterGatherList;
405 ScatterGatherDMA = Command->V1.ScatterGatherListDMA;
406 RequestSenseCPU = NULL;
407 RequestSenseDMA = (dma_addr_t)0;
408 } else {
409 ScatterGatherCPU = (void *)Command->V2.ScatterGatherList;
410 ScatterGatherDMA = Command->V2.ScatterGatherListDMA;
411 RequestSenseCPU = (void *)Command->V2.RequestSense;
412 RequestSenseDMA = Command->V2.RequestSenseDMA;
413 }
414 if (ScatterGatherCPU != NULL)
415 dma_pool_free(ScatterGatherPool, ScatterGatherCPU, ScatterGatherDMA);
416 if (RequestSenseCPU != NULL)
417 dma_pool_free(RequestSensePool, RequestSenseCPU, RequestSenseDMA);
418
419 if ((Command->CommandIdentifier
420 % Controller->CommandAllocationGroupSize) == 1) {
421 /*
422 * We can't free the group of commands until all of the
423 * request sense and scatter gather dma structures are free.
424 * Remember the beginning of the group, but don't free it
425 * until we've reached the beginning of the next group.
426 */
427 kfree(CommandGroup);
428 CommandGroup = Command;
429 }
430 Controller->Commands[i] = NULL;
431 }
432 kfree(CommandGroup);
433
434 if (Controller->CombinedStatusBuffer != NULL)
435 {
436 kfree(Controller->CombinedStatusBuffer);
437 Controller->CombinedStatusBuffer = NULL;
438 Controller->CurrentStatusBuffer = NULL;
439 }
440
441 dma_pool_destroy(ScatterGatherPool);
442 if (Controller->FirmwareType == DAC960_V1_Controller)
443 return;
444
445 dma_pool_destroy(RequestSensePool);
446
447 for (i = 0; i < DAC960_MaxLogicalDrives; i++) {
448 kfree(Controller->V2.LogicalDeviceInformation[i]);
449 Controller->V2.LogicalDeviceInformation[i] = NULL;
450 }
451
452 for (i = 0; i < DAC960_V2_MaxPhysicalDevices; i++)
453 {
454 kfree(Controller->V2.PhysicalDeviceInformation[i]);
455 Controller->V2.PhysicalDeviceInformation[i] = NULL;
456 kfree(Controller->V2.InquiryUnitSerialNumber[i]);
457 Controller->V2.InquiryUnitSerialNumber[i] = NULL;
458 }
459 }
460
461
462 /*
463 DAC960_V1_ClearCommand clears critical fields of Command for DAC960 V1
464 Firmware Controllers.
465 */
466
DAC960_V1_ClearCommand(DAC960_Command_T * Command)467 static inline void DAC960_V1_ClearCommand(DAC960_Command_T *Command)
468 {
469 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
470 memset(CommandMailbox, 0, sizeof(DAC960_V1_CommandMailbox_T));
471 Command->V1.CommandStatus = 0;
472 }
473
474
475 /*
476 DAC960_V2_ClearCommand clears critical fields of Command for DAC960 V2
477 Firmware Controllers.
478 */
479
DAC960_V2_ClearCommand(DAC960_Command_T * Command)480 static inline void DAC960_V2_ClearCommand(DAC960_Command_T *Command)
481 {
482 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
483 memset(CommandMailbox, 0, sizeof(DAC960_V2_CommandMailbox_T));
484 Command->V2.CommandStatus = 0;
485 }
486
487
488 /*
489 DAC960_AllocateCommand allocates a Command structure from Controller's
490 free list. During driver initialization, a special initialization command
491 has been placed on the free list to guarantee that command allocation can
492 never fail.
493 */
494
DAC960_AllocateCommand(DAC960_Controller_T * Controller)495 static inline DAC960_Command_T *DAC960_AllocateCommand(DAC960_Controller_T
496 *Controller)
497 {
498 DAC960_Command_T *Command = Controller->FreeCommands;
499 if (Command == NULL) return NULL;
500 Controller->FreeCommands = Command->Next;
501 Command->Next = NULL;
502 return Command;
503 }
504
505
506 /*
507 DAC960_DeallocateCommand deallocates Command, returning it to Controller's
508 free list.
509 */
510
DAC960_DeallocateCommand(DAC960_Command_T * Command)511 static inline void DAC960_DeallocateCommand(DAC960_Command_T *Command)
512 {
513 DAC960_Controller_T *Controller = Command->Controller;
514
515 Command->Request = NULL;
516 Command->Next = Controller->FreeCommands;
517 Controller->FreeCommands = Command;
518 }
519
520
521 /*
522 DAC960_WaitForCommand waits for a wake_up on Controller's Command Wait Queue.
523 */
524
DAC960_WaitForCommand(DAC960_Controller_T * Controller)525 static void DAC960_WaitForCommand(DAC960_Controller_T *Controller)
526 {
527 spin_unlock_irq(&Controller->queue_lock);
528 __wait_event(Controller->CommandWaitQueue, Controller->FreeCommands);
529 spin_lock_irq(&Controller->queue_lock);
530 }
531
532 /*
533 DAC960_GEM_QueueCommand queues Command for DAC960 GEM Series Controllers.
534 */
535
DAC960_GEM_QueueCommand(DAC960_Command_T * Command)536 static void DAC960_GEM_QueueCommand(DAC960_Command_T *Command)
537 {
538 DAC960_Controller_T *Controller = Command->Controller;
539 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
540 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
541 DAC960_V2_CommandMailbox_T *NextCommandMailbox =
542 Controller->V2.NextCommandMailbox;
543
544 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
545 DAC960_GEM_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
546
547 if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
548 Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
549 DAC960_GEM_MemoryMailboxNewCommand(ControllerBaseAddress);
550
551 Controller->V2.PreviousCommandMailbox2 =
552 Controller->V2.PreviousCommandMailbox1;
553 Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
554
555 if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
556 NextCommandMailbox = Controller->V2.FirstCommandMailbox;
557
558 Controller->V2.NextCommandMailbox = NextCommandMailbox;
559 }
560
561 /*
562 DAC960_BA_QueueCommand queues Command for DAC960 BA Series Controllers.
563 */
564
DAC960_BA_QueueCommand(DAC960_Command_T * Command)565 static void DAC960_BA_QueueCommand(DAC960_Command_T *Command)
566 {
567 DAC960_Controller_T *Controller = Command->Controller;
568 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
569 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
570 DAC960_V2_CommandMailbox_T *NextCommandMailbox =
571 Controller->V2.NextCommandMailbox;
572 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
573 DAC960_BA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
574 if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
575 Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
576 DAC960_BA_MemoryMailboxNewCommand(ControllerBaseAddress);
577 Controller->V2.PreviousCommandMailbox2 =
578 Controller->V2.PreviousCommandMailbox1;
579 Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
580 if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
581 NextCommandMailbox = Controller->V2.FirstCommandMailbox;
582 Controller->V2.NextCommandMailbox = NextCommandMailbox;
583 }
584
585
586 /*
587 DAC960_LP_QueueCommand queues Command for DAC960 LP Series Controllers.
588 */
589
DAC960_LP_QueueCommand(DAC960_Command_T * Command)590 static void DAC960_LP_QueueCommand(DAC960_Command_T *Command)
591 {
592 DAC960_Controller_T *Controller = Command->Controller;
593 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
594 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
595 DAC960_V2_CommandMailbox_T *NextCommandMailbox =
596 Controller->V2.NextCommandMailbox;
597 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
598 DAC960_LP_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
599 if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
600 Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
601 DAC960_LP_MemoryMailboxNewCommand(ControllerBaseAddress);
602 Controller->V2.PreviousCommandMailbox2 =
603 Controller->V2.PreviousCommandMailbox1;
604 Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
605 if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
606 NextCommandMailbox = Controller->V2.FirstCommandMailbox;
607 Controller->V2.NextCommandMailbox = NextCommandMailbox;
608 }
609
610
611 /*
612 DAC960_LA_QueueCommandDualMode queues Command for DAC960 LA Series
613 Controllers with Dual Mode Firmware.
614 */
615
DAC960_LA_QueueCommandDualMode(DAC960_Command_T * Command)616 static void DAC960_LA_QueueCommandDualMode(DAC960_Command_T *Command)
617 {
618 DAC960_Controller_T *Controller = Command->Controller;
619 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
620 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
621 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
622 Controller->V1.NextCommandMailbox;
623 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
624 DAC960_LA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
625 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
626 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
627 DAC960_LA_MemoryMailboxNewCommand(ControllerBaseAddress);
628 Controller->V1.PreviousCommandMailbox2 =
629 Controller->V1.PreviousCommandMailbox1;
630 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
631 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
632 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
633 Controller->V1.NextCommandMailbox = NextCommandMailbox;
634 }
635
636
637 /*
638 DAC960_LA_QueueCommandSingleMode queues Command for DAC960 LA Series
639 Controllers with Single Mode Firmware.
640 */
641
DAC960_LA_QueueCommandSingleMode(DAC960_Command_T * Command)642 static void DAC960_LA_QueueCommandSingleMode(DAC960_Command_T *Command)
643 {
644 DAC960_Controller_T *Controller = Command->Controller;
645 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
646 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
647 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
648 Controller->V1.NextCommandMailbox;
649 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
650 DAC960_LA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
651 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
652 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
653 DAC960_LA_HardwareMailboxNewCommand(ControllerBaseAddress);
654 Controller->V1.PreviousCommandMailbox2 =
655 Controller->V1.PreviousCommandMailbox1;
656 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
657 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
658 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
659 Controller->V1.NextCommandMailbox = NextCommandMailbox;
660 }
661
662
663 /*
664 DAC960_PG_QueueCommandDualMode queues Command for DAC960 PG Series
665 Controllers with Dual Mode Firmware.
666 */
667
DAC960_PG_QueueCommandDualMode(DAC960_Command_T * Command)668 static void DAC960_PG_QueueCommandDualMode(DAC960_Command_T *Command)
669 {
670 DAC960_Controller_T *Controller = Command->Controller;
671 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
672 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
673 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
674 Controller->V1.NextCommandMailbox;
675 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
676 DAC960_PG_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
677 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
678 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
679 DAC960_PG_MemoryMailboxNewCommand(ControllerBaseAddress);
680 Controller->V1.PreviousCommandMailbox2 =
681 Controller->V1.PreviousCommandMailbox1;
682 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
683 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
684 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
685 Controller->V1.NextCommandMailbox = NextCommandMailbox;
686 }
687
688
689 /*
690 DAC960_PG_QueueCommandSingleMode queues Command for DAC960 PG Series
691 Controllers with Single Mode Firmware.
692 */
693
DAC960_PG_QueueCommandSingleMode(DAC960_Command_T * Command)694 static void DAC960_PG_QueueCommandSingleMode(DAC960_Command_T *Command)
695 {
696 DAC960_Controller_T *Controller = Command->Controller;
697 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
698 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
699 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
700 Controller->V1.NextCommandMailbox;
701 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
702 DAC960_PG_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
703 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
704 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
705 DAC960_PG_HardwareMailboxNewCommand(ControllerBaseAddress);
706 Controller->V1.PreviousCommandMailbox2 =
707 Controller->V1.PreviousCommandMailbox1;
708 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
709 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
710 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
711 Controller->V1.NextCommandMailbox = NextCommandMailbox;
712 }
713
714
715 /*
716 DAC960_PD_QueueCommand queues Command for DAC960 PD Series Controllers.
717 */
718
DAC960_PD_QueueCommand(DAC960_Command_T * Command)719 static void DAC960_PD_QueueCommand(DAC960_Command_T *Command)
720 {
721 DAC960_Controller_T *Controller = Command->Controller;
722 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
723 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
724 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
725 while (DAC960_PD_MailboxFullP(ControllerBaseAddress))
726 udelay(1);
727 DAC960_PD_WriteCommandMailbox(ControllerBaseAddress, CommandMailbox);
728 DAC960_PD_NewCommand(ControllerBaseAddress);
729 }
730
731
732 /*
733 DAC960_P_QueueCommand queues Command for DAC960 P Series Controllers.
734 */
735
DAC960_P_QueueCommand(DAC960_Command_T * Command)736 static void DAC960_P_QueueCommand(DAC960_Command_T *Command)
737 {
738 DAC960_Controller_T *Controller = Command->Controller;
739 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
740 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
741 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
742 switch (CommandMailbox->Common.CommandOpcode)
743 {
744 case DAC960_V1_Enquiry:
745 CommandMailbox->Common.CommandOpcode = DAC960_V1_Enquiry_Old;
746 break;
747 case DAC960_V1_GetDeviceState:
748 CommandMailbox->Common.CommandOpcode = DAC960_V1_GetDeviceState_Old;
749 break;
750 case DAC960_V1_Read:
751 CommandMailbox->Common.CommandOpcode = DAC960_V1_Read_Old;
752 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
753 break;
754 case DAC960_V1_Write:
755 CommandMailbox->Common.CommandOpcode = DAC960_V1_Write_Old;
756 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
757 break;
758 case DAC960_V1_ReadWithScatterGather:
759 CommandMailbox->Common.CommandOpcode =
760 DAC960_V1_ReadWithScatterGather_Old;
761 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
762 break;
763 case DAC960_V1_WriteWithScatterGather:
764 CommandMailbox->Common.CommandOpcode =
765 DAC960_V1_WriteWithScatterGather_Old;
766 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
767 break;
768 default:
769 break;
770 }
771 while (DAC960_PD_MailboxFullP(ControllerBaseAddress))
772 udelay(1);
773 DAC960_PD_WriteCommandMailbox(ControllerBaseAddress, CommandMailbox);
774 DAC960_PD_NewCommand(ControllerBaseAddress);
775 }
776
777
778 /*
779 DAC960_ExecuteCommand executes Command and waits for completion.
780 */
781
DAC960_ExecuteCommand(DAC960_Command_T * Command)782 static void DAC960_ExecuteCommand(DAC960_Command_T *Command)
783 {
784 DAC960_Controller_T *Controller = Command->Controller;
785 DECLARE_COMPLETION_ONSTACK(Completion);
786 unsigned long flags;
787 Command->Completion = &Completion;
788
789 spin_lock_irqsave(&Controller->queue_lock, flags);
790 DAC960_QueueCommand(Command);
791 spin_unlock_irqrestore(&Controller->queue_lock, flags);
792
793 if (in_interrupt())
794 return;
795 wait_for_completion(&Completion);
796 }
797
798
799 /*
800 DAC960_V1_ExecuteType3 executes a DAC960 V1 Firmware Controller Type 3
801 Command and waits for completion. It returns true on success and false
802 on failure.
803 */
804
DAC960_V1_ExecuteType3(DAC960_Controller_T * Controller,DAC960_V1_CommandOpcode_T CommandOpcode,dma_addr_t DataDMA)805 static bool DAC960_V1_ExecuteType3(DAC960_Controller_T *Controller,
806 DAC960_V1_CommandOpcode_T CommandOpcode,
807 dma_addr_t DataDMA)
808 {
809 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
810 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
811 DAC960_V1_CommandStatus_T CommandStatus;
812 DAC960_V1_ClearCommand(Command);
813 Command->CommandType = DAC960_ImmediateCommand;
814 CommandMailbox->Type3.CommandOpcode = CommandOpcode;
815 CommandMailbox->Type3.BusAddress = DataDMA;
816 DAC960_ExecuteCommand(Command);
817 CommandStatus = Command->V1.CommandStatus;
818 DAC960_DeallocateCommand(Command);
819 return (CommandStatus == DAC960_V1_NormalCompletion);
820 }
821
822
823 /*
824 DAC960_V1_ExecuteTypeB executes a DAC960 V1 Firmware Controller Type 3B
825 Command and waits for completion. It returns true on success and false
826 on failure.
827 */
828
DAC960_V1_ExecuteType3B(DAC960_Controller_T * Controller,DAC960_V1_CommandOpcode_T CommandOpcode,unsigned char CommandOpcode2,dma_addr_t DataDMA)829 static bool DAC960_V1_ExecuteType3B(DAC960_Controller_T *Controller,
830 DAC960_V1_CommandOpcode_T CommandOpcode,
831 unsigned char CommandOpcode2,
832 dma_addr_t DataDMA)
833 {
834 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
835 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
836 DAC960_V1_CommandStatus_T CommandStatus;
837 DAC960_V1_ClearCommand(Command);
838 Command->CommandType = DAC960_ImmediateCommand;
839 CommandMailbox->Type3B.CommandOpcode = CommandOpcode;
840 CommandMailbox->Type3B.CommandOpcode2 = CommandOpcode2;
841 CommandMailbox->Type3B.BusAddress = DataDMA;
842 DAC960_ExecuteCommand(Command);
843 CommandStatus = Command->V1.CommandStatus;
844 DAC960_DeallocateCommand(Command);
845 return (CommandStatus == DAC960_V1_NormalCompletion);
846 }
847
848
849 /*
850 DAC960_V1_ExecuteType3D executes a DAC960 V1 Firmware Controller Type 3D
851 Command and waits for completion. It returns true on success and false
852 on failure.
853 */
854
DAC960_V1_ExecuteType3D(DAC960_Controller_T * Controller,DAC960_V1_CommandOpcode_T CommandOpcode,unsigned char Channel,unsigned char TargetID,dma_addr_t DataDMA)855 static bool DAC960_V1_ExecuteType3D(DAC960_Controller_T *Controller,
856 DAC960_V1_CommandOpcode_T CommandOpcode,
857 unsigned char Channel,
858 unsigned char TargetID,
859 dma_addr_t DataDMA)
860 {
861 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
862 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
863 DAC960_V1_CommandStatus_T CommandStatus;
864 DAC960_V1_ClearCommand(Command);
865 Command->CommandType = DAC960_ImmediateCommand;
866 CommandMailbox->Type3D.CommandOpcode = CommandOpcode;
867 CommandMailbox->Type3D.Channel = Channel;
868 CommandMailbox->Type3D.TargetID = TargetID;
869 CommandMailbox->Type3D.BusAddress = DataDMA;
870 DAC960_ExecuteCommand(Command);
871 CommandStatus = Command->V1.CommandStatus;
872 DAC960_DeallocateCommand(Command);
873 return (CommandStatus == DAC960_V1_NormalCompletion);
874 }
875
876
877 /*
878 DAC960_V2_GeneralInfo executes a DAC960 V2 Firmware General Information
879 Reading IOCTL Command and waits for completion. It returns true on success
880 and false on failure.
881
882 Return data in The controller's HealthStatusBuffer, which is dma-able memory
883 */
884
DAC960_V2_GeneralInfo(DAC960_Controller_T * Controller)885 static bool DAC960_V2_GeneralInfo(DAC960_Controller_T *Controller)
886 {
887 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
888 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
889 DAC960_V2_CommandStatus_T CommandStatus;
890 DAC960_V2_ClearCommand(Command);
891 Command->CommandType = DAC960_ImmediateCommand;
892 CommandMailbox->Common.CommandOpcode = DAC960_V2_IOCTL;
893 CommandMailbox->Common.CommandControlBits
894 .DataTransferControllerToHost = true;
895 CommandMailbox->Common.CommandControlBits
896 .NoAutoRequestSense = true;
897 CommandMailbox->Common.DataTransferSize = sizeof(DAC960_V2_HealthStatusBuffer_T);
898 CommandMailbox->Common.IOCTL_Opcode = DAC960_V2_GetHealthStatus;
899 CommandMailbox->Common.DataTransferMemoryAddress
900 .ScatterGatherSegments[0]
901 .SegmentDataPointer =
902 Controller->V2.HealthStatusBufferDMA;
903 CommandMailbox->Common.DataTransferMemoryAddress
904 .ScatterGatherSegments[0]
905 .SegmentByteCount =
906 CommandMailbox->Common.DataTransferSize;
907 DAC960_ExecuteCommand(Command);
908 CommandStatus = Command->V2.CommandStatus;
909 DAC960_DeallocateCommand(Command);
910 return (CommandStatus == DAC960_V2_NormalCompletion);
911 }
912
913
914 /*
915 DAC960_V2_ControllerInfo executes a DAC960 V2 Firmware Controller
916 Information Reading IOCTL Command and waits for completion. It returns
917 true on success and false on failure.
918
919 Data is returned in the controller's V2.NewControllerInformation dma-able
920 memory buffer.
921 */
922
DAC960_V2_NewControllerInfo(DAC960_Controller_T * Controller)923 static bool DAC960_V2_NewControllerInfo(DAC960_Controller_T *Controller)
924 {
925 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
926 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
927 DAC960_V2_CommandStatus_T CommandStatus;
928 DAC960_V2_ClearCommand(Command);
929 Command->CommandType = DAC960_ImmediateCommand;
930 CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL;
931 CommandMailbox->ControllerInfo.CommandControlBits
932 .DataTransferControllerToHost = true;
933 CommandMailbox->ControllerInfo.CommandControlBits
934 .NoAutoRequestSense = true;
935 CommandMailbox->ControllerInfo.DataTransferSize = sizeof(DAC960_V2_ControllerInfo_T);
936 CommandMailbox->ControllerInfo.ControllerNumber = 0;
937 CommandMailbox->ControllerInfo.IOCTL_Opcode = DAC960_V2_GetControllerInfo;
938 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
939 .ScatterGatherSegments[0]
940 .SegmentDataPointer =
941 Controller->V2.NewControllerInformationDMA;
942 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
943 .ScatterGatherSegments[0]
944 .SegmentByteCount =
945 CommandMailbox->ControllerInfo.DataTransferSize;
946 DAC960_ExecuteCommand(Command);
947 CommandStatus = Command->V2.CommandStatus;
948 DAC960_DeallocateCommand(Command);
949 return (CommandStatus == DAC960_V2_NormalCompletion);
950 }
951
952
953 /*
954 DAC960_V2_LogicalDeviceInfo executes a DAC960 V2 Firmware Controller Logical
955 Device Information Reading IOCTL Command and waits for completion. It
956 returns true on success and false on failure.
957
958 Data is returned in the controller's V2.NewLogicalDeviceInformation
959 */
960
DAC960_V2_NewLogicalDeviceInfo(DAC960_Controller_T * Controller,unsigned short LogicalDeviceNumber)961 static bool DAC960_V2_NewLogicalDeviceInfo(DAC960_Controller_T *Controller,
962 unsigned short LogicalDeviceNumber)
963 {
964 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
965 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
966 DAC960_V2_CommandStatus_T CommandStatus;
967
968 DAC960_V2_ClearCommand(Command);
969 Command->CommandType = DAC960_ImmediateCommand;
970 CommandMailbox->LogicalDeviceInfo.CommandOpcode =
971 DAC960_V2_IOCTL;
972 CommandMailbox->LogicalDeviceInfo.CommandControlBits
973 .DataTransferControllerToHost = true;
974 CommandMailbox->LogicalDeviceInfo.CommandControlBits
975 .NoAutoRequestSense = true;
976 CommandMailbox->LogicalDeviceInfo.DataTransferSize =
977 sizeof(DAC960_V2_LogicalDeviceInfo_T);
978 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
979 LogicalDeviceNumber;
980 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode = DAC960_V2_GetLogicalDeviceInfoValid;
981 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
982 .ScatterGatherSegments[0]
983 .SegmentDataPointer =
984 Controller->V2.NewLogicalDeviceInformationDMA;
985 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
986 .ScatterGatherSegments[0]
987 .SegmentByteCount =
988 CommandMailbox->LogicalDeviceInfo.DataTransferSize;
989 DAC960_ExecuteCommand(Command);
990 CommandStatus = Command->V2.CommandStatus;
991 DAC960_DeallocateCommand(Command);
992 return (CommandStatus == DAC960_V2_NormalCompletion);
993 }
994
995
996 /*
997 DAC960_V2_PhysicalDeviceInfo executes a DAC960 V2 Firmware Controller "Read
998 Physical Device Information" IOCTL Command and waits for completion. It
999 returns true on success and false on failure.
1000
1001 The Channel, TargetID, LogicalUnit arguments should be 0 the first time
1002 this function is called for a given controller. This will return data
1003 for the "first" device on that controller. The returned data includes a
1004 Channel, TargetID, LogicalUnit that can be passed in to this routine to
1005 get data for the NEXT device on that controller.
1006
1007 Data is stored in the controller's V2.NewPhysicalDeviceInfo dma-able
1008 memory buffer.
1009
1010 */
1011
DAC960_V2_NewPhysicalDeviceInfo(DAC960_Controller_T * Controller,unsigned char Channel,unsigned char TargetID,unsigned char LogicalUnit)1012 static bool DAC960_V2_NewPhysicalDeviceInfo(DAC960_Controller_T *Controller,
1013 unsigned char Channel,
1014 unsigned char TargetID,
1015 unsigned char LogicalUnit)
1016 {
1017 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
1018 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
1019 DAC960_V2_CommandStatus_T CommandStatus;
1020
1021 DAC960_V2_ClearCommand(Command);
1022 Command->CommandType = DAC960_ImmediateCommand;
1023 CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
1024 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
1025 .DataTransferControllerToHost = true;
1026 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
1027 .NoAutoRequestSense = true;
1028 CommandMailbox->PhysicalDeviceInfo.DataTransferSize =
1029 sizeof(DAC960_V2_PhysicalDeviceInfo_T);
1030 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.LogicalUnit = LogicalUnit;
1031 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID = TargetID;
1032 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel = Channel;
1033 CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode =
1034 DAC960_V2_GetPhysicalDeviceInfoValid;
1035 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
1036 .ScatterGatherSegments[0]
1037 .SegmentDataPointer =
1038 Controller->V2.NewPhysicalDeviceInformationDMA;
1039 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
1040 .ScatterGatherSegments[0]
1041 .SegmentByteCount =
1042 CommandMailbox->PhysicalDeviceInfo.DataTransferSize;
1043 DAC960_ExecuteCommand(Command);
1044 CommandStatus = Command->V2.CommandStatus;
1045 DAC960_DeallocateCommand(Command);
1046 return (CommandStatus == DAC960_V2_NormalCompletion);
1047 }
1048
1049
DAC960_V2_ConstructNewUnitSerialNumber(DAC960_Controller_T * Controller,DAC960_V2_CommandMailbox_T * CommandMailbox,int Channel,int TargetID,int LogicalUnit)1050 static void DAC960_V2_ConstructNewUnitSerialNumber(
1051 DAC960_Controller_T *Controller,
1052 DAC960_V2_CommandMailbox_T *CommandMailbox, int Channel, int TargetID,
1053 int LogicalUnit)
1054 {
1055 CommandMailbox->SCSI_10.CommandOpcode = DAC960_V2_SCSI_10_Passthru;
1056 CommandMailbox->SCSI_10.CommandControlBits
1057 .DataTransferControllerToHost = true;
1058 CommandMailbox->SCSI_10.CommandControlBits
1059 .NoAutoRequestSense = true;
1060 CommandMailbox->SCSI_10.DataTransferSize =
1061 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1062 CommandMailbox->SCSI_10.PhysicalDevice.LogicalUnit = LogicalUnit;
1063 CommandMailbox->SCSI_10.PhysicalDevice.TargetID = TargetID;
1064 CommandMailbox->SCSI_10.PhysicalDevice.Channel = Channel;
1065 CommandMailbox->SCSI_10.CDBLength = 6;
1066 CommandMailbox->SCSI_10.SCSI_CDB[0] = 0x12; /* INQUIRY */
1067 CommandMailbox->SCSI_10.SCSI_CDB[1] = 1; /* EVPD = 1 */
1068 CommandMailbox->SCSI_10.SCSI_CDB[2] = 0x80; /* Page Code */
1069 CommandMailbox->SCSI_10.SCSI_CDB[3] = 0; /* Reserved */
1070 CommandMailbox->SCSI_10.SCSI_CDB[4] =
1071 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1072 CommandMailbox->SCSI_10.SCSI_CDB[5] = 0; /* Control */
1073 CommandMailbox->SCSI_10.DataTransferMemoryAddress
1074 .ScatterGatherSegments[0]
1075 .SegmentDataPointer =
1076 Controller->V2.NewInquiryUnitSerialNumberDMA;
1077 CommandMailbox->SCSI_10.DataTransferMemoryAddress
1078 .ScatterGatherSegments[0]
1079 .SegmentByteCount =
1080 CommandMailbox->SCSI_10.DataTransferSize;
1081 }
1082
1083
1084 /*
1085 DAC960_V2_NewUnitSerialNumber executes an SCSI pass-through
1086 Inquiry command to a SCSI device identified by Channel number,
1087 Target id, Logical Unit Number. This function Waits for completion
1088 of the command.
1089
1090 The return data includes Unit Serial Number information for the
1091 specified device.
1092
1093 Data is stored in the controller's V2.NewPhysicalDeviceInfo dma-able
1094 memory buffer.
1095 */
1096
DAC960_V2_NewInquiryUnitSerialNumber(DAC960_Controller_T * Controller,int Channel,int TargetID,int LogicalUnit)1097 static bool DAC960_V2_NewInquiryUnitSerialNumber(DAC960_Controller_T *Controller,
1098 int Channel, int TargetID, int LogicalUnit)
1099 {
1100 DAC960_Command_T *Command;
1101 DAC960_V2_CommandMailbox_T *CommandMailbox;
1102 DAC960_V2_CommandStatus_T CommandStatus;
1103
1104 Command = DAC960_AllocateCommand(Controller);
1105 CommandMailbox = &Command->V2.CommandMailbox;
1106 DAC960_V2_ClearCommand(Command);
1107 Command->CommandType = DAC960_ImmediateCommand;
1108
1109 DAC960_V2_ConstructNewUnitSerialNumber(Controller, CommandMailbox,
1110 Channel, TargetID, LogicalUnit);
1111
1112 DAC960_ExecuteCommand(Command);
1113 CommandStatus = Command->V2.CommandStatus;
1114 DAC960_DeallocateCommand(Command);
1115 return (CommandStatus == DAC960_V2_NormalCompletion);
1116 }
1117
1118
1119 /*
1120 DAC960_V2_DeviceOperation executes a DAC960 V2 Firmware Controller Device
1121 Operation IOCTL Command and waits for completion. It returns true on
1122 success and false on failure.
1123 */
1124
DAC960_V2_DeviceOperation(DAC960_Controller_T * Controller,DAC960_V2_IOCTL_Opcode_T IOCTL_Opcode,DAC960_V2_OperationDevice_T OperationDevice)1125 static bool DAC960_V2_DeviceOperation(DAC960_Controller_T *Controller,
1126 DAC960_V2_IOCTL_Opcode_T IOCTL_Opcode,
1127 DAC960_V2_OperationDevice_T
1128 OperationDevice)
1129 {
1130 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
1131 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
1132 DAC960_V2_CommandStatus_T CommandStatus;
1133 DAC960_V2_ClearCommand(Command);
1134 Command->CommandType = DAC960_ImmediateCommand;
1135 CommandMailbox->DeviceOperation.CommandOpcode = DAC960_V2_IOCTL;
1136 CommandMailbox->DeviceOperation.CommandControlBits
1137 .DataTransferControllerToHost = true;
1138 CommandMailbox->DeviceOperation.CommandControlBits
1139 .NoAutoRequestSense = true;
1140 CommandMailbox->DeviceOperation.IOCTL_Opcode = IOCTL_Opcode;
1141 CommandMailbox->DeviceOperation.OperationDevice = OperationDevice;
1142 DAC960_ExecuteCommand(Command);
1143 CommandStatus = Command->V2.CommandStatus;
1144 DAC960_DeallocateCommand(Command);
1145 return (CommandStatus == DAC960_V2_NormalCompletion);
1146 }
1147
1148
1149 /*
1150 DAC960_V1_EnableMemoryMailboxInterface enables the Memory Mailbox Interface
1151 for DAC960 V1 Firmware Controllers.
1152
1153 PD and P controller types have no memory mailbox, but still need the
1154 other dma mapped memory.
1155 */
1156
DAC960_V1_EnableMemoryMailboxInterface(DAC960_Controller_T * Controller)1157 static bool DAC960_V1_EnableMemoryMailboxInterface(DAC960_Controller_T
1158 *Controller)
1159 {
1160 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
1161 DAC960_HardwareType_T hw_type = Controller->HardwareType;
1162 struct pci_dev *PCI_Device = Controller->PCIDevice;
1163 struct dma_loaf *DmaPages = &Controller->DmaPages;
1164 size_t DmaPagesSize;
1165 size_t CommandMailboxesSize;
1166 size_t StatusMailboxesSize;
1167
1168 DAC960_V1_CommandMailbox_T *CommandMailboxesMemory;
1169 dma_addr_t CommandMailboxesMemoryDMA;
1170
1171 DAC960_V1_StatusMailbox_T *StatusMailboxesMemory;
1172 dma_addr_t StatusMailboxesMemoryDMA;
1173
1174 DAC960_V1_CommandMailbox_T CommandMailbox;
1175 DAC960_V1_CommandStatus_T CommandStatus;
1176 int TimeoutCounter;
1177 int i;
1178
1179 memset(&CommandMailbox, 0, sizeof(DAC960_V1_CommandMailbox_T));
1180
1181 if (pci_set_dma_mask(Controller->PCIDevice, DMA_BIT_MASK(32)))
1182 return DAC960_Failure(Controller, "DMA mask out of range");
1183
1184 if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller)) {
1185 CommandMailboxesSize = 0;
1186 StatusMailboxesSize = 0;
1187 } else {
1188 CommandMailboxesSize = DAC960_V1_CommandMailboxCount * sizeof(DAC960_V1_CommandMailbox_T);
1189 StatusMailboxesSize = DAC960_V1_StatusMailboxCount * sizeof(DAC960_V1_StatusMailbox_T);
1190 }
1191 DmaPagesSize = CommandMailboxesSize + StatusMailboxesSize +
1192 sizeof(DAC960_V1_DCDB_T) + sizeof(DAC960_V1_Enquiry_T) +
1193 sizeof(DAC960_V1_ErrorTable_T) + sizeof(DAC960_V1_EventLogEntry_T) +
1194 sizeof(DAC960_V1_RebuildProgress_T) +
1195 sizeof(DAC960_V1_LogicalDriveInformationArray_T) +
1196 sizeof(DAC960_V1_BackgroundInitializationStatus_T) +
1197 sizeof(DAC960_V1_DeviceState_T) + sizeof(DAC960_SCSI_Inquiry_T) +
1198 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1199
1200 if (!init_dma_loaf(PCI_Device, DmaPages, DmaPagesSize))
1201 return false;
1202
1203
1204 if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller))
1205 goto skip_mailboxes;
1206
1207 CommandMailboxesMemory = slice_dma_loaf(DmaPages,
1208 CommandMailboxesSize, &CommandMailboxesMemoryDMA);
1209
1210 /* These are the base addresses for the command memory mailbox array */
1211 Controller->V1.FirstCommandMailbox = CommandMailboxesMemory;
1212 Controller->V1.FirstCommandMailboxDMA = CommandMailboxesMemoryDMA;
1213
1214 CommandMailboxesMemory += DAC960_V1_CommandMailboxCount - 1;
1215 Controller->V1.LastCommandMailbox = CommandMailboxesMemory;
1216 Controller->V1.NextCommandMailbox = Controller->V1.FirstCommandMailbox;
1217 Controller->V1.PreviousCommandMailbox1 = Controller->V1.LastCommandMailbox;
1218 Controller->V1.PreviousCommandMailbox2 =
1219 Controller->V1.LastCommandMailbox - 1;
1220
1221 /* These are the base addresses for the status memory mailbox array */
1222 StatusMailboxesMemory = slice_dma_loaf(DmaPages,
1223 StatusMailboxesSize, &StatusMailboxesMemoryDMA);
1224
1225 Controller->V1.FirstStatusMailbox = StatusMailboxesMemory;
1226 Controller->V1.FirstStatusMailboxDMA = StatusMailboxesMemoryDMA;
1227 StatusMailboxesMemory += DAC960_V1_StatusMailboxCount - 1;
1228 Controller->V1.LastStatusMailbox = StatusMailboxesMemory;
1229 Controller->V1.NextStatusMailbox = Controller->V1.FirstStatusMailbox;
1230
1231 skip_mailboxes:
1232 Controller->V1.MonitoringDCDB = slice_dma_loaf(DmaPages,
1233 sizeof(DAC960_V1_DCDB_T),
1234 &Controller->V1.MonitoringDCDB_DMA);
1235
1236 Controller->V1.NewEnquiry = slice_dma_loaf(DmaPages,
1237 sizeof(DAC960_V1_Enquiry_T),
1238 &Controller->V1.NewEnquiryDMA);
1239
1240 Controller->V1.NewErrorTable = slice_dma_loaf(DmaPages,
1241 sizeof(DAC960_V1_ErrorTable_T),
1242 &Controller->V1.NewErrorTableDMA);
1243
1244 Controller->V1.EventLogEntry = slice_dma_loaf(DmaPages,
1245 sizeof(DAC960_V1_EventLogEntry_T),
1246 &Controller->V1.EventLogEntryDMA);
1247
1248 Controller->V1.RebuildProgress = slice_dma_loaf(DmaPages,
1249 sizeof(DAC960_V1_RebuildProgress_T),
1250 &Controller->V1.RebuildProgressDMA);
1251
1252 Controller->V1.NewLogicalDriveInformation = slice_dma_loaf(DmaPages,
1253 sizeof(DAC960_V1_LogicalDriveInformationArray_T),
1254 &Controller->V1.NewLogicalDriveInformationDMA);
1255
1256 Controller->V1.BackgroundInitializationStatus = slice_dma_loaf(DmaPages,
1257 sizeof(DAC960_V1_BackgroundInitializationStatus_T),
1258 &Controller->V1.BackgroundInitializationStatusDMA);
1259
1260 Controller->V1.NewDeviceState = slice_dma_loaf(DmaPages,
1261 sizeof(DAC960_V1_DeviceState_T),
1262 &Controller->V1.NewDeviceStateDMA);
1263
1264 Controller->V1.NewInquiryStandardData = slice_dma_loaf(DmaPages,
1265 sizeof(DAC960_SCSI_Inquiry_T),
1266 &Controller->V1.NewInquiryStandardDataDMA);
1267
1268 Controller->V1.NewInquiryUnitSerialNumber = slice_dma_loaf(DmaPages,
1269 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
1270 &Controller->V1.NewInquiryUnitSerialNumberDMA);
1271
1272 if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller))
1273 return true;
1274
1275 /* Enable the Memory Mailbox Interface. */
1276 Controller->V1.DualModeMemoryMailboxInterface = true;
1277 CommandMailbox.TypeX.CommandOpcode = 0x2B;
1278 CommandMailbox.TypeX.CommandIdentifier = 0;
1279 CommandMailbox.TypeX.CommandOpcode2 = 0x14;
1280 CommandMailbox.TypeX.CommandMailboxesBusAddress =
1281 Controller->V1.FirstCommandMailboxDMA;
1282 CommandMailbox.TypeX.StatusMailboxesBusAddress =
1283 Controller->V1.FirstStatusMailboxDMA;
1284 #define TIMEOUT_COUNT 1000000
1285
1286 for (i = 0; i < 2; i++)
1287 switch (Controller->HardwareType)
1288 {
1289 case DAC960_LA_Controller:
1290 TimeoutCounter = TIMEOUT_COUNT;
1291 while (--TimeoutCounter >= 0)
1292 {
1293 if (!DAC960_LA_HardwareMailboxFullP(ControllerBaseAddress))
1294 break;
1295 udelay(10);
1296 }
1297 if (TimeoutCounter < 0) return false;
1298 DAC960_LA_WriteHardwareMailbox(ControllerBaseAddress, &CommandMailbox);
1299 DAC960_LA_HardwareMailboxNewCommand(ControllerBaseAddress);
1300 TimeoutCounter = TIMEOUT_COUNT;
1301 while (--TimeoutCounter >= 0)
1302 {
1303 if (DAC960_LA_HardwareMailboxStatusAvailableP(
1304 ControllerBaseAddress))
1305 break;
1306 udelay(10);
1307 }
1308 if (TimeoutCounter < 0) return false;
1309 CommandStatus = DAC960_LA_ReadStatusRegister(ControllerBaseAddress);
1310 DAC960_LA_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1311 DAC960_LA_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1312 if (CommandStatus == DAC960_V1_NormalCompletion) return true;
1313 Controller->V1.DualModeMemoryMailboxInterface = false;
1314 CommandMailbox.TypeX.CommandOpcode2 = 0x10;
1315 break;
1316 case DAC960_PG_Controller:
1317 TimeoutCounter = TIMEOUT_COUNT;
1318 while (--TimeoutCounter >= 0)
1319 {
1320 if (!DAC960_PG_HardwareMailboxFullP(ControllerBaseAddress))
1321 break;
1322 udelay(10);
1323 }
1324 if (TimeoutCounter < 0) return false;
1325 DAC960_PG_WriteHardwareMailbox(ControllerBaseAddress, &CommandMailbox);
1326 DAC960_PG_HardwareMailboxNewCommand(ControllerBaseAddress);
1327
1328 TimeoutCounter = TIMEOUT_COUNT;
1329 while (--TimeoutCounter >= 0)
1330 {
1331 if (DAC960_PG_HardwareMailboxStatusAvailableP(
1332 ControllerBaseAddress))
1333 break;
1334 udelay(10);
1335 }
1336 if (TimeoutCounter < 0) return false;
1337 CommandStatus = DAC960_PG_ReadStatusRegister(ControllerBaseAddress);
1338 DAC960_PG_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1339 DAC960_PG_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1340 if (CommandStatus == DAC960_V1_NormalCompletion) return true;
1341 Controller->V1.DualModeMemoryMailboxInterface = false;
1342 CommandMailbox.TypeX.CommandOpcode2 = 0x10;
1343 break;
1344 default:
1345 DAC960_Failure(Controller, "Unknown Controller Type\n");
1346 break;
1347 }
1348 return false;
1349 }
1350
1351
1352 /*
1353 DAC960_V2_EnableMemoryMailboxInterface enables the Memory Mailbox Interface
1354 for DAC960 V2 Firmware Controllers.
1355
1356 Aggregate the space needed for the controller's memory mailbox and
1357 the other data structures that will be targets of dma transfers with
1358 the controller. Allocate a dma-mapped region of memory to hold these
1359 structures. Then, save CPU pointers and dma_addr_t values to reference
1360 the structures that are contained in that region.
1361 */
1362
DAC960_V2_EnableMemoryMailboxInterface(DAC960_Controller_T * Controller)1363 static bool DAC960_V2_EnableMemoryMailboxInterface(DAC960_Controller_T
1364 *Controller)
1365 {
1366 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
1367 struct pci_dev *PCI_Device = Controller->PCIDevice;
1368 struct dma_loaf *DmaPages = &Controller->DmaPages;
1369 size_t DmaPagesSize;
1370 size_t CommandMailboxesSize;
1371 size_t StatusMailboxesSize;
1372
1373 DAC960_V2_CommandMailbox_T *CommandMailboxesMemory;
1374 dma_addr_t CommandMailboxesMemoryDMA;
1375
1376 DAC960_V2_StatusMailbox_T *StatusMailboxesMemory;
1377 dma_addr_t StatusMailboxesMemoryDMA;
1378
1379 DAC960_V2_CommandMailbox_T *CommandMailbox;
1380 dma_addr_t CommandMailboxDMA;
1381 DAC960_V2_CommandStatus_T CommandStatus;
1382
1383 if (pci_set_dma_mask(Controller->PCIDevice, DMA_BIT_MASK(64)) &&
1384 pci_set_dma_mask(Controller->PCIDevice, DMA_BIT_MASK(32)))
1385 return DAC960_Failure(Controller, "DMA mask out of range");
1386
1387 /* This is a temporary dma mapping, used only in the scope of this function */
1388 CommandMailbox = pci_alloc_consistent(PCI_Device,
1389 sizeof(DAC960_V2_CommandMailbox_T), &CommandMailboxDMA);
1390 if (CommandMailbox == NULL)
1391 return false;
1392
1393 CommandMailboxesSize = DAC960_V2_CommandMailboxCount * sizeof(DAC960_V2_CommandMailbox_T);
1394 StatusMailboxesSize = DAC960_V2_StatusMailboxCount * sizeof(DAC960_V2_StatusMailbox_T);
1395 DmaPagesSize =
1396 CommandMailboxesSize + StatusMailboxesSize +
1397 sizeof(DAC960_V2_HealthStatusBuffer_T) +
1398 sizeof(DAC960_V2_ControllerInfo_T) +
1399 sizeof(DAC960_V2_LogicalDeviceInfo_T) +
1400 sizeof(DAC960_V2_PhysicalDeviceInfo_T) +
1401 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T) +
1402 sizeof(DAC960_V2_Event_T) +
1403 sizeof(DAC960_V2_PhysicalToLogicalDevice_T);
1404
1405 if (!init_dma_loaf(PCI_Device, DmaPages, DmaPagesSize)) {
1406 pci_free_consistent(PCI_Device, sizeof(DAC960_V2_CommandMailbox_T),
1407 CommandMailbox, CommandMailboxDMA);
1408 return false;
1409 }
1410
1411 CommandMailboxesMemory = slice_dma_loaf(DmaPages,
1412 CommandMailboxesSize, &CommandMailboxesMemoryDMA);
1413
1414 /* These are the base addresses for the command memory mailbox array */
1415 Controller->V2.FirstCommandMailbox = CommandMailboxesMemory;
1416 Controller->V2.FirstCommandMailboxDMA = CommandMailboxesMemoryDMA;
1417
1418 CommandMailboxesMemory += DAC960_V2_CommandMailboxCount - 1;
1419 Controller->V2.LastCommandMailbox = CommandMailboxesMemory;
1420 Controller->V2.NextCommandMailbox = Controller->V2.FirstCommandMailbox;
1421 Controller->V2.PreviousCommandMailbox1 = Controller->V2.LastCommandMailbox;
1422 Controller->V2.PreviousCommandMailbox2 =
1423 Controller->V2.LastCommandMailbox - 1;
1424
1425 /* These are the base addresses for the status memory mailbox array */
1426 StatusMailboxesMemory = slice_dma_loaf(DmaPages,
1427 StatusMailboxesSize, &StatusMailboxesMemoryDMA);
1428
1429 Controller->V2.FirstStatusMailbox = StatusMailboxesMemory;
1430 Controller->V2.FirstStatusMailboxDMA = StatusMailboxesMemoryDMA;
1431 StatusMailboxesMemory += DAC960_V2_StatusMailboxCount - 1;
1432 Controller->V2.LastStatusMailbox = StatusMailboxesMemory;
1433 Controller->V2.NextStatusMailbox = Controller->V2.FirstStatusMailbox;
1434
1435 Controller->V2.HealthStatusBuffer = slice_dma_loaf(DmaPages,
1436 sizeof(DAC960_V2_HealthStatusBuffer_T),
1437 &Controller->V2.HealthStatusBufferDMA);
1438
1439 Controller->V2.NewControllerInformation = slice_dma_loaf(DmaPages,
1440 sizeof(DAC960_V2_ControllerInfo_T),
1441 &Controller->V2.NewControllerInformationDMA);
1442
1443 Controller->V2.NewLogicalDeviceInformation = slice_dma_loaf(DmaPages,
1444 sizeof(DAC960_V2_LogicalDeviceInfo_T),
1445 &Controller->V2.NewLogicalDeviceInformationDMA);
1446
1447 Controller->V2.NewPhysicalDeviceInformation = slice_dma_loaf(DmaPages,
1448 sizeof(DAC960_V2_PhysicalDeviceInfo_T),
1449 &Controller->V2.NewPhysicalDeviceInformationDMA);
1450
1451 Controller->V2.NewInquiryUnitSerialNumber = slice_dma_loaf(DmaPages,
1452 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
1453 &Controller->V2.NewInquiryUnitSerialNumberDMA);
1454
1455 Controller->V2.Event = slice_dma_loaf(DmaPages,
1456 sizeof(DAC960_V2_Event_T),
1457 &Controller->V2.EventDMA);
1458
1459 Controller->V2.PhysicalToLogicalDevice = slice_dma_loaf(DmaPages,
1460 sizeof(DAC960_V2_PhysicalToLogicalDevice_T),
1461 &Controller->V2.PhysicalToLogicalDeviceDMA);
1462
1463 /*
1464 Enable the Memory Mailbox Interface.
1465
1466 I don't know why we can't just use one of the memory mailboxes
1467 we just allocated to do this, instead of using this temporary one.
1468 Try this change later.
1469 */
1470 memset(CommandMailbox, 0, sizeof(DAC960_V2_CommandMailbox_T));
1471 CommandMailbox->SetMemoryMailbox.CommandIdentifier = 1;
1472 CommandMailbox->SetMemoryMailbox.CommandOpcode = DAC960_V2_IOCTL;
1473 CommandMailbox->SetMemoryMailbox.CommandControlBits.NoAutoRequestSense = true;
1474 CommandMailbox->SetMemoryMailbox.FirstCommandMailboxSizeKB =
1475 (DAC960_V2_CommandMailboxCount * sizeof(DAC960_V2_CommandMailbox_T)) >> 10;
1476 CommandMailbox->SetMemoryMailbox.FirstStatusMailboxSizeKB =
1477 (DAC960_V2_StatusMailboxCount * sizeof(DAC960_V2_StatusMailbox_T)) >> 10;
1478 CommandMailbox->SetMemoryMailbox.SecondCommandMailboxSizeKB = 0;
1479 CommandMailbox->SetMemoryMailbox.SecondStatusMailboxSizeKB = 0;
1480 CommandMailbox->SetMemoryMailbox.RequestSenseSize = 0;
1481 CommandMailbox->SetMemoryMailbox.IOCTL_Opcode = DAC960_V2_SetMemoryMailbox;
1482 CommandMailbox->SetMemoryMailbox.HealthStatusBufferSizeKB = 1;
1483 CommandMailbox->SetMemoryMailbox.HealthStatusBufferBusAddress =
1484 Controller->V2.HealthStatusBufferDMA;
1485 CommandMailbox->SetMemoryMailbox.FirstCommandMailboxBusAddress =
1486 Controller->V2.FirstCommandMailboxDMA;
1487 CommandMailbox->SetMemoryMailbox.FirstStatusMailboxBusAddress =
1488 Controller->V2.FirstStatusMailboxDMA;
1489 switch (Controller->HardwareType)
1490 {
1491 case DAC960_GEM_Controller:
1492 while (DAC960_GEM_HardwareMailboxFullP(ControllerBaseAddress))
1493 udelay(1);
1494 DAC960_GEM_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA);
1495 DAC960_GEM_HardwareMailboxNewCommand(ControllerBaseAddress);
1496 while (!DAC960_GEM_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
1497 udelay(1);
1498 CommandStatus = DAC960_GEM_ReadCommandStatus(ControllerBaseAddress);
1499 DAC960_GEM_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1500 DAC960_GEM_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1501 break;
1502 case DAC960_BA_Controller:
1503 while (DAC960_BA_HardwareMailboxFullP(ControllerBaseAddress))
1504 udelay(1);
1505 DAC960_BA_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA);
1506 DAC960_BA_HardwareMailboxNewCommand(ControllerBaseAddress);
1507 while (!DAC960_BA_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
1508 udelay(1);
1509 CommandStatus = DAC960_BA_ReadCommandStatus(ControllerBaseAddress);
1510 DAC960_BA_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1511 DAC960_BA_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1512 break;
1513 case DAC960_LP_Controller:
1514 while (DAC960_LP_HardwareMailboxFullP(ControllerBaseAddress))
1515 udelay(1);
1516 DAC960_LP_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA);
1517 DAC960_LP_HardwareMailboxNewCommand(ControllerBaseAddress);
1518 while (!DAC960_LP_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
1519 udelay(1);
1520 CommandStatus = DAC960_LP_ReadCommandStatus(ControllerBaseAddress);
1521 DAC960_LP_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1522 DAC960_LP_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1523 break;
1524 default:
1525 DAC960_Failure(Controller, "Unknown Controller Type\n");
1526 CommandStatus = DAC960_V2_AbormalCompletion;
1527 break;
1528 }
1529 pci_free_consistent(PCI_Device, sizeof(DAC960_V2_CommandMailbox_T),
1530 CommandMailbox, CommandMailboxDMA);
1531 return (CommandStatus == DAC960_V2_NormalCompletion);
1532 }
1533
1534
1535 /*
1536 DAC960_V1_ReadControllerConfiguration reads the Configuration Information
1537 from DAC960 V1 Firmware Controllers and initializes the Controller structure.
1538 */
1539
DAC960_V1_ReadControllerConfiguration(DAC960_Controller_T * Controller)1540 static bool DAC960_V1_ReadControllerConfiguration(DAC960_Controller_T
1541 *Controller)
1542 {
1543 DAC960_V1_Enquiry2_T *Enquiry2;
1544 dma_addr_t Enquiry2DMA;
1545 DAC960_V1_Config2_T *Config2;
1546 dma_addr_t Config2DMA;
1547 int LogicalDriveNumber, Channel, TargetID;
1548 struct dma_loaf local_dma;
1549
1550 if (!init_dma_loaf(Controller->PCIDevice, &local_dma,
1551 sizeof(DAC960_V1_Enquiry2_T) + sizeof(DAC960_V1_Config2_T)))
1552 return DAC960_Failure(Controller, "LOGICAL DEVICE ALLOCATION");
1553
1554 Enquiry2 = slice_dma_loaf(&local_dma, sizeof(DAC960_V1_Enquiry2_T), &Enquiry2DMA);
1555 Config2 = slice_dma_loaf(&local_dma, sizeof(DAC960_V1_Config2_T), &Config2DMA);
1556
1557 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_Enquiry,
1558 Controller->V1.NewEnquiryDMA)) {
1559 free_dma_loaf(Controller->PCIDevice, &local_dma);
1560 return DAC960_Failure(Controller, "ENQUIRY");
1561 }
1562 memcpy(&Controller->V1.Enquiry, Controller->V1.NewEnquiry,
1563 sizeof(DAC960_V1_Enquiry_T));
1564
1565 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_Enquiry2, Enquiry2DMA)) {
1566 free_dma_loaf(Controller->PCIDevice, &local_dma);
1567 return DAC960_Failure(Controller, "ENQUIRY2");
1568 }
1569
1570 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_ReadConfig2, Config2DMA)) {
1571 free_dma_loaf(Controller->PCIDevice, &local_dma);
1572 return DAC960_Failure(Controller, "READ CONFIG2");
1573 }
1574
1575 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_GetLogicalDriveInformation,
1576 Controller->V1.NewLogicalDriveInformationDMA)) {
1577 free_dma_loaf(Controller->PCIDevice, &local_dma);
1578 return DAC960_Failure(Controller, "GET LOGICAL DRIVE INFORMATION");
1579 }
1580 memcpy(&Controller->V1.LogicalDriveInformation,
1581 Controller->V1.NewLogicalDriveInformation,
1582 sizeof(DAC960_V1_LogicalDriveInformationArray_T));
1583
1584 for (Channel = 0; Channel < Enquiry2->ActualChannels; Channel++)
1585 for (TargetID = 0; TargetID < Enquiry2->MaxTargets; TargetID++) {
1586 if (!DAC960_V1_ExecuteType3D(Controller, DAC960_V1_GetDeviceState,
1587 Channel, TargetID,
1588 Controller->V1.NewDeviceStateDMA)) {
1589 free_dma_loaf(Controller->PCIDevice, &local_dma);
1590 return DAC960_Failure(Controller, "GET DEVICE STATE");
1591 }
1592 memcpy(&Controller->V1.DeviceState[Channel][TargetID],
1593 Controller->V1.NewDeviceState, sizeof(DAC960_V1_DeviceState_T));
1594 }
1595 /*
1596 Initialize the Controller Model Name and Full Model Name fields.
1597 */
1598 switch (Enquiry2->HardwareID.SubModel)
1599 {
1600 case DAC960_V1_P_PD_PU:
1601 if (Enquiry2->SCSICapability.BusSpeed == DAC960_V1_Ultra)
1602 strcpy(Controller->ModelName, "DAC960PU");
1603 else strcpy(Controller->ModelName, "DAC960PD");
1604 break;
1605 case DAC960_V1_PL:
1606 strcpy(Controller->ModelName, "DAC960PL");
1607 break;
1608 case DAC960_V1_PG:
1609 strcpy(Controller->ModelName, "DAC960PG");
1610 break;
1611 case DAC960_V1_PJ:
1612 strcpy(Controller->ModelName, "DAC960PJ");
1613 break;
1614 case DAC960_V1_PR:
1615 strcpy(Controller->ModelName, "DAC960PR");
1616 break;
1617 case DAC960_V1_PT:
1618 strcpy(Controller->ModelName, "DAC960PT");
1619 break;
1620 case DAC960_V1_PTL0:
1621 strcpy(Controller->ModelName, "DAC960PTL0");
1622 break;
1623 case DAC960_V1_PRL:
1624 strcpy(Controller->ModelName, "DAC960PRL");
1625 break;
1626 case DAC960_V1_PTL1:
1627 strcpy(Controller->ModelName, "DAC960PTL1");
1628 break;
1629 case DAC960_V1_1164P:
1630 strcpy(Controller->ModelName, "DAC1164P");
1631 break;
1632 default:
1633 free_dma_loaf(Controller->PCIDevice, &local_dma);
1634 return DAC960_Failure(Controller, "MODEL VERIFICATION");
1635 }
1636 strcpy(Controller->FullModelName, "Mylex ");
1637 strcat(Controller->FullModelName, Controller->ModelName);
1638 /*
1639 Initialize the Controller Firmware Version field and verify that it
1640 is a supported firmware version. The supported firmware versions are:
1641
1642 DAC1164P 5.06 and above
1643 DAC960PTL/PRL/PJ/PG 4.06 and above
1644 DAC960PU/PD/PL 3.51 and above
1645 DAC960PU/PD/PL/P 2.73 and above
1646 */
1647 #if defined(CONFIG_ALPHA)
1648 /*
1649 DEC Alpha machines were often equipped with DAC960 cards that were
1650 OEMed from Mylex, and had their own custom firmware. Version 2.70,
1651 the last custom FW revision to be released by DEC for these older
1652 controllers, appears to work quite well with this driver.
1653
1654 Cards tested successfully were several versions each of the PD and
1655 PU, called by DEC the KZPSC and KZPAC, respectively, and having
1656 the Manufacturer Numbers (from Mylex), usually on a sticker on the
1657 back of the board, of:
1658
1659 KZPSC: D040347 (1-channel) or D040348 (2-channel) or D040349 (3-channel)
1660 KZPAC: D040395 (1-channel) or D040396 (2-channel) or D040397 (3-channel)
1661 */
1662 # define FIRMWARE_27X "2.70"
1663 #else
1664 # define FIRMWARE_27X "2.73"
1665 #endif
1666
1667 if (Enquiry2->FirmwareID.MajorVersion == 0)
1668 {
1669 Enquiry2->FirmwareID.MajorVersion =
1670 Controller->V1.Enquiry.MajorFirmwareVersion;
1671 Enquiry2->FirmwareID.MinorVersion =
1672 Controller->V1.Enquiry.MinorFirmwareVersion;
1673 Enquiry2->FirmwareID.FirmwareType = '0';
1674 Enquiry2->FirmwareID.TurnID = 0;
1675 }
1676 snprintf(Controller->FirmwareVersion, sizeof(Controller->FirmwareVersion),
1677 "%d.%02d-%c-%02d",
1678 Enquiry2->FirmwareID.MajorVersion,
1679 Enquiry2->FirmwareID.MinorVersion,
1680 Enquiry2->FirmwareID.FirmwareType,
1681 Enquiry2->FirmwareID.TurnID);
1682 if (!((Controller->FirmwareVersion[0] == '5' &&
1683 strcmp(Controller->FirmwareVersion, "5.06") >= 0) ||
1684 (Controller->FirmwareVersion[0] == '4' &&
1685 strcmp(Controller->FirmwareVersion, "4.06") >= 0) ||
1686 (Controller->FirmwareVersion[0] == '3' &&
1687 strcmp(Controller->FirmwareVersion, "3.51") >= 0) ||
1688 (Controller->FirmwareVersion[0] == '2' &&
1689 strcmp(Controller->FirmwareVersion, FIRMWARE_27X) >= 0)))
1690 {
1691 DAC960_Failure(Controller, "FIRMWARE VERSION VERIFICATION");
1692 DAC960_Error("Firmware Version = '%s'\n", Controller,
1693 Controller->FirmwareVersion);
1694 free_dma_loaf(Controller->PCIDevice, &local_dma);
1695 return false;
1696 }
1697 /*
1698 Initialize the Controller Channels, Targets, Memory Size, and SAF-TE
1699 Enclosure Management Enabled fields.
1700 */
1701 Controller->Channels = Enquiry2->ActualChannels;
1702 Controller->Targets = Enquiry2->MaxTargets;
1703 Controller->MemorySize = Enquiry2->MemorySize >> 20;
1704 Controller->V1.SAFTE_EnclosureManagementEnabled =
1705 (Enquiry2->FaultManagementType == DAC960_V1_SAFTE);
1706 /*
1707 Initialize the Controller Queue Depth, Driver Queue Depth, Logical Drive
1708 Count, Maximum Blocks per Command, Controller Scatter/Gather Limit, and
1709 Driver Scatter/Gather Limit. The Driver Queue Depth must be at most one
1710 less than the Controller Queue Depth to allow for an automatic drive
1711 rebuild operation.
1712 */
1713 Controller->ControllerQueueDepth = Controller->V1.Enquiry.MaxCommands;
1714 Controller->DriverQueueDepth = Controller->ControllerQueueDepth - 1;
1715 if (Controller->DriverQueueDepth > DAC960_MaxDriverQueueDepth)
1716 Controller->DriverQueueDepth = DAC960_MaxDriverQueueDepth;
1717 Controller->LogicalDriveCount =
1718 Controller->V1.Enquiry.NumberOfLogicalDrives;
1719 Controller->MaxBlocksPerCommand = Enquiry2->MaxBlocksPerCommand;
1720 Controller->ControllerScatterGatherLimit = Enquiry2->MaxScatterGatherEntries;
1721 Controller->DriverScatterGatherLimit =
1722 Controller->ControllerScatterGatherLimit;
1723 if (Controller->DriverScatterGatherLimit > DAC960_V1_ScatterGatherLimit)
1724 Controller->DriverScatterGatherLimit = DAC960_V1_ScatterGatherLimit;
1725 /*
1726 Initialize the Stripe Size, Segment Size, and Geometry Translation.
1727 */
1728 Controller->V1.StripeSize = Config2->BlocksPerStripe * Config2->BlockFactor
1729 >> (10 - DAC960_BlockSizeBits);
1730 Controller->V1.SegmentSize = Config2->BlocksPerCacheLine * Config2->BlockFactor
1731 >> (10 - DAC960_BlockSizeBits);
1732 switch (Config2->DriveGeometry)
1733 {
1734 case DAC960_V1_Geometry_128_32:
1735 Controller->V1.GeometryTranslationHeads = 128;
1736 Controller->V1.GeometryTranslationSectors = 32;
1737 break;
1738 case DAC960_V1_Geometry_255_63:
1739 Controller->V1.GeometryTranslationHeads = 255;
1740 Controller->V1.GeometryTranslationSectors = 63;
1741 break;
1742 default:
1743 free_dma_loaf(Controller->PCIDevice, &local_dma);
1744 return DAC960_Failure(Controller, "CONFIG2 DRIVE GEOMETRY");
1745 }
1746 /*
1747 Initialize the Background Initialization Status.
1748 */
1749 if ((Controller->FirmwareVersion[0] == '4' &&
1750 strcmp(Controller->FirmwareVersion, "4.08") >= 0) ||
1751 (Controller->FirmwareVersion[0] == '5' &&
1752 strcmp(Controller->FirmwareVersion, "5.08") >= 0))
1753 {
1754 Controller->V1.BackgroundInitializationStatusSupported = true;
1755 DAC960_V1_ExecuteType3B(Controller,
1756 DAC960_V1_BackgroundInitializationControl, 0x20,
1757 Controller->
1758 V1.BackgroundInitializationStatusDMA);
1759 memcpy(&Controller->V1.LastBackgroundInitializationStatus,
1760 Controller->V1.BackgroundInitializationStatus,
1761 sizeof(DAC960_V1_BackgroundInitializationStatus_T));
1762 }
1763 /*
1764 Initialize the Logical Drive Initially Accessible flag.
1765 */
1766 for (LogicalDriveNumber = 0;
1767 LogicalDriveNumber < Controller->LogicalDriveCount;
1768 LogicalDriveNumber++)
1769 if (Controller->V1.LogicalDriveInformation
1770 [LogicalDriveNumber].LogicalDriveState !=
1771 DAC960_V1_LogicalDrive_Offline)
1772 Controller->LogicalDriveInitiallyAccessible[LogicalDriveNumber] = true;
1773 Controller->V1.LastRebuildStatus = DAC960_V1_NoRebuildOrCheckInProgress;
1774 free_dma_loaf(Controller->PCIDevice, &local_dma);
1775 return true;
1776 }
1777
1778
1779 /*
1780 DAC960_V2_ReadControllerConfiguration reads the Configuration Information
1781 from DAC960 V2 Firmware Controllers and initializes the Controller structure.
1782 */
1783
DAC960_V2_ReadControllerConfiguration(DAC960_Controller_T * Controller)1784 static bool DAC960_V2_ReadControllerConfiguration(DAC960_Controller_T
1785 *Controller)
1786 {
1787 DAC960_V2_ControllerInfo_T *ControllerInfo =
1788 &Controller->V2.ControllerInformation;
1789 unsigned short LogicalDeviceNumber = 0;
1790 int ModelNameLength;
1791
1792 /* Get data into dma-able area, then copy into permanent location */
1793 if (!DAC960_V2_NewControllerInfo(Controller))
1794 return DAC960_Failure(Controller, "GET CONTROLLER INFO");
1795 memcpy(ControllerInfo, Controller->V2.NewControllerInformation,
1796 sizeof(DAC960_V2_ControllerInfo_T));
1797
1798
1799 if (!DAC960_V2_GeneralInfo(Controller))
1800 return DAC960_Failure(Controller, "GET HEALTH STATUS");
1801
1802 /*
1803 Initialize the Controller Model Name and Full Model Name fields.
1804 */
1805 ModelNameLength = sizeof(ControllerInfo->ControllerName);
1806 if (ModelNameLength > sizeof(Controller->ModelName)-1)
1807 ModelNameLength = sizeof(Controller->ModelName)-1;
1808 memcpy(Controller->ModelName, ControllerInfo->ControllerName,
1809 ModelNameLength);
1810 ModelNameLength--;
1811 while (Controller->ModelName[ModelNameLength] == ' ' ||
1812 Controller->ModelName[ModelNameLength] == '\0')
1813 ModelNameLength--;
1814 Controller->ModelName[++ModelNameLength] = '\0';
1815 strcpy(Controller->FullModelName, "Mylex ");
1816 strcat(Controller->FullModelName, Controller->ModelName);
1817 /*
1818 Initialize the Controller Firmware Version field.
1819 */
1820 sprintf(Controller->FirmwareVersion, "%d.%02d-%02d",
1821 ControllerInfo->FirmwareMajorVersion,
1822 ControllerInfo->FirmwareMinorVersion,
1823 ControllerInfo->FirmwareTurnNumber);
1824 if (ControllerInfo->FirmwareMajorVersion == 6 &&
1825 ControllerInfo->FirmwareMinorVersion == 0 &&
1826 ControllerInfo->FirmwareTurnNumber < 1)
1827 {
1828 DAC960_Info("FIRMWARE VERSION %s DOES NOT PROVIDE THE CONTROLLER\n",
1829 Controller, Controller->FirmwareVersion);
1830 DAC960_Info("STATUS MONITORING FUNCTIONALITY NEEDED BY THIS DRIVER.\n",
1831 Controller);
1832 DAC960_Info("PLEASE UPGRADE TO VERSION 6.00-01 OR ABOVE.\n",
1833 Controller);
1834 }
1835 /*
1836 Initialize the Controller Channels, Targets, and Memory Size.
1837 */
1838 Controller->Channels = ControllerInfo->NumberOfPhysicalChannelsPresent;
1839 Controller->Targets =
1840 ControllerInfo->MaximumTargetsPerChannel
1841 [ControllerInfo->NumberOfPhysicalChannelsPresent-1];
1842 Controller->MemorySize = ControllerInfo->MemorySizeMB;
1843 /*
1844 Initialize the Controller Queue Depth, Driver Queue Depth, Logical Drive
1845 Count, Maximum Blocks per Command, Controller Scatter/Gather Limit, and
1846 Driver Scatter/Gather Limit. The Driver Queue Depth must be at most one
1847 less than the Controller Queue Depth to allow for an automatic drive
1848 rebuild operation.
1849 */
1850 Controller->ControllerQueueDepth = ControllerInfo->MaximumParallelCommands;
1851 Controller->DriverQueueDepth = Controller->ControllerQueueDepth - 1;
1852 if (Controller->DriverQueueDepth > DAC960_MaxDriverQueueDepth)
1853 Controller->DriverQueueDepth = DAC960_MaxDriverQueueDepth;
1854 Controller->LogicalDriveCount = ControllerInfo->LogicalDevicesPresent;
1855 Controller->MaxBlocksPerCommand =
1856 ControllerInfo->MaximumDataTransferSizeInBlocks;
1857 Controller->ControllerScatterGatherLimit =
1858 ControllerInfo->MaximumScatterGatherEntries;
1859 Controller->DriverScatterGatherLimit =
1860 Controller->ControllerScatterGatherLimit;
1861 if (Controller->DriverScatterGatherLimit > DAC960_V2_ScatterGatherLimit)
1862 Controller->DriverScatterGatherLimit = DAC960_V2_ScatterGatherLimit;
1863 /*
1864 Initialize the Logical Device Information.
1865 */
1866 while (true)
1867 {
1868 DAC960_V2_LogicalDeviceInfo_T *NewLogicalDeviceInfo =
1869 Controller->V2.NewLogicalDeviceInformation;
1870 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo;
1871 DAC960_V2_PhysicalDevice_T PhysicalDevice;
1872
1873 if (!DAC960_V2_NewLogicalDeviceInfo(Controller, LogicalDeviceNumber))
1874 break;
1875 LogicalDeviceNumber = NewLogicalDeviceInfo->LogicalDeviceNumber;
1876 if (LogicalDeviceNumber >= DAC960_MaxLogicalDrives) {
1877 DAC960_Error("DAC960: Logical Drive Number %d not supported\n",
1878 Controller, LogicalDeviceNumber);
1879 break;
1880 }
1881 if (NewLogicalDeviceInfo->DeviceBlockSizeInBytes != DAC960_BlockSize) {
1882 DAC960_Error("DAC960: Logical Drive Block Size %d not supported\n",
1883 Controller, NewLogicalDeviceInfo->DeviceBlockSizeInBytes);
1884 LogicalDeviceNumber++;
1885 continue;
1886 }
1887 PhysicalDevice.Controller = 0;
1888 PhysicalDevice.Channel = NewLogicalDeviceInfo->Channel;
1889 PhysicalDevice.TargetID = NewLogicalDeviceInfo->TargetID;
1890 PhysicalDevice.LogicalUnit = NewLogicalDeviceInfo->LogicalUnit;
1891 Controller->V2.LogicalDriveToVirtualDevice[LogicalDeviceNumber] =
1892 PhysicalDevice;
1893 if (NewLogicalDeviceInfo->LogicalDeviceState !=
1894 DAC960_V2_LogicalDevice_Offline)
1895 Controller->LogicalDriveInitiallyAccessible[LogicalDeviceNumber] = true;
1896 LogicalDeviceInfo = kmalloc(sizeof(DAC960_V2_LogicalDeviceInfo_T),
1897 GFP_ATOMIC);
1898 if (LogicalDeviceInfo == NULL)
1899 return DAC960_Failure(Controller, "LOGICAL DEVICE ALLOCATION");
1900 Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber] =
1901 LogicalDeviceInfo;
1902 memcpy(LogicalDeviceInfo, NewLogicalDeviceInfo,
1903 sizeof(DAC960_V2_LogicalDeviceInfo_T));
1904 LogicalDeviceNumber++;
1905 }
1906 return true;
1907 }
1908
1909
1910 /*
1911 DAC960_ReportControllerConfiguration reports the Configuration Information
1912 for Controller.
1913 */
1914
DAC960_ReportControllerConfiguration(DAC960_Controller_T * Controller)1915 static bool DAC960_ReportControllerConfiguration(DAC960_Controller_T
1916 *Controller)
1917 {
1918 DAC960_Info("Configuring Mylex %s PCI RAID Controller\n",
1919 Controller, Controller->ModelName);
1920 DAC960_Info(" Firmware Version: %s, Channels: %d, Memory Size: %dMB\n",
1921 Controller, Controller->FirmwareVersion,
1922 Controller->Channels, Controller->MemorySize);
1923 DAC960_Info(" PCI Bus: %d, Device: %d, Function: %d, I/O Address: ",
1924 Controller, Controller->Bus,
1925 Controller->Device, Controller->Function);
1926 if (Controller->IO_Address == 0)
1927 DAC960_Info("Unassigned\n", Controller);
1928 else DAC960_Info("0x%X\n", Controller, Controller->IO_Address);
1929 DAC960_Info(" PCI Address: 0x%X mapped at 0x%lX, IRQ Channel: %d\n",
1930 Controller, Controller->PCI_Address,
1931 (unsigned long) Controller->BaseAddress,
1932 Controller->IRQ_Channel);
1933 DAC960_Info(" Controller Queue Depth: %d, "
1934 "Maximum Blocks per Command: %d\n",
1935 Controller, Controller->ControllerQueueDepth,
1936 Controller->MaxBlocksPerCommand);
1937 DAC960_Info(" Driver Queue Depth: %d, "
1938 "Scatter/Gather Limit: %d of %d Segments\n",
1939 Controller, Controller->DriverQueueDepth,
1940 Controller->DriverScatterGatherLimit,
1941 Controller->ControllerScatterGatherLimit);
1942 if (Controller->FirmwareType == DAC960_V1_Controller)
1943 {
1944 DAC960_Info(" Stripe Size: %dKB, Segment Size: %dKB, "
1945 "BIOS Geometry: %d/%d\n", Controller,
1946 Controller->V1.StripeSize,
1947 Controller->V1.SegmentSize,
1948 Controller->V1.GeometryTranslationHeads,
1949 Controller->V1.GeometryTranslationSectors);
1950 if (Controller->V1.SAFTE_EnclosureManagementEnabled)
1951 DAC960_Info(" SAF-TE Enclosure Management Enabled\n", Controller);
1952 }
1953 return true;
1954 }
1955
1956
1957 /*
1958 DAC960_V1_ReadDeviceConfiguration reads the Device Configuration Information
1959 for DAC960 V1 Firmware Controllers by requesting the SCSI Inquiry and SCSI
1960 Inquiry Unit Serial Number information for each device connected to
1961 Controller.
1962 */
1963
DAC960_V1_ReadDeviceConfiguration(DAC960_Controller_T * Controller)1964 static bool DAC960_V1_ReadDeviceConfiguration(DAC960_Controller_T
1965 *Controller)
1966 {
1967 struct dma_loaf local_dma;
1968
1969 dma_addr_t DCDBs_dma[DAC960_V1_MaxChannels];
1970 DAC960_V1_DCDB_T *DCDBs_cpu[DAC960_V1_MaxChannels];
1971
1972 dma_addr_t SCSI_Inquiry_dma[DAC960_V1_MaxChannels];
1973 DAC960_SCSI_Inquiry_T *SCSI_Inquiry_cpu[DAC960_V1_MaxChannels];
1974
1975 dma_addr_t SCSI_NewInquiryUnitSerialNumberDMA[DAC960_V1_MaxChannels];
1976 DAC960_SCSI_Inquiry_UnitSerialNumber_T *SCSI_NewInquiryUnitSerialNumberCPU[DAC960_V1_MaxChannels];
1977
1978 struct completion Completions[DAC960_V1_MaxChannels];
1979 unsigned long flags;
1980 int Channel, TargetID;
1981
1982 if (!init_dma_loaf(Controller->PCIDevice, &local_dma,
1983 DAC960_V1_MaxChannels*(sizeof(DAC960_V1_DCDB_T) +
1984 sizeof(DAC960_SCSI_Inquiry_T) +
1985 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T))))
1986 return DAC960_Failure(Controller,
1987 "DMA ALLOCATION FAILED IN ReadDeviceConfiguration");
1988
1989 for (Channel = 0; Channel < Controller->Channels; Channel++) {
1990 DCDBs_cpu[Channel] = slice_dma_loaf(&local_dma,
1991 sizeof(DAC960_V1_DCDB_T), DCDBs_dma + Channel);
1992 SCSI_Inquiry_cpu[Channel] = slice_dma_loaf(&local_dma,
1993 sizeof(DAC960_SCSI_Inquiry_T),
1994 SCSI_Inquiry_dma + Channel);
1995 SCSI_NewInquiryUnitSerialNumberCPU[Channel] = slice_dma_loaf(&local_dma,
1996 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
1997 SCSI_NewInquiryUnitSerialNumberDMA + Channel);
1998 }
1999
2000 for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
2001 {
2002 /*
2003 * For each channel, submit a probe for a device on that channel.
2004 * The timeout interval for a device that is present is 10 seconds.
2005 * With this approach, the timeout periods can elapse in parallel
2006 * on each channel.
2007 */
2008 for (Channel = 0; Channel < Controller->Channels; Channel++)
2009 {
2010 dma_addr_t NewInquiryStandardDataDMA = SCSI_Inquiry_dma[Channel];
2011 DAC960_V1_DCDB_T *DCDB = DCDBs_cpu[Channel];
2012 dma_addr_t DCDB_dma = DCDBs_dma[Channel];
2013 DAC960_Command_T *Command = Controller->Commands[Channel];
2014 struct completion *Completion = &Completions[Channel];
2015
2016 init_completion(Completion);
2017 DAC960_V1_ClearCommand(Command);
2018 Command->CommandType = DAC960_ImmediateCommand;
2019 Command->Completion = Completion;
2020 Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
2021 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_dma;
2022 DCDB->Channel = Channel;
2023 DCDB->TargetID = TargetID;
2024 DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
2025 DCDB->EarlyStatus = false;
2026 DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
2027 DCDB->NoAutomaticRequestSense = false;
2028 DCDB->DisconnectPermitted = true;
2029 DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_T);
2030 DCDB->BusAddress = NewInquiryStandardDataDMA;
2031 DCDB->CDBLength = 6;
2032 DCDB->TransferLengthHigh4 = 0;
2033 DCDB->SenseLength = sizeof(DCDB->SenseData);
2034 DCDB->CDB[0] = 0x12; /* INQUIRY */
2035 DCDB->CDB[1] = 0; /* EVPD = 0 */
2036 DCDB->CDB[2] = 0; /* Page Code */
2037 DCDB->CDB[3] = 0; /* Reserved */
2038 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_T);
2039 DCDB->CDB[5] = 0; /* Control */
2040
2041 spin_lock_irqsave(&Controller->queue_lock, flags);
2042 DAC960_QueueCommand(Command);
2043 spin_unlock_irqrestore(&Controller->queue_lock, flags);
2044 }
2045 /*
2046 * Wait for the problems submitted in the previous loop
2047 * to complete. On the probes that are successful,
2048 * get the serial number of the device that was found.
2049 */
2050 for (Channel = 0; Channel < Controller->Channels; Channel++)
2051 {
2052 DAC960_SCSI_Inquiry_T *InquiryStandardData =
2053 &Controller->V1.InquiryStandardData[Channel][TargetID];
2054 DAC960_SCSI_Inquiry_T *NewInquiryStandardData = SCSI_Inquiry_cpu[Channel];
2055 dma_addr_t NewInquiryUnitSerialNumberDMA =
2056 SCSI_NewInquiryUnitSerialNumberDMA[Channel];
2057 DAC960_SCSI_Inquiry_UnitSerialNumber_T *NewInquiryUnitSerialNumber =
2058 SCSI_NewInquiryUnitSerialNumberCPU[Channel];
2059 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
2060 &Controller->V1.InquiryUnitSerialNumber[Channel][TargetID];
2061 DAC960_Command_T *Command = Controller->Commands[Channel];
2062 DAC960_V1_DCDB_T *DCDB = DCDBs_cpu[Channel];
2063 struct completion *Completion = &Completions[Channel];
2064
2065 wait_for_completion(Completion);
2066
2067 if (Command->V1.CommandStatus != DAC960_V1_NormalCompletion) {
2068 memset(InquiryStandardData, 0, sizeof(DAC960_SCSI_Inquiry_T));
2069 InquiryStandardData->PeripheralDeviceType = 0x1F;
2070 continue;
2071 } else
2072 memcpy(InquiryStandardData, NewInquiryStandardData, sizeof(DAC960_SCSI_Inquiry_T));
2073
2074 /* Preserve Channel and TargetID values from the previous loop */
2075 Command->Completion = Completion;
2076 DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
2077 DCDB->BusAddress = NewInquiryUnitSerialNumberDMA;
2078 DCDB->SenseLength = sizeof(DCDB->SenseData);
2079 DCDB->CDB[0] = 0x12; /* INQUIRY */
2080 DCDB->CDB[1] = 1; /* EVPD = 1 */
2081 DCDB->CDB[2] = 0x80; /* Page Code */
2082 DCDB->CDB[3] = 0; /* Reserved */
2083 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
2084 DCDB->CDB[5] = 0; /* Control */
2085
2086 spin_lock_irqsave(&Controller->queue_lock, flags);
2087 DAC960_QueueCommand(Command);
2088 spin_unlock_irqrestore(&Controller->queue_lock, flags);
2089 wait_for_completion(Completion);
2090
2091 if (Command->V1.CommandStatus != DAC960_V1_NormalCompletion) {
2092 memset(InquiryUnitSerialNumber, 0,
2093 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2094 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
2095 } else
2096 memcpy(InquiryUnitSerialNumber, NewInquiryUnitSerialNumber,
2097 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2098 }
2099 }
2100 free_dma_loaf(Controller->PCIDevice, &local_dma);
2101 return true;
2102 }
2103
2104
2105 /*
2106 DAC960_V2_ReadDeviceConfiguration reads the Device Configuration Information
2107 for DAC960 V2 Firmware Controllers by requesting the Physical Device
2108 Information and SCSI Inquiry Unit Serial Number information for each
2109 device connected to Controller.
2110 */
2111
DAC960_V2_ReadDeviceConfiguration(DAC960_Controller_T * Controller)2112 static bool DAC960_V2_ReadDeviceConfiguration(DAC960_Controller_T
2113 *Controller)
2114 {
2115 unsigned char Channel = 0, TargetID = 0, LogicalUnit = 0;
2116 unsigned short PhysicalDeviceIndex = 0;
2117
2118 while (true)
2119 {
2120 DAC960_V2_PhysicalDeviceInfo_T *NewPhysicalDeviceInfo =
2121 Controller->V2.NewPhysicalDeviceInformation;
2122 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo;
2123 DAC960_SCSI_Inquiry_UnitSerialNumber_T *NewInquiryUnitSerialNumber =
2124 Controller->V2.NewInquiryUnitSerialNumber;
2125 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber;
2126
2127 if (!DAC960_V2_NewPhysicalDeviceInfo(Controller, Channel, TargetID, LogicalUnit))
2128 break;
2129
2130 PhysicalDeviceInfo = kmalloc(sizeof(DAC960_V2_PhysicalDeviceInfo_T),
2131 GFP_ATOMIC);
2132 if (PhysicalDeviceInfo == NULL)
2133 return DAC960_Failure(Controller, "PHYSICAL DEVICE ALLOCATION");
2134 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex] =
2135 PhysicalDeviceInfo;
2136 memcpy(PhysicalDeviceInfo, NewPhysicalDeviceInfo,
2137 sizeof(DAC960_V2_PhysicalDeviceInfo_T));
2138
2139 InquiryUnitSerialNumber = kmalloc(
2140 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T), GFP_ATOMIC);
2141 if (InquiryUnitSerialNumber == NULL) {
2142 kfree(PhysicalDeviceInfo);
2143 return DAC960_Failure(Controller, "SERIAL NUMBER ALLOCATION");
2144 }
2145 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex] =
2146 InquiryUnitSerialNumber;
2147
2148 Channel = NewPhysicalDeviceInfo->Channel;
2149 TargetID = NewPhysicalDeviceInfo->TargetID;
2150 LogicalUnit = NewPhysicalDeviceInfo->LogicalUnit;
2151
2152 /*
2153 Some devices do NOT have Unit Serial Numbers.
2154 This command fails for them. But, we still want to
2155 remember those devices are there. Construct a
2156 UnitSerialNumber structure for the failure case.
2157 */
2158 if (!DAC960_V2_NewInquiryUnitSerialNumber(Controller, Channel, TargetID, LogicalUnit)) {
2159 memset(InquiryUnitSerialNumber, 0,
2160 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2161 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
2162 } else
2163 memcpy(InquiryUnitSerialNumber, NewInquiryUnitSerialNumber,
2164 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2165
2166 PhysicalDeviceIndex++;
2167 LogicalUnit++;
2168 }
2169 return true;
2170 }
2171
2172
2173 /*
2174 DAC960_SanitizeInquiryData sanitizes the Vendor, Model, Revision, and
2175 Product Serial Number fields of the Inquiry Standard Data and Inquiry
2176 Unit Serial Number structures.
2177 */
2178
DAC960_SanitizeInquiryData(DAC960_SCSI_Inquiry_T * InquiryStandardData,DAC960_SCSI_Inquiry_UnitSerialNumber_T * InquiryUnitSerialNumber,unsigned char * Vendor,unsigned char * Model,unsigned char * Revision,unsigned char * SerialNumber)2179 static void DAC960_SanitizeInquiryData(DAC960_SCSI_Inquiry_T
2180 *InquiryStandardData,
2181 DAC960_SCSI_Inquiry_UnitSerialNumber_T
2182 *InquiryUnitSerialNumber,
2183 unsigned char *Vendor,
2184 unsigned char *Model,
2185 unsigned char *Revision,
2186 unsigned char *SerialNumber)
2187 {
2188 int SerialNumberLength, i;
2189 if (InquiryStandardData->PeripheralDeviceType == 0x1F) return;
2190 for (i = 0; i < sizeof(InquiryStandardData->VendorIdentification); i++)
2191 {
2192 unsigned char VendorCharacter =
2193 InquiryStandardData->VendorIdentification[i];
2194 Vendor[i] = (VendorCharacter >= ' ' && VendorCharacter <= '~'
2195 ? VendorCharacter : ' ');
2196 }
2197 Vendor[sizeof(InquiryStandardData->VendorIdentification)] = '\0';
2198 for (i = 0; i < sizeof(InquiryStandardData->ProductIdentification); i++)
2199 {
2200 unsigned char ModelCharacter =
2201 InquiryStandardData->ProductIdentification[i];
2202 Model[i] = (ModelCharacter >= ' ' && ModelCharacter <= '~'
2203 ? ModelCharacter : ' ');
2204 }
2205 Model[sizeof(InquiryStandardData->ProductIdentification)] = '\0';
2206 for (i = 0; i < sizeof(InquiryStandardData->ProductRevisionLevel); i++)
2207 {
2208 unsigned char RevisionCharacter =
2209 InquiryStandardData->ProductRevisionLevel[i];
2210 Revision[i] = (RevisionCharacter >= ' ' && RevisionCharacter <= '~'
2211 ? RevisionCharacter : ' ');
2212 }
2213 Revision[sizeof(InquiryStandardData->ProductRevisionLevel)] = '\0';
2214 if (InquiryUnitSerialNumber->PeripheralDeviceType == 0x1F) return;
2215 SerialNumberLength = InquiryUnitSerialNumber->PageLength;
2216 if (SerialNumberLength >
2217 sizeof(InquiryUnitSerialNumber->ProductSerialNumber))
2218 SerialNumberLength = sizeof(InquiryUnitSerialNumber->ProductSerialNumber);
2219 for (i = 0; i < SerialNumberLength; i++)
2220 {
2221 unsigned char SerialNumberCharacter =
2222 InquiryUnitSerialNumber->ProductSerialNumber[i];
2223 SerialNumber[i] =
2224 (SerialNumberCharacter >= ' ' && SerialNumberCharacter <= '~'
2225 ? SerialNumberCharacter : ' ');
2226 }
2227 SerialNumber[SerialNumberLength] = '\0';
2228 }
2229
2230
2231 /*
2232 DAC960_V1_ReportDeviceConfiguration reports the Device Configuration
2233 Information for DAC960 V1 Firmware Controllers.
2234 */
2235
DAC960_V1_ReportDeviceConfiguration(DAC960_Controller_T * Controller)2236 static bool DAC960_V1_ReportDeviceConfiguration(DAC960_Controller_T
2237 *Controller)
2238 {
2239 int LogicalDriveNumber, Channel, TargetID;
2240 DAC960_Info(" Physical Devices:\n", Controller);
2241 for (Channel = 0; Channel < Controller->Channels; Channel++)
2242 for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
2243 {
2244 DAC960_SCSI_Inquiry_T *InquiryStandardData =
2245 &Controller->V1.InquiryStandardData[Channel][TargetID];
2246 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
2247 &Controller->V1.InquiryUnitSerialNumber[Channel][TargetID];
2248 DAC960_V1_DeviceState_T *DeviceState =
2249 &Controller->V1.DeviceState[Channel][TargetID];
2250 DAC960_V1_ErrorTableEntry_T *ErrorEntry =
2251 &Controller->V1.ErrorTable.ErrorTableEntries[Channel][TargetID];
2252 char Vendor[1+sizeof(InquiryStandardData->VendorIdentification)];
2253 char Model[1+sizeof(InquiryStandardData->ProductIdentification)];
2254 char Revision[1+sizeof(InquiryStandardData->ProductRevisionLevel)];
2255 char SerialNumber[1+sizeof(InquiryUnitSerialNumber
2256 ->ProductSerialNumber)];
2257 if (InquiryStandardData->PeripheralDeviceType == 0x1F) continue;
2258 DAC960_SanitizeInquiryData(InquiryStandardData, InquiryUnitSerialNumber,
2259 Vendor, Model, Revision, SerialNumber);
2260 DAC960_Info(" %d:%d%s Vendor: %s Model: %s Revision: %s\n",
2261 Controller, Channel, TargetID, (TargetID < 10 ? " " : ""),
2262 Vendor, Model, Revision);
2263 if (InquiryUnitSerialNumber->PeripheralDeviceType != 0x1F)
2264 DAC960_Info(" Serial Number: %s\n", Controller, SerialNumber);
2265 if (DeviceState->Present &&
2266 DeviceState->DeviceType == DAC960_V1_DiskType)
2267 {
2268 if (Controller->V1.DeviceResetCount[Channel][TargetID] > 0)
2269 DAC960_Info(" Disk Status: %s, %u blocks, %d resets\n",
2270 Controller,
2271 (DeviceState->DeviceState == DAC960_V1_Device_Dead
2272 ? "Dead"
2273 : DeviceState->DeviceState
2274 == DAC960_V1_Device_WriteOnly
2275 ? "Write-Only"
2276 : DeviceState->DeviceState
2277 == DAC960_V1_Device_Online
2278 ? "Online" : "Standby"),
2279 DeviceState->DiskSize,
2280 Controller->V1.DeviceResetCount[Channel][TargetID]);
2281 else
2282 DAC960_Info(" Disk Status: %s, %u blocks\n", Controller,
2283 (DeviceState->DeviceState == DAC960_V1_Device_Dead
2284 ? "Dead"
2285 : DeviceState->DeviceState
2286 == DAC960_V1_Device_WriteOnly
2287 ? "Write-Only"
2288 : DeviceState->DeviceState
2289 == DAC960_V1_Device_Online
2290 ? "Online" : "Standby"),
2291 DeviceState->DiskSize);
2292 }
2293 if (ErrorEntry->ParityErrorCount > 0 ||
2294 ErrorEntry->SoftErrorCount > 0 ||
2295 ErrorEntry->HardErrorCount > 0 ||
2296 ErrorEntry->MiscErrorCount > 0)
2297 DAC960_Info(" Errors - Parity: %d, Soft: %d, "
2298 "Hard: %d, Misc: %d\n", Controller,
2299 ErrorEntry->ParityErrorCount,
2300 ErrorEntry->SoftErrorCount,
2301 ErrorEntry->HardErrorCount,
2302 ErrorEntry->MiscErrorCount);
2303 }
2304 DAC960_Info(" Logical Drives:\n", Controller);
2305 for (LogicalDriveNumber = 0;
2306 LogicalDriveNumber < Controller->LogicalDriveCount;
2307 LogicalDriveNumber++)
2308 {
2309 DAC960_V1_LogicalDriveInformation_T *LogicalDriveInformation =
2310 &Controller->V1.LogicalDriveInformation[LogicalDriveNumber];
2311 DAC960_Info(" /dev/rd/c%dd%d: RAID-%d, %s, %u blocks, %s\n",
2312 Controller, Controller->ControllerNumber, LogicalDriveNumber,
2313 LogicalDriveInformation->RAIDLevel,
2314 (LogicalDriveInformation->LogicalDriveState
2315 == DAC960_V1_LogicalDrive_Online
2316 ? "Online"
2317 : LogicalDriveInformation->LogicalDriveState
2318 == DAC960_V1_LogicalDrive_Critical
2319 ? "Critical" : "Offline"),
2320 LogicalDriveInformation->LogicalDriveSize,
2321 (LogicalDriveInformation->WriteBack
2322 ? "Write Back" : "Write Thru"));
2323 }
2324 return true;
2325 }
2326
2327
2328 /*
2329 DAC960_V2_ReportDeviceConfiguration reports the Device Configuration
2330 Information for DAC960 V2 Firmware Controllers.
2331 */
2332
DAC960_V2_ReportDeviceConfiguration(DAC960_Controller_T * Controller)2333 static bool DAC960_V2_ReportDeviceConfiguration(DAC960_Controller_T
2334 *Controller)
2335 {
2336 int PhysicalDeviceIndex, LogicalDriveNumber;
2337 DAC960_Info(" Physical Devices:\n", Controller);
2338 for (PhysicalDeviceIndex = 0;
2339 PhysicalDeviceIndex < DAC960_V2_MaxPhysicalDevices;
2340 PhysicalDeviceIndex++)
2341 {
2342 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
2343 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
2344 DAC960_SCSI_Inquiry_T *InquiryStandardData =
2345 (DAC960_SCSI_Inquiry_T *) &PhysicalDeviceInfo->SCSI_InquiryData;
2346 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
2347 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
2348 char Vendor[1+sizeof(InquiryStandardData->VendorIdentification)];
2349 char Model[1+sizeof(InquiryStandardData->ProductIdentification)];
2350 char Revision[1+sizeof(InquiryStandardData->ProductRevisionLevel)];
2351 char SerialNumber[1+sizeof(InquiryUnitSerialNumber->ProductSerialNumber)];
2352 if (PhysicalDeviceInfo == NULL) break;
2353 DAC960_SanitizeInquiryData(InquiryStandardData, InquiryUnitSerialNumber,
2354 Vendor, Model, Revision, SerialNumber);
2355 DAC960_Info(" %d:%d%s Vendor: %s Model: %s Revision: %s\n",
2356 Controller,
2357 PhysicalDeviceInfo->Channel,
2358 PhysicalDeviceInfo->TargetID,
2359 (PhysicalDeviceInfo->TargetID < 10 ? " " : ""),
2360 Vendor, Model, Revision);
2361 if (PhysicalDeviceInfo->NegotiatedSynchronousMegaTransfers == 0)
2362 DAC960_Info(" %sAsynchronous\n", Controller,
2363 (PhysicalDeviceInfo->NegotiatedDataWidthBits == 16
2364 ? "Wide " :""));
2365 else
2366 DAC960_Info(" %sSynchronous at %d MB/sec\n", Controller,
2367 (PhysicalDeviceInfo->NegotiatedDataWidthBits == 16
2368 ? "Wide " :""),
2369 (PhysicalDeviceInfo->NegotiatedSynchronousMegaTransfers
2370 * PhysicalDeviceInfo->NegotiatedDataWidthBits/8));
2371 if (InquiryUnitSerialNumber->PeripheralDeviceType != 0x1F)
2372 DAC960_Info(" Serial Number: %s\n", Controller, SerialNumber);
2373 if (PhysicalDeviceInfo->PhysicalDeviceState ==
2374 DAC960_V2_Device_Unconfigured)
2375 continue;
2376 DAC960_Info(" Disk Status: %s, %u blocks\n", Controller,
2377 (PhysicalDeviceInfo->PhysicalDeviceState
2378 == DAC960_V2_Device_Online
2379 ? "Online"
2380 : PhysicalDeviceInfo->PhysicalDeviceState
2381 == DAC960_V2_Device_Rebuild
2382 ? "Rebuild"
2383 : PhysicalDeviceInfo->PhysicalDeviceState
2384 == DAC960_V2_Device_Missing
2385 ? "Missing"
2386 : PhysicalDeviceInfo->PhysicalDeviceState
2387 == DAC960_V2_Device_Critical
2388 ? "Critical"
2389 : PhysicalDeviceInfo->PhysicalDeviceState
2390 == DAC960_V2_Device_Dead
2391 ? "Dead"
2392 : PhysicalDeviceInfo->PhysicalDeviceState
2393 == DAC960_V2_Device_SuspectedDead
2394 ? "Suspected-Dead"
2395 : PhysicalDeviceInfo->PhysicalDeviceState
2396 == DAC960_V2_Device_CommandedOffline
2397 ? "Commanded-Offline"
2398 : PhysicalDeviceInfo->PhysicalDeviceState
2399 == DAC960_V2_Device_Standby
2400 ? "Standby" : "Unknown"),
2401 PhysicalDeviceInfo->ConfigurableDeviceSize);
2402 if (PhysicalDeviceInfo->ParityErrors == 0 &&
2403 PhysicalDeviceInfo->SoftErrors == 0 &&
2404 PhysicalDeviceInfo->HardErrors == 0 &&
2405 PhysicalDeviceInfo->MiscellaneousErrors == 0 &&
2406 PhysicalDeviceInfo->CommandTimeouts == 0 &&
2407 PhysicalDeviceInfo->Retries == 0 &&
2408 PhysicalDeviceInfo->Aborts == 0 &&
2409 PhysicalDeviceInfo->PredictedFailuresDetected == 0)
2410 continue;
2411 DAC960_Info(" Errors - Parity: %d, Soft: %d, "
2412 "Hard: %d, Misc: %d\n", Controller,
2413 PhysicalDeviceInfo->ParityErrors,
2414 PhysicalDeviceInfo->SoftErrors,
2415 PhysicalDeviceInfo->HardErrors,
2416 PhysicalDeviceInfo->MiscellaneousErrors);
2417 DAC960_Info(" Timeouts: %d, Retries: %d, "
2418 "Aborts: %d, Predicted: %d\n", Controller,
2419 PhysicalDeviceInfo->CommandTimeouts,
2420 PhysicalDeviceInfo->Retries,
2421 PhysicalDeviceInfo->Aborts,
2422 PhysicalDeviceInfo->PredictedFailuresDetected);
2423 }
2424 DAC960_Info(" Logical Drives:\n", Controller);
2425 for (LogicalDriveNumber = 0;
2426 LogicalDriveNumber < DAC960_MaxLogicalDrives;
2427 LogicalDriveNumber++)
2428 {
2429 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
2430 Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
2431 static const unsigned char *ReadCacheStatus[] = {
2432 "Read Cache Disabled",
2433 "Read Cache Enabled",
2434 "Read Ahead Enabled",
2435 "Intelligent Read Ahead Enabled",
2436 "-", "-", "-", "-"
2437 };
2438 static const unsigned char *WriteCacheStatus[] = {
2439 "Write Cache Disabled",
2440 "Logical Device Read Only",
2441 "Write Cache Enabled",
2442 "Intelligent Write Cache Enabled",
2443 "-", "-", "-", "-"
2444 };
2445 unsigned char *GeometryTranslation;
2446 if (LogicalDeviceInfo == NULL) continue;
2447 switch (LogicalDeviceInfo->DriveGeometry)
2448 {
2449 case DAC960_V2_Geometry_128_32:
2450 GeometryTranslation = "128/32";
2451 break;
2452 case DAC960_V2_Geometry_255_63:
2453 GeometryTranslation = "255/63";
2454 break;
2455 default:
2456 GeometryTranslation = "Invalid";
2457 DAC960_Error("Illegal Logical Device Geometry %d\n",
2458 Controller, LogicalDeviceInfo->DriveGeometry);
2459 break;
2460 }
2461 DAC960_Info(" /dev/rd/c%dd%d: RAID-%d, %s, %u blocks\n",
2462 Controller, Controller->ControllerNumber, LogicalDriveNumber,
2463 LogicalDeviceInfo->RAIDLevel,
2464 (LogicalDeviceInfo->LogicalDeviceState
2465 == DAC960_V2_LogicalDevice_Online
2466 ? "Online"
2467 : LogicalDeviceInfo->LogicalDeviceState
2468 == DAC960_V2_LogicalDevice_Critical
2469 ? "Critical" : "Offline"),
2470 LogicalDeviceInfo->ConfigurableDeviceSize);
2471 DAC960_Info(" Logical Device %s, BIOS Geometry: %s\n",
2472 Controller,
2473 (LogicalDeviceInfo->LogicalDeviceControl
2474 .LogicalDeviceInitialized
2475 ? "Initialized" : "Uninitialized"),
2476 GeometryTranslation);
2477 if (LogicalDeviceInfo->StripeSize == 0)
2478 {
2479 if (LogicalDeviceInfo->CacheLineSize == 0)
2480 DAC960_Info(" Stripe Size: N/A, "
2481 "Segment Size: N/A\n", Controller);
2482 else
2483 DAC960_Info(" Stripe Size: N/A, "
2484 "Segment Size: %dKB\n", Controller,
2485 1 << (LogicalDeviceInfo->CacheLineSize - 2));
2486 }
2487 else
2488 {
2489 if (LogicalDeviceInfo->CacheLineSize == 0)
2490 DAC960_Info(" Stripe Size: %dKB, "
2491 "Segment Size: N/A\n", Controller,
2492 1 << (LogicalDeviceInfo->StripeSize - 2));
2493 else
2494 DAC960_Info(" Stripe Size: %dKB, "
2495 "Segment Size: %dKB\n", Controller,
2496 1 << (LogicalDeviceInfo->StripeSize - 2),
2497 1 << (LogicalDeviceInfo->CacheLineSize - 2));
2498 }
2499 DAC960_Info(" %s, %s\n", Controller,
2500 ReadCacheStatus[
2501 LogicalDeviceInfo->LogicalDeviceControl.ReadCache],
2502 WriteCacheStatus[
2503 LogicalDeviceInfo->LogicalDeviceControl.WriteCache]);
2504 if (LogicalDeviceInfo->SoftErrors > 0 ||
2505 LogicalDeviceInfo->CommandsFailed > 0 ||
2506 LogicalDeviceInfo->DeferredWriteErrors)
2507 DAC960_Info(" Errors - Soft: %d, Failed: %d, "
2508 "Deferred Write: %d\n", Controller,
2509 LogicalDeviceInfo->SoftErrors,
2510 LogicalDeviceInfo->CommandsFailed,
2511 LogicalDeviceInfo->DeferredWriteErrors);
2512
2513 }
2514 return true;
2515 }
2516
2517 /*
2518 DAC960_RegisterBlockDevice registers the Block Device structures
2519 associated with Controller.
2520 */
2521
DAC960_RegisterBlockDevice(DAC960_Controller_T * Controller)2522 static bool DAC960_RegisterBlockDevice(DAC960_Controller_T *Controller)
2523 {
2524 int MajorNumber = DAC960_MAJOR + Controller->ControllerNumber;
2525 int n;
2526
2527 /*
2528 Register the Block Device Major Number for this DAC960 Controller.
2529 */
2530 if (register_blkdev(MajorNumber, "dac960") < 0)
2531 return false;
2532
2533 for (n = 0; n < DAC960_MaxLogicalDrives; n++) {
2534 struct gendisk *disk = Controller->disks[n];
2535 struct request_queue *RequestQueue;
2536
2537 /* for now, let all request queues share controller's lock */
2538 RequestQueue = blk_init_queue(DAC960_RequestFunction,&Controller->queue_lock);
2539 if (!RequestQueue) {
2540 printk("DAC960: failure to allocate request queue\n");
2541 continue;
2542 }
2543 Controller->RequestQueue[n] = RequestQueue;
2544 RequestQueue->queuedata = Controller;
2545 blk_queue_max_segments(RequestQueue, Controller->DriverScatterGatherLimit);
2546 blk_queue_max_hw_sectors(RequestQueue, Controller->MaxBlocksPerCommand);
2547 disk->queue = RequestQueue;
2548 sprintf(disk->disk_name, "rd/c%dd%d", Controller->ControllerNumber, n);
2549 disk->major = MajorNumber;
2550 disk->first_minor = n << DAC960_MaxPartitionsBits;
2551 disk->fops = &DAC960_BlockDeviceOperations;
2552 }
2553 /*
2554 Indicate the Block Device Registration completed successfully,
2555 */
2556 return true;
2557 }
2558
2559
2560 /*
2561 DAC960_UnregisterBlockDevice unregisters the Block Device structures
2562 associated with Controller.
2563 */
2564
DAC960_UnregisterBlockDevice(DAC960_Controller_T * Controller)2565 static void DAC960_UnregisterBlockDevice(DAC960_Controller_T *Controller)
2566 {
2567 int MajorNumber = DAC960_MAJOR + Controller->ControllerNumber;
2568 int disk;
2569
2570 /* does order matter when deleting gendisk and cleanup in request queue? */
2571 for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++) {
2572 del_gendisk(Controller->disks[disk]);
2573 blk_cleanup_queue(Controller->RequestQueue[disk]);
2574 Controller->RequestQueue[disk] = NULL;
2575 }
2576
2577 /*
2578 Unregister the Block Device Major Number for this DAC960 Controller.
2579 */
2580 unregister_blkdev(MajorNumber, "dac960");
2581 }
2582
2583 /*
2584 DAC960_ComputeGenericDiskInfo computes the values for the Generic Disk
2585 Information Partition Sector Counts and Block Sizes.
2586 */
2587
DAC960_ComputeGenericDiskInfo(DAC960_Controller_T * Controller)2588 static void DAC960_ComputeGenericDiskInfo(DAC960_Controller_T *Controller)
2589 {
2590 int disk;
2591 for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++)
2592 set_capacity(Controller->disks[disk], disk_size(Controller, disk));
2593 }
2594
2595 /*
2596 DAC960_ReportErrorStatus reports Controller BIOS Messages passed through
2597 the Error Status Register when the driver performs the BIOS handshaking.
2598 It returns true for fatal errors and false otherwise.
2599 */
2600
DAC960_ReportErrorStatus(DAC960_Controller_T * Controller,unsigned char ErrorStatus,unsigned char Parameter0,unsigned char Parameter1)2601 static bool DAC960_ReportErrorStatus(DAC960_Controller_T *Controller,
2602 unsigned char ErrorStatus,
2603 unsigned char Parameter0,
2604 unsigned char Parameter1)
2605 {
2606 switch (ErrorStatus)
2607 {
2608 case 0x00:
2609 DAC960_Notice("Physical Device %d:%d Not Responding\n",
2610 Controller, Parameter1, Parameter0);
2611 break;
2612 case 0x08:
2613 if (Controller->DriveSpinUpMessageDisplayed) break;
2614 DAC960_Notice("Spinning Up Drives\n", Controller);
2615 Controller->DriveSpinUpMessageDisplayed = true;
2616 break;
2617 case 0x30:
2618 DAC960_Notice("Configuration Checksum Error\n", Controller);
2619 break;
2620 case 0x60:
2621 DAC960_Notice("Mirror Race Recovery Failed\n", Controller);
2622 break;
2623 case 0x70:
2624 DAC960_Notice("Mirror Race Recovery In Progress\n", Controller);
2625 break;
2626 case 0x90:
2627 DAC960_Notice("Physical Device %d:%d COD Mismatch\n",
2628 Controller, Parameter1, Parameter0);
2629 break;
2630 case 0xA0:
2631 DAC960_Notice("Logical Drive Installation Aborted\n", Controller);
2632 break;
2633 case 0xB0:
2634 DAC960_Notice("Mirror Race On A Critical Logical Drive\n", Controller);
2635 break;
2636 case 0xD0:
2637 DAC960_Notice("New Controller Configuration Found\n", Controller);
2638 break;
2639 case 0xF0:
2640 DAC960_Error("Fatal Memory Parity Error for Controller at\n", Controller);
2641 return true;
2642 default:
2643 DAC960_Error("Unknown Initialization Error %02X for Controller at\n",
2644 Controller, ErrorStatus);
2645 return true;
2646 }
2647 return false;
2648 }
2649
2650
2651 /*
2652 * DAC960_DetectCleanup releases the resources that were allocated
2653 * during DAC960_DetectController(). DAC960_DetectController can
2654 * has several internal failure points, so not ALL resources may
2655 * have been allocated. It's important to free only
2656 * resources that HAVE been allocated. The code below always
2657 * tests that the resource has been allocated before attempting to
2658 * free it.
2659 */
DAC960_DetectCleanup(DAC960_Controller_T * Controller)2660 static void DAC960_DetectCleanup(DAC960_Controller_T *Controller)
2661 {
2662 int i;
2663
2664 /* Free the memory mailbox, status, and related structures */
2665 free_dma_loaf(Controller->PCIDevice, &Controller->DmaPages);
2666 if (Controller->MemoryMappedAddress) {
2667 switch(Controller->HardwareType)
2668 {
2669 case DAC960_GEM_Controller:
2670 DAC960_GEM_DisableInterrupts(Controller->BaseAddress);
2671 break;
2672 case DAC960_BA_Controller:
2673 DAC960_BA_DisableInterrupts(Controller->BaseAddress);
2674 break;
2675 case DAC960_LP_Controller:
2676 DAC960_LP_DisableInterrupts(Controller->BaseAddress);
2677 break;
2678 case DAC960_LA_Controller:
2679 DAC960_LA_DisableInterrupts(Controller->BaseAddress);
2680 break;
2681 case DAC960_PG_Controller:
2682 DAC960_PG_DisableInterrupts(Controller->BaseAddress);
2683 break;
2684 case DAC960_PD_Controller:
2685 DAC960_PD_DisableInterrupts(Controller->BaseAddress);
2686 break;
2687 case DAC960_P_Controller:
2688 DAC960_PD_DisableInterrupts(Controller->BaseAddress);
2689 break;
2690 }
2691 iounmap(Controller->MemoryMappedAddress);
2692 }
2693 if (Controller->IRQ_Channel)
2694 free_irq(Controller->IRQ_Channel, Controller);
2695 if (Controller->IO_Address)
2696 release_region(Controller->IO_Address, 0x80);
2697 pci_disable_device(Controller->PCIDevice);
2698 for (i = 0; (i < DAC960_MaxLogicalDrives) && Controller->disks[i]; i++)
2699 put_disk(Controller->disks[i]);
2700 DAC960_Controllers[Controller->ControllerNumber] = NULL;
2701 kfree(Controller);
2702 }
2703
2704
2705 /*
2706 DAC960_DetectController detects Mylex DAC960/AcceleRAID/eXtremeRAID
2707 PCI RAID Controllers by interrogating the PCI Configuration Space for
2708 Controller Type.
2709 */
2710
2711 static DAC960_Controller_T *
DAC960_DetectController(struct pci_dev * PCI_Device,const struct pci_device_id * entry)2712 DAC960_DetectController(struct pci_dev *PCI_Device,
2713 const struct pci_device_id *entry)
2714 {
2715 struct DAC960_privdata *privdata =
2716 (struct DAC960_privdata *)entry->driver_data;
2717 irq_handler_t InterruptHandler = privdata->InterruptHandler;
2718 unsigned int MemoryWindowSize = privdata->MemoryWindowSize;
2719 DAC960_Controller_T *Controller = NULL;
2720 unsigned char DeviceFunction = PCI_Device->devfn;
2721 unsigned char ErrorStatus, Parameter0, Parameter1;
2722 unsigned int IRQ_Channel;
2723 void __iomem *BaseAddress;
2724 int i;
2725
2726 Controller = kzalloc(sizeof(DAC960_Controller_T), GFP_ATOMIC);
2727 if (Controller == NULL) {
2728 DAC960_Error("Unable to allocate Controller structure for "
2729 "Controller at\n", NULL);
2730 return NULL;
2731 }
2732 Controller->ControllerNumber = DAC960_ControllerCount;
2733 DAC960_Controllers[DAC960_ControllerCount++] = Controller;
2734 Controller->Bus = PCI_Device->bus->number;
2735 Controller->FirmwareType = privdata->FirmwareType;
2736 Controller->HardwareType = privdata->HardwareType;
2737 Controller->Device = DeviceFunction >> 3;
2738 Controller->Function = DeviceFunction & 0x7;
2739 Controller->PCIDevice = PCI_Device;
2740 strcpy(Controller->FullModelName, "DAC960");
2741
2742 if (pci_enable_device(PCI_Device))
2743 goto Failure;
2744
2745 switch (Controller->HardwareType)
2746 {
2747 case DAC960_GEM_Controller:
2748 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2749 break;
2750 case DAC960_BA_Controller:
2751 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2752 break;
2753 case DAC960_LP_Controller:
2754 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2755 break;
2756 case DAC960_LA_Controller:
2757 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2758 break;
2759 case DAC960_PG_Controller:
2760 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2761 break;
2762 case DAC960_PD_Controller:
2763 Controller->IO_Address = pci_resource_start(PCI_Device, 0);
2764 Controller->PCI_Address = pci_resource_start(PCI_Device, 1);
2765 break;
2766 case DAC960_P_Controller:
2767 Controller->IO_Address = pci_resource_start(PCI_Device, 0);
2768 Controller->PCI_Address = pci_resource_start(PCI_Device, 1);
2769 break;
2770 }
2771
2772 pci_set_drvdata(PCI_Device, (void *)((long)Controller->ControllerNumber));
2773 for (i = 0; i < DAC960_MaxLogicalDrives; i++) {
2774 Controller->disks[i] = alloc_disk(1<<DAC960_MaxPartitionsBits);
2775 if (!Controller->disks[i])
2776 goto Failure;
2777 Controller->disks[i]->private_data = (void *)((long)i);
2778 }
2779 init_waitqueue_head(&Controller->CommandWaitQueue);
2780 init_waitqueue_head(&Controller->HealthStatusWaitQueue);
2781 spin_lock_init(&Controller->queue_lock);
2782 DAC960_AnnounceDriver(Controller);
2783 /*
2784 Map the Controller Register Window.
2785 */
2786 if (MemoryWindowSize < PAGE_SIZE)
2787 MemoryWindowSize = PAGE_SIZE;
2788 Controller->MemoryMappedAddress =
2789 ioremap_nocache(Controller->PCI_Address & PAGE_MASK, MemoryWindowSize);
2790 Controller->BaseAddress =
2791 Controller->MemoryMappedAddress + (Controller->PCI_Address & ~PAGE_MASK);
2792 if (Controller->MemoryMappedAddress == NULL)
2793 {
2794 DAC960_Error("Unable to map Controller Register Window for "
2795 "Controller at\n", Controller);
2796 goto Failure;
2797 }
2798 BaseAddress = Controller->BaseAddress;
2799 switch (Controller->HardwareType)
2800 {
2801 case DAC960_GEM_Controller:
2802 DAC960_GEM_DisableInterrupts(BaseAddress);
2803 DAC960_GEM_AcknowledgeHardwareMailboxStatus(BaseAddress);
2804 udelay(1000);
2805 while (DAC960_GEM_InitializationInProgressP(BaseAddress))
2806 {
2807 if (DAC960_GEM_ReadErrorStatus(BaseAddress, &ErrorStatus,
2808 &Parameter0, &Parameter1) &&
2809 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2810 Parameter0, Parameter1))
2811 goto Failure;
2812 udelay(10);
2813 }
2814 if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2815 {
2816 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2817 "for Controller at\n", Controller);
2818 goto Failure;
2819 }
2820 DAC960_GEM_EnableInterrupts(BaseAddress);
2821 Controller->QueueCommand = DAC960_GEM_QueueCommand;
2822 Controller->ReadControllerConfiguration =
2823 DAC960_V2_ReadControllerConfiguration;
2824 Controller->ReadDeviceConfiguration =
2825 DAC960_V2_ReadDeviceConfiguration;
2826 Controller->ReportDeviceConfiguration =
2827 DAC960_V2_ReportDeviceConfiguration;
2828 Controller->QueueReadWriteCommand =
2829 DAC960_V2_QueueReadWriteCommand;
2830 break;
2831 case DAC960_BA_Controller:
2832 DAC960_BA_DisableInterrupts(BaseAddress);
2833 DAC960_BA_AcknowledgeHardwareMailboxStatus(BaseAddress);
2834 udelay(1000);
2835 while (DAC960_BA_InitializationInProgressP(BaseAddress))
2836 {
2837 if (DAC960_BA_ReadErrorStatus(BaseAddress, &ErrorStatus,
2838 &Parameter0, &Parameter1) &&
2839 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2840 Parameter0, Parameter1))
2841 goto Failure;
2842 udelay(10);
2843 }
2844 if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2845 {
2846 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2847 "for Controller at\n", Controller);
2848 goto Failure;
2849 }
2850 DAC960_BA_EnableInterrupts(BaseAddress);
2851 Controller->QueueCommand = DAC960_BA_QueueCommand;
2852 Controller->ReadControllerConfiguration =
2853 DAC960_V2_ReadControllerConfiguration;
2854 Controller->ReadDeviceConfiguration =
2855 DAC960_V2_ReadDeviceConfiguration;
2856 Controller->ReportDeviceConfiguration =
2857 DAC960_V2_ReportDeviceConfiguration;
2858 Controller->QueueReadWriteCommand =
2859 DAC960_V2_QueueReadWriteCommand;
2860 break;
2861 case DAC960_LP_Controller:
2862 DAC960_LP_DisableInterrupts(BaseAddress);
2863 DAC960_LP_AcknowledgeHardwareMailboxStatus(BaseAddress);
2864 udelay(1000);
2865 while (DAC960_LP_InitializationInProgressP(BaseAddress))
2866 {
2867 if (DAC960_LP_ReadErrorStatus(BaseAddress, &ErrorStatus,
2868 &Parameter0, &Parameter1) &&
2869 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2870 Parameter0, Parameter1))
2871 goto Failure;
2872 udelay(10);
2873 }
2874 if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2875 {
2876 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2877 "for Controller at\n", Controller);
2878 goto Failure;
2879 }
2880 DAC960_LP_EnableInterrupts(BaseAddress);
2881 Controller->QueueCommand = DAC960_LP_QueueCommand;
2882 Controller->ReadControllerConfiguration =
2883 DAC960_V2_ReadControllerConfiguration;
2884 Controller->ReadDeviceConfiguration =
2885 DAC960_V2_ReadDeviceConfiguration;
2886 Controller->ReportDeviceConfiguration =
2887 DAC960_V2_ReportDeviceConfiguration;
2888 Controller->QueueReadWriteCommand =
2889 DAC960_V2_QueueReadWriteCommand;
2890 break;
2891 case DAC960_LA_Controller:
2892 DAC960_LA_DisableInterrupts(BaseAddress);
2893 DAC960_LA_AcknowledgeHardwareMailboxStatus(BaseAddress);
2894 udelay(1000);
2895 while (DAC960_LA_InitializationInProgressP(BaseAddress))
2896 {
2897 if (DAC960_LA_ReadErrorStatus(BaseAddress, &ErrorStatus,
2898 &Parameter0, &Parameter1) &&
2899 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2900 Parameter0, Parameter1))
2901 goto Failure;
2902 udelay(10);
2903 }
2904 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2905 {
2906 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2907 "for Controller at\n", Controller);
2908 goto Failure;
2909 }
2910 DAC960_LA_EnableInterrupts(BaseAddress);
2911 if (Controller->V1.DualModeMemoryMailboxInterface)
2912 Controller->QueueCommand = DAC960_LA_QueueCommandDualMode;
2913 else Controller->QueueCommand = DAC960_LA_QueueCommandSingleMode;
2914 Controller->ReadControllerConfiguration =
2915 DAC960_V1_ReadControllerConfiguration;
2916 Controller->ReadDeviceConfiguration =
2917 DAC960_V1_ReadDeviceConfiguration;
2918 Controller->ReportDeviceConfiguration =
2919 DAC960_V1_ReportDeviceConfiguration;
2920 Controller->QueueReadWriteCommand =
2921 DAC960_V1_QueueReadWriteCommand;
2922 break;
2923 case DAC960_PG_Controller:
2924 DAC960_PG_DisableInterrupts(BaseAddress);
2925 DAC960_PG_AcknowledgeHardwareMailboxStatus(BaseAddress);
2926 udelay(1000);
2927 while (DAC960_PG_InitializationInProgressP(BaseAddress))
2928 {
2929 if (DAC960_PG_ReadErrorStatus(BaseAddress, &ErrorStatus,
2930 &Parameter0, &Parameter1) &&
2931 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2932 Parameter0, Parameter1))
2933 goto Failure;
2934 udelay(10);
2935 }
2936 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2937 {
2938 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2939 "for Controller at\n", Controller);
2940 goto Failure;
2941 }
2942 DAC960_PG_EnableInterrupts(BaseAddress);
2943 if (Controller->V1.DualModeMemoryMailboxInterface)
2944 Controller->QueueCommand = DAC960_PG_QueueCommandDualMode;
2945 else Controller->QueueCommand = DAC960_PG_QueueCommandSingleMode;
2946 Controller->ReadControllerConfiguration =
2947 DAC960_V1_ReadControllerConfiguration;
2948 Controller->ReadDeviceConfiguration =
2949 DAC960_V1_ReadDeviceConfiguration;
2950 Controller->ReportDeviceConfiguration =
2951 DAC960_V1_ReportDeviceConfiguration;
2952 Controller->QueueReadWriteCommand =
2953 DAC960_V1_QueueReadWriteCommand;
2954 break;
2955 case DAC960_PD_Controller:
2956 if (!request_region(Controller->IO_Address, 0x80,
2957 Controller->FullModelName)) {
2958 DAC960_Error("IO port 0x%lx busy for Controller at\n",
2959 Controller, Controller->IO_Address);
2960 goto Failure;
2961 }
2962 DAC960_PD_DisableInterrupts(BaseAddress);
2963 DAC960_PD_AcknowledgeStatus(BaseAddress);
2964 udelay(1000);
2965 while (DAC960_PD_InitializationInProgressP(BaseAddress))
2966 {
2967 if (DAC960_PD_ReadErrorStatus(BaseAddress, &ErrorStatus,
2968 &Parameter0, &Parameter1) &&
2969 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2970 Parameter0, Parameter1))
2971 goto Failure;
2972 udelay(10);
2973 }
2974 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2975 {
2976 DAC960_Error("Unable to allocate DMA mapped memory "
2977 "for Controller at\n", Controller);
2978 goto Failure;
2979 }
2980 DAC960_PD_EnableInterrupts(BaseAddress);
2981 Controller->QueueCommand = DAC960_PD_QueueCommand;
2982 Controller->ReadControllerConfiguration =
2983 DAC960_V1_ReadControllerConfiguration;
2984 Controller->ReadDeviceConfiguration =
2985 DAC960_V1_ReadDeviceConfiguration;
2986 Controller->ReportDeviceConfiguration =
2987 DAC960_V1_ReportDeviceConfiguration;
2988 Controller->QueueReadWriteCommand =
2989 DAC960_V1_QueueReadWriteCommand;
2990 break;
2991 case DAC960_P_Controller:
2992 if (!request_region(Controller->IO_Address, 0x80,
2993 Controller->FullModelName)){
2994 DAC960_Error("IO port 0x%lx busy for Controller at\n",
2995 Controller, Controller->IO_Address);
2996 goto Failure;
2997 }
2998 DAC960_PD_DisableInterrupts(BaseAddress);
2999 DAC960_PD_AcknowledgeStatus(BaseAddress);
3000 udelay(1000);
3001 while (DAC960_PD_InitializationInProgressP(BaseAddress))
3002 {
3003 if (DAC960_PD_ReadErrorStatus(BaseAddress, &ErrorStatus,
3004 &Parameter0, &Parameter1) &&
3005 DAC960_ReportErrorStatus(Controller, ErrorStatus,
3006 Parameter0, Parameter1))
3007 goto Failure;
3008 udelay(10);
3009 }
3010 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
3011 {
3012 DAC960_Error("Unable to allocate DMA mapped memory"
3013 "for Controller at\n", Controller);
3014 goto Failure;
3015 }
3016 DAC960_PD_EnableInterrupts(BaseAddress);
3017 Controller->QueueCommand = DAC960_P_QueueCommand;
3018 Controller->ReadControllerConfiguration =
3019 DAC960_V1_ReadControllerConfiguration;
3020 Controller->ReadDeviceConfiguration =
3021 DAC960_V1_ReadDeviceConfiguration;
3022 Controller->ReportDeviceConfiguration =
3023 DAC960_V1_ReportDeviceConfiguration;
3024 Controller->QueueReadWriteCommand =
3025 DAC960_V1_QueueReadWriteCommand;
3026 break;
3027 }
3028 /*
3029 Acquire shared access to the IRQ Channel.
3030 */
3031 IRQ_Channel = PCI_Device->irq;
3032 if (request_irq(IRQ_Channel, InterruptHandler, IRQF_SHARED,
3033 Controller->FullModelName, Controller) < 0)
3034 {
3035 DAC960_Error("Unable to acquire IRQ Channel %d for Controller at\n",
3036 Controller, Controller->IRQ_Channel);
3037 goto Failure;
3038 }
3039 Controller->IRQ_Channel = IRQ_Channel;
3040 Controller->InitialCommand.CommandIdentifier = 1;
3041 Controller->InitialCommand.Controller = Controller;
3042 Controller->Commands[0] = &Controller->InitialCommand;
3043 Controller->FreeCommands = &Controller->InitialCommand;
3044 return Controller;
3045
3046 Failure:
3047 if (Controller->IO_Address == 0)
3048 DAC960_Error("PCI Bus %d Device %d Function %d I/O Address N/A "
3049 "PCI Address 0x%X\n", Controller,
3050 Controller->Bus, Controller->Device,
3051 Controller->Function, Controller->PCI_Address);
3052 else
3053 DAC960_Error("PCI Bus %d Device %d Function %d I/O Address "
3054 "0x%X PCI Address 0x%X\n", Controller,
3055 Controller->Bus, Controller->Device,
3056 Controller->Function, Controller->IO_Address,
3057 Controller->PCI_Address);
3058 DAC960_DetectCleanup(Controller);
3059 DAC960_ControllerCount--;
3060 return NULL;
3061 }
3062
3063 /*
3064 DAC960_InitializeController initializes Controller.
3065 */
3066
3067 static bool
DAC960_InitializeController(DAC960_Controller_T * Controller)3068 DAC960_InitializeController(DAC960_Controller_T *Controller)
3069 {
3070 if (DAC960_ReadControllerConfiguration(Controller) &&
3071 DAC960_ReportControllerConfiguration(Controller) &&
3072 DAC960_CreateAuxiliaryStructures(Controller) &&
3073 DAC960_ReadDeviceConfiguration(Controller) &&
3074 DAC960_ReportDeviceConfiguration(Controller) &&
3075 DAC960_RegisterBlockDevice(Controller))
3076 {
3077 /*
3078 Initialize the Monitoring Timer.
3079 */
3080 timer_setup(&Controller->MonitoringTimer,
3081 DAC960_MonitoringTimerFunction, 0);
3082 Controller->MonitoringTimer.expires =
3083 jiffies + DAC960_MonitoringTimerInterval;
3084 add_timer(&Controller->MonitoringTimer);
3085 Controller->ControllerInitialized = true;
3086 return true;
3087 }
3088 return false;
3089 }
3090
3091
3092 /*
3093 DAC960_FinalizeController finalizes Controller.
3094 */
3095
DAC960_FinalizeController(DAC960_Controller_T * Controller)3096 static void DAC960_FinalizeController(DAC960_Controller_T *Controller)
3097 {
3098 if (Controller->ControllerInitialized)
3099 {
3100 unsigned long flags;
3101
3102 /*
3103 * Acquiring and releasing lock here eliminates
3104 * a very low probability race.
3105 *
3106 * The code below allocates controller command structures
3107 * from the free list without holding the controller lock.
3108 * This is safe assuming there is no other activity on
3109 * the controller at the time.
3110 *
3111 * But, there might be a monitoring command still
3112 * in progress. Setting the Shutdown flag while holding
3113 * the lock ensures that there is no monitoring command
3114 * in the interrupt handler currently, and any monitoring
3115 * commands that complete from this time on will NOT return
3116 * their command structure to the free list.
3117 */
3118
3119 spin_lock_irqsave(&Controller->queue_lock, flags);
3120 Controller->ShutdownMonitoringTimer = 1;
3121 spin_unlock_irqrestore(&Controller->queue_lock, flags);
3122
3123 del_timer_sync(&Controller->MonitoringTimer);
3124 if (Controller->FirmwareType == DAC960_V1_Controller)
3125 {
3126 DAC960_Notice("Flushing Cache...", Controller);
3127 DAC960_V1_ExecuteType3(Controller, DAC960_V1_Flush, 0);
3128 DAC960_Notice("done\n", Controller);
3129
3130 if (Controller->HardwareType == DAC960_PD_Controller)
3131 release_region(Controller->IO_Address, 0x80);
3132 }
3133 else
3134 {
3135 DAC960_Notice("Flushing Cache...", Controller);
3136 DAC960_V2_DeviceOperation(Controller, DAC960_V2_PauseDevice,
3137 DAC960_V2_RAID_Controller);
3138 DAC960_Notice("done\n", Controller);
3139 }
3140 }
3141 DAC960_UnregisterBlockDevice(Controller);
3142 DAC960_DestroyAuxiliaryStructures(Controller);
3143 DAC960_DestroyProcEntries(Controller);
3144 DAC960_DetectCleanup(Controller);
3145 }
3146
3147
3148 /*
3149 DAC960_Probe verifies controller's existence and
3150 initializes the DAC960 Driver for that controller.
3151 */
3152
3153 static int
DAC960_Probe(struct pci_dev * dev,const struct pci_device_id * entry)3154 DAC960_Probe(struct pci_dev *dev, const struct pci_device_id *entry)
3155 {
3156 int disk;
3157 DAC960_Controller_T *Controller;
3158
3159 if (DAC960_ControllerCount == DAC960_MaxControllers)
3160 {
3161 DAC960_Error("More than %d DAC960 Controllers detected - "
3162 "ignoring from Controller at\n",
3163 NULL, DAC960_MaxControllers);
3164 return -ENODEV;
3165 }
3166
3167 Controller = DAC960_DetectController(dev, entry);
3168 if (!Controller)
3169 return -ENODEV;
3170
3171 if (!DAC960_InitializeController(Controller)) {
3172 DAC960_FinalizeController(Controller);
3173 return -ENODEV;
3174 }
3175
3176 for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++) {
3177 set_capacity(Controller->disks[disk], disk_size(Controller, disk));
3178 add_disk(Controller->disks[disk]);
3179 }
3180 DAC960_CreateProcEntries(Controller);
3181 return 0;
3182 }
3183
3184
3185 /*
3186 DAC960_Finalize finalizes the DAC960 Driver.
3187 */
3188
DAC960_Remove(struct pci_dev * PCI_Device)3189 static void DAC960_Remove(struct pci_dev *PCI_Device)
3190 {
3191 int Controller_Number = (long)pci_get_drvdata(PCI_Device);
3192 DAC960_Controller_T *Controller = DAC960_Controllers[Controller_Number];
3193 if (Controller != NULL)
3194 DAC960_FinalizeController(Controller);
3195 }
3196
3197
3198 /*
3199 DAC960_V1_QueueReadWriteCommand prepares and queues a Read/Write Command for
3200 DAC960 V1 Firmware Controllers.
3201 */
3202
DAC960_V1_QueueReadWriteCommand(DAC960_Command_T * Command)3203 static void DAC960_V1_QueueReadWriteCommand(DAC960_Command_T *Command)
3204 {
3205 DAC960_Controller_T *Controller = Command->Controller;
3206 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
3207 DAC960_V1_ScatterGatherSegment_T *ScatterGatherList =
3208 Command->V1.ScatterGatherList;
3209 struct scatterlist *ScatterList = Command->V1.ScatterList;
3210
3211 DAC960_V1_ClearCommand(Command);
3212
3213 if (Command->SegmentCount == 1)
3214 {
3215 if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
3216 CommandMailbox->Type5.CommandOpcode = DAC960_V1_Read;
3217 else
3218 CommandMailbox->Type5.CommandOpcode = DAC960_V1_Write;
3219
3220 CommandMailbox->Type5.LD.TransferLength = Command->BlockCount;
3221 CommandMailbox->Type5.LD.LogicalDriveNumber = Command->LogicalDriveNumber;
3222 CommandMailbox->Type5.LogicalBlockAddress = Command->BlockNumber;
3223 CommandMailbox->Type5.BusAddress =
3224 (DAC960_BusAddress32_T)sg_dma_address(ScatterList);
3225 }
3226 else
3227 {
3228 int i;
3229
3230 if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
3231 CommandMailbox->Type5.CommandOpcode = DAC960_V1_ReadWithScatterGather;
3232 else
3233 CommandMailbox->Type5.CommandOpcode = DAC960_V1_WriteWithScatterGather;
3234
3235 CommandMailbox->Type5.LD.TransferLength = Command->BlockCount;
3236 CommandMailbox->Type5.LD.LogicalDriveNumber = Command->LogicalDriveNumber;
3237 CommandMailbox->Type5.LogicalBlockAddress = Command->BlockNumber;
3238 CommandMailbox->Type5.BusAddress = Command->V1.ScatterGatherListDMA;
3239
3240 CommandMailbox->Type5.ScatterGatherCount = Command->SegmentCount;
3241
3242 for (i = 0; i < Command->SegmentCount; i++, ScatterList++, ScatterGatherList++) {
3243 ScatterGatherList->SegmentDataPointer =
3244 (DAC960_BusAddress32_T)sg_dma_address(ScatterList);
3245 ScatterGatherList->SegmentByteCount =
3246 (DAC960_ByteCount32_T)sg_dma_len(ScatterList);
3247 }
3248 }
3249 DAC960_QueueCommand(Command);
3250 }
3251
3252
3253 /*
3254 DAC960_V2_QueueReadWriteCommand prepares and queues a Read/Write Command for
3255 DAC960 V2 Firmware Controllers.
3256 */
3257
DAC960_V2_QueueReadWriteCommand(DAC960_Command_T * Command)3258 static void DAC960_V2_QueueReadWriteCommand(DAC960_Command_T *Command)
3259 {
3260 DAC960_Controller_T *Controller = Command->Controller;
3261 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
3262 struct scatterlist *ScatterList = Command->V2.ScatterList;
3263
3264 DAC960_V2_ClearCommand(Command);
3265
3266 CommandMailbox->SCSI_10.CommandOpcode = DAC960_V2_SCSI_10;
3267 CommandMailbox->SCSI_10.CommandControlBits.DataTransferControllerToHost =
3268 (Command->DmaDirection == PCI_DMA_FROMDEVICE);
3269 CommandMailbox->SCSI_10.DataTransferSize =
3270 Command->BlockCount << DAC960_BlockSizeBits;
3271 CommandMailbox->SCSI_10.RequestSenseBusAddress = Command->V2.RequestSenseDMA;
3272 CommandMailbox->SCSI_10.PhysicalDevice =
3273 Controller->V2.LogicalDriveToVirtualDevice[Command->LogicalDriveNumber];
3274 CommandMailbox->SCSI_10.RequestSenseSize = sizeof(DAC960_SCSI_RequestSense_T);
3275 CommandMailbox->SCSI_10.CDBLength = 10;
3276 CommandMailbox->SCSI_10.SCSI_CDB[0] =
3277 (Command->DmaDirection == PCI_DMA_FROMDEVICE ? 0x28 : 0x2A);
3278 CommandMailbox->SCSI_10.SCSI_CDB[2] = Command->BlockNumber >> 24;
3279 CommandMailbox->SCSI_10.SCSI_CDB[3] = Command->BlockNumber >> 16;
3280 CommandMailbox->SCSI_10.SCSI_CDB[4] = Command->BlockNumber >> 8;
3281 CommandMailbox->SCSI_10.SCSI_CDB[5] = Command->BlockNumber;
3282 CommandMailbox->SCSI_10.SCSI_CDB[7] = Command->BlockCount >> 8;
3283 CommandMailbox->SCSI_10.SCSI_CDB[8] = Command->BlockCount;
3284
3285 if (Command->SegmentCount == 1)
3286 {
3287 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3288 .ScatterGatherSegments[0]
3289 .SegmentDataPointer =
3290 (DAC960_BusAddress64_T)sg_dma_address(ScatterList);
3291 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3292 .ScatterGatherSegments[0]
3293 .SegmentByteCount =
3294 CommandMailbox->SCSI_10.DataTransferSize;
3295 }
3296 else
3297 {
3298 DAC960_V2_ScatterGatherSegment_T *ScatterGatherList;
3299 int i;
3300
3301 if (Command->SegmentCount > 2)
3302 {
3303 ScatterGatherList = Command->V2.ScatterGatherList;
3304 CommandMailbox->SCSI_10.CommandControlBits
3305 .AdditionalScatterGatherListMemory = true;
3306 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3307 .ExtendedScatterGather.ScatterGatherList0Length = Command->SegmentCount;
3308 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3309 .ExtendedScatterGather.ScatterGatherList0Address =
3310 Command->V2.ScatterGatherListDMA;
3311 }
3312 else
3313 ScatterGatherList = CommandMailbox->SCSI_10.DataTransferMemoryAddress
3314 .ScatterGatherSegments;
3315
3316 for (i = 0; i < Command->SegmentCount; i++, ScatterList++, ScatterGatherList++) {
3317 ScatterGatherList->SegmentDataPointer =
3318 (DAC960_BusAddress64_T)sg_dma_address(ScatterList);
3319 ScatterGatherList->SegmentByteCount =
3320 (DAC960_ByteCount64_T)sg_dma_len(ScatterList);
3321 }
3322 }
3323 DAC960_QueueCommand(Command);
3324 }
3325
3326
DAC960_process_queue(DAC960_Controller_T * Controller,struct request_queue * req_q)3327 static int DAC960_process_queue(DAC960_Controller_T *Controller, struct request_queue *req_q)
3328 {
3329 struct request *Request;
3330 DAC960_Command_T *Command;
3331
3332 while(1) {
3333 Request = blk_peek_request(req_q);
3334 if (!Request)
3335 return 1;
3336
3337 Command = DAC960_AllocateCommand(Controller);
3338 if (Command == NULL)
3339 return 0;
3340
3341 if (rq_data_dir(Request) == READ) {
3342 Command->DmaDirection = PCI_DMA_FROMDEVICE;
3343 Command->CommandType = DAC960_ReadCommand;
3344 } else {
3345 Command->DmaDirection = PCI_DMA_TODEVICE;
3346 Command->CommandType = DAC960_WriteCommand;
3347 }
3348 Command->Completion = Request->end_io_data;
3349 Command->LogicalDriveNumber = (long)Request->rq_disk->private_data;
3350 Command->BlockNumber = blk_rq_pos(Request);
3351 Command->BlockCount = blk_rq_sectors(Request);
3352 Command->Request = Request;
3353 blk_start_request(Request);
3354 Command->SegmentCount = blk_rq_map_sg(req_q,
3355 Command->Request, Command->cmd_sglist);
3356 /* pci_map_sg MAY change the value of SegCount */
3357 Command->SegmentCount = pci_map_sg(Controller->PCIDevice, Command->cmd_sglist,
3358 Command->SegmentCount, Command->DmaDirection);
3359
3360 DAC960_QueueReadWriteCommand(Command);
3361 }
3362 }
3363
3364 /*
3365 DAC960_ProcessRequest attempts to remove one I/O Request from Controller's
3366 I/O Request Queue and queues it to the Controller. WaitForCommand is true if
3367 this function should wait for a Command to become available if necessary.
3368 This function returns true if an I/O Request was queued and false otherwise.
3369 */
DAC960_ProcessRequest(DAC960_Controller_T * controller)3370 static void DAC960_ProcessRequest(DAC960_Controller_T *controller)
3371 {
3372 int i;
3373
3374 if (!controller->ControllerInitialized)
3375 return;
3376
3377 /* Do this better later! */
3378 for (i = controller->req_q_index; i < DAC960_MaxLogicalDrives; i++) {
3379 struct request_queue *req_q = controller->RequestQueue[i];
3380
3381 if (req_q == NULL)
3382 continue;
3383
3384 if (!DAC960_process_queue(controller, req_q)) {
3385 controller->req_q_index = i;
3386 return;
3387 }
3388 }
3389
3390 if (controller->req_q_index == 0)
3391 return;
3392
3393 for (i = 0; i < controller->req_q_index; i++) {
3394 struct request_queue *req_q = controller->RequestQueue[i];
3395
3396 if (req_q == NULL)
3397 continue;
3398
3399 if (!DAC960_process_queue(controller, req_q)) {
3400 controller->req_q_index = i;
3401 return;
3402 }
3403 }
3404 }
3405
3406
3407 /*
3408 DAC960_queue_partial_rw extracts one bio from the request already
3409 associated with argument command, and construct a new command block to retry I/O
3410 only on that bio. Queue that command to the controller.
3411
3412 This function re-uses a previously-allocated Command,
3413 there is no failure mode from trying to allocate a command.
3414 */
3415
DAC960_queue_partial_rw(DAC960_Command_T * Command)3416 static void DAC960_queue_partial_rw(DAC960_Command_T *Command)
3417 {
3418 DAC960_Controller_T *Controller = Command->Controller;
3419 struct request *Request = Command->Request;
3420 struct request_queue *req_q = Controller->RequestQueue[Command->LogicalDriveNumber];
3421
3422 if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
3423 Command->CommandType = DAC960_ReadRetryCommand;
3424 else
3425 Command->CommandType = DAC960_WriteRetryCommand;
3426
3427 /*
3428 * We could be more efficient with these mapping requests
3429 * and map only the portions that we need. But since this
3430 * code should almost never be called, just go with a
3431 * simple coding.
3432 */
3433 (void)blk_rq_map_sg(req_q, Command->Request, Command->cmd_sglist);
3434
3435 (void)pci_map_sg(Controller->PCIDevice, Command->cmd_sglist, 1, Command->DmaDirection);
3436 /*
3437 * Resubmitting the request sector at a time is really tedious.
3438 * But, this should almost never happen. So, we're willing to pay
3439 * this price so that in the end, as much of the transfer is completed
3440 * successfully as possible.
3441 */
3442 Command->SegmentCount = 1;
3443 Command->BlockNumber = blk_rq_pos(Request);
3444 Command->BlockCount = 1;
3445 DAC960_QueueReadWriteCommand(Command);
3446 return;
3447 }
3448
3449 /*
3450 DAC960_RequestFunction is the I/O Request Function for DAC960 Controllers.
3451 */
3452
DAC960_RequestFunction(struct request_queue * RequestQueue)3453 static void DAC960_RequestFunction(struct request_queue *RequestQueue)
3454 {
3455 DAC960_ProcessRequest(RequestQueue->queuedata);
3456 }
3457
3458 /*
3459 DAC960_ProcessCompletedBuffer performs completion processing for an
3460 individual Buffer.
3461 */
3462
DAC960_ProcessCompletedRequest(DAC960_Command_T * Command,bool SuccessfulIO)3463 static inline bool DAC960_ProcessCompletedRequest(DAC960_Command_T *Command,
3464 bool SuccessfulIO)
3465 {
3466 struct request *Request = Command->Request;
3467 blk_status_t Error = SuccessfulIO ? BLK_STS_OK : BLK_STS_IOERR;
3468
3469 pci_unmap_sg(Command->Controller->PCIDevice, Command->cmd_sglist,
3470 Command->SegmentCount, Command->DmaDirection);
3471
3472 if (!__blk_end_request(Request, Error, Command->BlockCount << 9)) {
3473 if (Command->Completion) {
3474 complete(Command->Completion);
3475 Command->Completion = NULL;
3476 }
3477 return true;
3478 }
3479 return false;
3480 }
3481
3482 /*
3483 DAC960_V1_ReadWriteError prints an appropriate error message for Command
3484 when an error occurs on a Read or Write operation.
3485 */
3486
DAC960_V1_ReadWriteError(DAC960_Command_T * Command)3487 static void DAC960_V1_ReadWriteError(DAC960_Command_T *Command)
3488 {
3489 DAC960_Controller_T *Controller = Command->Controller;
3490 unsigned char *CommandName = "UNKNOWN";
3491 switch (Command->CommandType)
3492 {
3493 case DAC960_ReadCommand:
3494 case DAC960_ReadRetryCommand:
3495 CommandName = "READ";
3496 break;
3497 case DAC960_WriteCommand:
3498 case DAC960_WriteRetryCommand:
3499 CommandName = "WRITE";
3500 break;
3501 case DAC960_MonitoringCommand:
3502 case DAC960_ImmediateCommand:
3503 case DAC960_QueuedCommand:
3504 break;
3505 }
3506 switch (Command->V1.CommandStatus)
3507 {
3508 case DAC960_V1_IrrecoverableDataError:
3509 DAC960_Error("Irrecoverable Data Error on %s:\n",
3510 Controller, CommandName);
3511 break;
3512 case DAC960_V1_LogicalDriveNonexistentOrOffline:
3513 DAC960_Error("Logical Drive Nonexistent or Offline on %s:\n",
3514 Controller, CommandName);
3515 break;
3516 case DAC960_V1_AccessBeyondEndOfLogicalDrive:
3517 DAC960_Error("Attempt to Access Beyond End of Logical Drive "
3518 "on %s:\n", Controller, CommandName);
3519 break;
3520 case DAC960_V1_BadDataEncountered:
3521 DAC960_Error("Bad Data Encountered on %s:\n", Controller, CommandName);
3522 break;
3523 default:
3524 DAC960_Error("Unexpected Error Status %04X on %s:\n",
3525 Controller, Command->V1.CommandStatus, CommandName);
3526 break;
3527 }
3528 DAC960_Error(" /dev/rd/c%dd%d: absolute blocks %u..%u\n",
3529 Controller, Controller->ControllerNumber,
3530 Command->LogicalDriveNumber, Command->BlockNumber,
3531 Command->BlockNumber + Command->BlockCount - 1);
3532 }
3533
3534
3535 /*
3536 DAC960_V1_ProcessCompletedCommand performs completion processing for Command
3537 for DAC960 V1 Firmware Controllers.
3538 */
3539
DAC960_V1_ProcessCompletedCommand(DAC960_Command_T * Command)3540 static void DAC960_V1_ProcessCompletedCommand(DAC960_Command_T *Command)
3541 {
3542 DAC960_Controller_T *Controller = Command->Controller;
3543 DAC960_CommandType_T CommandType = Command->CommandType;
3544 DAC960_V1_CommandOpcode_T CommandOpcode =
3545 Command->V1.CommandMailbox.Common.CommandOpcode;
3546 DAC960_V1_CommandStatus_T CommandStatus = Command->V1.CommandStatus;
3547
3548 if (CommandType == DAC960_ReadCommand ||
3549 CommandType == DAC960_WriteCommand)
3550 {
3551
3552 #ifdef FORCE_RETRY_DEBUG
3553 CommandStatus = DAC960_V1_IrrecoverableDataError;
3554 #endif
3555
3556 if (CommandStatus == DAC960_V1_NormalCompletion) {
3557
3558 if (!DAC960_ProcessCompletedRequest(Command, true))
3559 BUG();
3560
3561 } else if (CommandStatus == DAC960_V1_IrrecoverableDataError ||
3562 CommandStatus == DAC960_V1_BadDataEncountered)
3563 {
3564 /*
3565 * break the command down into pieces and resubmit each
3566 * piece, hoping that some of them will succeed.
3567 */
3568 DAC960_queue_partial_rw(Command);
3569 return;
3570 }
3571 else
3572 {
3573 if (CommandStatus != DAC960_V1_LogicalDriveNonexistentOrOffline)
3574 DAC960_V1_ReadWriteError(Command);
3575
3576 if (!DAC960_ProcessCompletedRequest(Command, false))
3577 BUG();
3578 }
3579 }
3580 else if (CommandType == DAC960_ReadRetryCommand ||
3581 CommandType == DAC960_WriteRetryCommand)
3582 {
3583 bool normal_completion;
3584 #ifdef FORCE_RETRY_FAILURE_DEBUG
3585 static int retry_count = 1;
3586 #endif
3587 /*
3588 Perform completion processing for the portion that was
3589 retried, and submit the next portion, if any.
3590 */
3591 normal_completion = true;
3592 if (CommandStatus != DAC960_V1_NormalCompletion) {
3593 normal_completion = false;
3594 if (CommandStatus != DAC960_V1_LogicalDriveNonexistentOrOffline)
3595 DAC960_V1_ReadWriteError(Command);
3596 }
3597
3598 #ifdef FORCE_RETRY_FAILURE_DEBUG
3599 if (!(++retry_count % 10000)) {
3600 printk("V1 error retry failure test\n");
3601 normal_completion = false;
3602 DAC960_V1_ReadWriteError(Command);
3603 }
3604 #endif
3605
3606 if (!DAC960_ProcessCompletedRequest(Command, normal_completion)) {
3607 DAC960_queue_partial_rw(Command);
3608 return;
3609 }
3610 }
3611
3612 else if (CommandType == DAC960_MonitoringCommand)
3613 {
3614 if (Controller->ShutdownMonitoringTimer)
3615 return;
3616 if (CommandOpcode == DAC960_V1_Enquiry)
3617 {
3618 DAC960_V1_Enquiry_T *OldEnquiry = &Controller->V1.Enquiry;
3619 DAC960_V1_Enquiry_T *NewEnquiry = Controller->V1.NewEnquiry;
3620 unsigned int OldCriticalLogicalDriveCount =
3621 OldEnquiry->CriticalLogicalDriveCount;
3622 unsigned int NewCriticalLogicalDriveCount =
3623 NewEnquiry->CriticalLogicalDriveCount;
3624 if (NewEnquiry->NumberOfLogicalDrives > Controller->LogicalDriveCount)
3625 {
3626 int LogicalDriveNumber = Controller->LogicalDriveCount - 1;
3627 while (++LogicalDriveNumber < NewEnquiry->NumberOfLogicalDrives)
3628 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3629 "Now Exists\n", Controller,
3630 LogicalDriveNumber,
3631 Controller->ControllerNumber,
3632 LogicalDriveNumber);
3633 Controller->LogicalDriveCount = NewEnquiry->NumberOfLogicalDrives;
3634 DAC960_ComputeGenericDiskInfo(Controller);
3635 }
3636 if (NewEnquiry->NumberOfLogicalDrives < Controller->LogicalDriveCount)
3637 {
3638 int LogicalDriveNumber = NewEnquiry->NumberOfLogicalDrives - 1;
3639 while (++LogicalDriveNumber < Controller->LogicalDriveCount)
3640 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3641 "No Longer Exists\n", Controller,
3642 LogicalDriveNumber,
3643 Controller->ControllerNumber,
3644 LogicalDriveNumber);
3645 Controller->LogicalDriveCount = NewEnquiry->NumberOfLogicalDrives;
3646 DAC960_ComputeGenericDiskInfo(Controller);
3647 }
3648 if (NewEnquiry->StatusFlags.DeferredWriteError !=
3649 OldEnquiry->StatusFlags.DeferredWriteError)
3650 DAC960_Critical("Deferred Write Error Flag is now %s\n", Controller,
3651 (NewEnquiry->StatusFlags.DeferredWriteError
3652 ? "TRUE" : "FALSE"));
3653 if ((NewCriticalLogicalDriveCount > 0 ||
3654 NewCriticalLogicalDriveCount != OldCriticalLogicalDriveCount) ||
3655 (NewEnquiry->OfflineLogicalDriveCount > 0 ||
3656 NewEnquiry->OfflineLogicalDriveCount !=
3657 OldEnquiry->OfflineLogicalDriveCount) ||
3658 (NewEnquiry->DeadDriveCount > 0 ||
3659 NewEnquiry->DeadDriveCount !=
3660 OldEnquiry->DeadDriveCount) ||
3661 (NewEnquiry->EventLogSequenceNumber !=
3662 OldEnquiry->EventLogSequenceNumber) ||
3663 Controller->MonitoringTimerCount == 0 ||
3664 time_after_eq(jiffies, Controller->SecondaryMonitoringTime
3665 + DAC960_SecondaryMonitoringInterval))
3666 {
3667 Controller->V1.NeedLogicalDriveInformation = true;
3668 Controller->V1.NewEventLogSequenceNumber =
3669 NewEnquiry->EventLogSequenceNumber;
3670 Controller->V1.NeedErrorTableInformation = true;
3671 Controller->V1.NeedDeviceStateInformation = true;
3672 Controller->V1.StartDeviceStateScan = true;
3673 Controller->V1.NeedBackgroundInitializationStatus =
3674 Controller->V1.BackgroundInitializationStatusSupported;
3675 Controller->SecondaryMonitoringTime = jiffies;
3676 }
3677 if (NewEnquiry->RebuildFlag == DAC960_V1_StandbyRebuildInProgress ||
3678 NewEnquiry->RebuildFlag
3679 == DAC960_V1_BackgroundRebuildInProgress ||
3680 OldEnquiry->RebuildFlag == DAC960_V1_StandbyRebuildInProgress ||
3681 OldEnquiry->RebuildFlag == DAC960_V1_BackgroundRebuildInProgress)
3682 {
3683 Controller->V1.NeedRebuildProgress = true;
3684 Controller->V1.RebuildProgressFirst =
3685 (NewEnquiry->CriticalLogicalDriveCount <
3686 OldEnquiry->CriticalLogicalDriveCount);
3687 }
3688 if (OldEnquiry->RebuildFlag == DAC960_V1_BackgroundCheckInProgress)
3689 switch (NewEnquiry->RebuildFlag)
3690 {
3691 case DAC960_V1_NoStandbyRebuildOrCheckInProgress:
3692 DAC960_Progress("Consistency Check Completed Successfully\n",
3693 Controller);
3694 break;
3695 case DAC960_V1_StandbyRebuildInProgress:
3696 case DAC960_V1_BackgroundRebuildInProgress:
3697 break;
3698 case DAC960_V1_BackgroundCheckInProgress:
3699 Controller->V1.NeedConsistencyCheckProgress = true;
3700 break;
3701 case DAC960_V1_StandbyRebuildCompletedWithError:
3702 DAC960_Progress("Consistency Check Completed with Error\n",
3703 Controller);
3704 break;
3705 case DAC960_V1_BackgroundRebuildOrCheckFailed_DriveFailed:
3706 DAC960_Progress("Consistency Check Failed - "
3707 "Physical Device Failed\n", Controller);
3708 break;
3709 case DAC960_V1_BackgroundRebuildOrCheckFailed_LogicalDriveFailed:
3710 DAC960_Progress("Consistency Check Failed - "
3711 "Logical Drive Failed\n", Controller);
3712 break;
3713 case DAC960_V1_BackgroundRebuildOrCheckFailed_OtherCauses:
3714 DAC960_Progress("Consistency Check Failed - Other Causes\n",
3715 Controller);
3716 break;
3717 case DAC960_V1_BackgroundRebuildOrCheckSuccessfullyTerminated:
3718 DAC960_Progress("Consistency Check Successfully Terminated\n",
3719 Controller);
3720 break;
3721 }
3722 else if (NewEnquiry->RebuildFlag
3723 == DAC960_V1_BackgroundCheckInProgress)
3724 Controller->V1.NeedConsistencyCheckProgress = true;
3725 Controller->MonitoringAlertMode =
3726 (NewEnquiry->CriticalLogicalDriveCount > 0 ||
3727 NewEnquiry->OfflineLogicalDriveCount > 0 ||
3728 NewEnquiry->DeadDriveCount > 0);
3729 if (NewEnquiry->RebuildFlag > DAC960_V1_BackgroundCheckInProgress)
3730 {
3731 Controller->V1.PendingRebuildFlag = NewEnquiry->RebuildFlag;
3732 Controller->V1.RebuildFlagPending = true;
3733 }
3734 memcpy(&Controller->V1.Enquiry, &Controller->V1.NewEnquiry,
3735 sizeof(DAC960_V1_Enquiry_T));
3736 }
3737 else if (CommandOpcode == DAC960_V1_PerformEventLogOperation)
3738 {
3739 static char
3740 *DAC960_EventMessages[] =
3741 { "killed because write recovery failed",
3742 "killed because of SCSI bus reset failure",
3743 "killed because of double check condition",
3744 "killed because it was removed",
3745 "killed because of gross error on SCSI chip",
3746 "killed because of bad tag returned from drive",
3747 "killed because of timeout on SCSI command",
3748 "killed because of reset SCSI command issued from system",
3749 "killed because busy or parity error count exceeded limit",
3750 "killed because of 'kill drive' command from system",
3751 "killed because of selection timeout",
3752 "killed due to SCSI phase sequence error",
3753 "killed due to unknown status" };
3754 DAC960_V1_EventLogEntry_T *EventLogEntry =
3755 Controller->V1.EventLogEntry;
3756 if (EventLogEntry->SequenceNumber ==
3757 Controller->V1.OldEventLogSequenceNumber)
3758 {
3759 unsigned char SenseKey = EventLogEntry->SenseKey;
3760 unsigned char AdditionalSenseCode =
3761 EventLogEntry->AdditionalSenseCode;
3762 unsigned char AdditionalSenseCodeQualifier =
3763 EventLogEntry->AdditionalSenseCodeQualifier;
3764 if (SenseKey == DAC960_SenseKey_VendorSpecific &&
3765 AdditionalSenseCode == 0x80 &&
3766 AdditionalSenseCodeQualifier <
3767 ARRAY_SIZE(DAC960_EventMessages))
3768 DAC960_Critical("Physical Device %d:%d %s\n", Controller,
3769 EventLogEntry->Channel,
3770 EventLogEntry->TargetID,
3771 DAC960_EventMessages[
3772 AdditionalSenseCodeQualifier]);
3773 else if (SenseKey == DAC960_SenseKey_UnitAttention &&
3774 AdditionalSenseCode == 0x29)
3775 {
3776 if (Controller->MonitoringTimerCount > 0)
3777 Controller->V1.DeviceResetCount[EventLogEntry->Channel]
3778 [EventLogEntry->TargetID]++;
3779 }
3780 else if (!(SenseKey == DAC960_SenseKey_NoSense ||
3781 (SenseKey == DAC960_SenseKey_NotReady &&
3782 AdditionalSenseCode == 0x04 &&
3783 (AdditionalSenseCodeQualifier == 0x01 ||
3784 AdditionalSenseCodeQualifier == 0x02))))
3785 {
3786 DAC960_Critical("Physical Device %d:%d Error Log: "
3787 "Sense Key = %X, ASC = %02X, ASCQ = %02X\n",
3788 Controller,
3789 EventLogEntry->Channel,
3790 EventLogEntry->TargetID,
3791 SenseKey,
3792 AdditionalSenseCode,
3793 AdditionalSenseCodeQualifier);
3794 DAC960_Critical("Physical Device %d:%d Error Log: "
3795 "Information = %02X%02X%02X%02X "
3796 "%02X%02X%02X%02X\n",
3797 Controller,
3798 EventLogEntry->Channel,
3799 EventLogEntry->TargetID,
3800 EventLogEntry->Information[0],
3801 EventLogEntry->Information[1],
3802 EventLogEntry->Information[2],
3803 EventLogEntry->Information[3],
3804 EventLogEntry->CommandSpecificInformation[0],
3805 EventLogEntry->CommandSpecificInformation[1],
3806 EventLogEntry->CommandSpecificInformation[2],
3807 EventLogEntry->CommandSpecificInformation[3]);
3808 }
3809 }
3810 Controller->V1.OldEventLogSequenceNumber++;
3811 }
3812 else if (CommandOpcode == DAC960_V1_GetErrorTable)
3813 {
3814 DAC960_V1_ErrorTable_T *OldErrorTable = &Controller->V1.ErrorTable;
3815 DAC960_V1_ErrorTable_T *NewErrorTable = Controller->V1.NewErrorTable;
3816 int Channel, TargetID;
3817 for (Channel = 0; Channel < Controller->Channels; Channel++)
3818 for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
3819 {
3820 DAC960_V1_ErrorTableEntry_T *NewErrorEntry =
3821 &NewErrorTable->ErrorTableEntries[Channel][TargetID];
3822 DAC960_V1_ErrorTableEntry_T *OldErrorEntry =
3823 &OldErrorTable->ErrorTableEntries[Channel][TargetID];
3824 if ((NewErrorEntry->ParityErrorCount !=
3825 OldErrorEntry->ParityErrorCount) ||
3826 (NewErrorEntry->SoftErrorCount !=
3827 OldErrorEntry->SoftErrorCount) ||
3828 (NewErrorEntry->HardErrorCount !=
3829 OldErrorEntry->HardErrorCount) ||
3830 (NewErrorEntry->MiscErrorCount !=
3831 OldErrorEntry->MiscErrorCount))
3832 DAC960_Critical("Physical Device %d:%d Errors: "
3833 "Parity = %d, Soft = %d, "
3834 "Hard = %d, Misc = %d\n",
3835 Controller, Channel, TargetID,
3836 NewErrorEntry->ParityErrorCount,
3837 NewErrorEntry->SoftErrorCount,
3838 NewErrorEntry->HardErrorCount,
3839 NewErrorEntry->MiscErrorCount);
3840 }
3841 memcpy(&Controller->V1.ErrorTable, Controller->V1.NewErrorTable,
3842 sizeof(DAC960_V1_ErrorTable_T));
3843 }
3844 else if (CommandOpcode == DAC960_V1_GetDeviceState)
3845 {
3846 DAC960_V1_DeviceState_T *OldDeviceState =
3847 &Controller->V1.DeviceState[Controller->V1.DeviceStateChannel]
3848 [Controller->V1.DeviceStateTargetID];
3849 DAC960_V1_DeviceState_T *NewDeviceState =
3850 Controller->V1.NewDeviceState;
3851 if (NewDeviceState->DeviceState != OldDeviceState->DeviceState)
3852 DAC960_Critical("Physical Device %d:%d is now %s\n", Controller,
3853 Controller->V1.DeviceStateChannel,
3854 Controller->V1.DeviceStateTargetID,
3855 (NewDeviceState->DeviceState
3856 == DAC960_V1_Device_Dead
3857 ? "DEAD"
3858 : NewDeviceState->DeviceState
3859 == DAC960_V1_Device_WriteOnly
3860 ? "WRITE-ONLY"
3861 : NewDeviceState->DeviceState
3862 == DAC960_V1_Device_Online
3863 ? "ONLINE" : "STANDBY"));
3864 if (OldDeviceState->DeviceState == DAC960_V1_Device_Dead &&
3865 NewDeviceState->DeviceState != DAC960_V1_Device_Dead)
3866 {
3867 Controller->V1.NeedDeviceInquiryInformation = true;
3868 Controller->V1.NeedDeviceSerialNumberInformation = true;
3869 Controller->V1.DeviceResetCount
3870 [Controller->V1.DeviceStateChannel]
3871 [Controller->V1.DeviceStateTargetID] = 0;
3872 }
3873 memcpy(OldDeviceState, NewDeviceState,
3874 sizeof(DAC960_V1_DeviceState_T));
3875 }
3876 else if (CommandOpcode == DAC960_V1_GetLogicalDriveInformation)
3877 {
3878 int LogicalDriveNumber;
3879 for (LogicalDriveNumber = 0;
3880 LogicalDriveNumber < Controller->LogicalDriveCount;
3881 LogicalDriveNumber++)
3882 {
3883 DAC960_V1_LogicalDriveInformation_T *OldLogicalDriveInformation =
3884 &Controller->V1.LogicalDriveInformation[LogicalDriveNumber];
3885 DAC960_V1_LogicalDriveInformation_T *NewLogicalDriveInformation =
3886 &(*Controller->V1.NewLogicalDriveInformation)[LogicalDriveNumber];
3887 if (NewLogicalDriveInformation->LogicalDriveState !=
3888 OldLogicalDriveInformation->LogicalDriveState)
3889 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3890 "is now %s\n", Controller,
3891 LogicalDriveNumber,
3892 Controller->ControllerNumber,
3893 LogicalDriveNumber,
3894 (NewLogicalDriveInformation->LogicalDriveState
3895 == DAC960_V1_LogicalDrive_Online
3896 ? "ONLINE"
3897 : NewLogicalDriveInformation->LogicalDriveState
3898 == DAC960_V1_LogicalDrive_Critical
3899 ? "CRITICAL" : "OFFLINE"));
3900 if (NewLogicalDriveInformation->WriteBack !=
3901 OldLogicalDriveInformation->WriteBack)
3902 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3903 "is now %s\n", Controller,
3904 LogicalDriveNumber,
3905 Controller->ControllerNumber,
3906 LogicalDriveNumber,
3907 (NewLogicalDriveInformation->WriteBack
3908 ? "WRITE BACK" : "WRITE THRU"));
3909 }
3910 memcpy(&Controller->V1.LogicalDriveInformation,
3911 Controller->V1.NewLogicalDriveInformation,
3912 sizeof(DAC960_V1_LogicalDriveInformationArray_T));
3913 }
3914 else if (CommandOpcode == DAC960_V1_GetRebuildProgress)
3915 {
3916 unsigned int LogicalDriveNumber =
3917 Controller->V1.RebuildProgress->LogicalDriveNumber;
3918 unsigned int LogicalDriveSize =
3919 Controller->V1.RebuildProgress->LogicalDriveSize;
3920 unsigned int BlocksCompleted =
3921 LogicalDriveSize - Controller->V1.RebuildProgress->RemainingBlocks;
3922 if (CommandStatus == DAC960_V1_NoRebuildOrCheckInProgress &&
3923 Controller->V1.LastRebuildStatus == DAC960_V1_NormalCompletion)
3924 CommandStatus = DAC960_V1_RebuildSuccessful;
3925 switch (CommandStatus)
3926 {
3927 case DAC960_V1_NormalCompletion:
3928 Controller->EphemeralProgressMessage = true;
3929 DAC960_Progress("Rebuild in Progress: "
3930 "Logical Drive %d (/dev/rd/c%dd%d) "
3931 "%d%% completed\n",
3932 Controller, LogicalDriveNumber,
3933 Controller->ControllerNumber,
3934 LogicalDriveNumber,
3935 (100 * (BlocksCompleted >> 7))
3936 / (LogicalDriveSize >> 7));
3937 Controller->EphemeralProgressMessage = false;
3938 break;
3939 case DAC960_V1_RebuildFailed_LogicalDriveFailure:
3940 DAC960_Progress("Rebuild Failed due to "
3941 "Logical Drive Failure\n", Controller);
3942 break;
3943 case DAC960_V1_RebuildFailed_BadBlocksOnOther:
3944 DAC960_Progress("Rebuild Failed due to "
3945 "Bad Blocks on Other Drives\n", Controller);
3946 break;
3947 case DAC960_V1_RebuildFailed_NewDriveFailed:
3948 DAC960_Progress("Rebuild Failed due to "
3949 "Failure of Drive Being Rebuilt\n", Controller);
3950 break;
3951 case DAC960_V1_NoRebuildOrCheckInProgress:
3952 break;
3953 case DAC960_V1_RebuildSuccessful:
3954 DAC960_Progress("Rebuild Completed Successfully\n", Controller);
3955 break;
3956 case DAC960_V1_RebuildSuccessfullyTerminated:
3957 DAC960_Progress("Rebuild Successfully Terminated\n", Controller);
3958 break;
3959 }
3960 Controller->V1.LastRebuildStatus = CommandStatus;
3961 if (CommandType != DAC960_MonitoringCommand &&
3962 Controller->V1.RebuildStatusPending)
3963 {
3964 Command->V1.CommandStatus = Controller->V1.PendingRebuildStatus;
3965 Controller->V1.RebuildStatusPending = false;
3966 }
3967 else if (CommandType == DAC960_MonitoringCommand &&
3968 CommandStatus != DAC960_V1_NormalCompletion &&
3969 CommandStatus != DAC960_V1_NoRebuildOrCheckInProgress)
3970 {
3971 Controller->V1.PendingRebuildStatus = CommandStatus;
3972 Controller->V1.RebuildStatusPending = true;
3973 }
3974 }
3975 else if (CommandOpcode == DAC960_V1_RebuildStat)
3976 {
3977 unsigned int LogicalDriveNumber =
3978 Controller->V1.RebuildProgress->LogicalDriveNumber;
3979 unsigned int LogicalDriveSize =
3980 Controller->V1.RebuildProgress->LogicalDriveSize;
3981 unsigned int BlocksCompleted =
3982 LogicalDriveSize - Controller->V1.RebuildProgress->RemainingBlocks;
3983 if (CommandStatus == DAC960_V1_NormalCompletion)
3984 {
3985 Controller->EphemeralProgressMessage = true;
3986 DAC960_Progress("Consistency Check in Progress: "
3987 "Logical Drive %d (/dev/rd/c%dd%d) "
3988 "%d%% completed\n",
3989 Controller, LogicalDriveNumber,
3990 Controller->ControllerNumber,
3991 LogicalDriveNumber,
3992 (100 * (BlocksCompleted >> 7))
3993 / (LogicalDriveSize >> 7));
3994 Controller->EphemeralProgressMessage = false;
3995 }
3996 }
3997 else if (CommandOpcode == DAC960_V1_BackgroundInitializationControl)
3998 {
3999 unsigned int LogicalDriveNumber =
4000 Controller->V1.BackgroundInitializationStatus->LogicalDriveNumber;
4001 unsigned int LogicalDriveSize =
4002 Controller->V1.BackgroundInitializationStatus->LogicalDriveSize;
4003 unsigned int BlocksCompleted =
4004 Controller->V1.BackgroundInitializationStatus->BlocksCompleted;
4005 switch (CommandStatus)
4006 {
4007 case DAC960_V1_NormalCompletion:
4008 switch (Controller->V1.BackgroundInitializationStatus->Status)
4009 {
4010 case DAC960_V1_BackgroundInitializationInvalid:
4011 break;
4012 case DAC960_V1_BackgroundInitializationStarted:
4013 DAC960_Progress("Background Initialization Started\n",
4014 Controller);
4015 break;
4016 case DAC960_V1_BackgroundInitializationInProgress:
4017 if (BlocksCompleted ==
4018 Controller->V1.LastBackgroundInitializationStatus.
4019 BlocksCompleted &&
4020 LogicalDriveNumber ==
4021 Controller->V1.LastBackgroundInitializationStatus.
4022 LogicalDriveNumber)
4023 break;
4024 Controller->EphemeralProgressMessage = true;
4025 DAC960_Progress("Background Initialization in Progress: "
4026 "Logical Drive %d (/dev/rd/c%dd%d) "
4027 "%d%% completed\n",
4028 Controller, LogicalDriveNumber,
4029 Controller->ControllerNumber,
4030 LogicalDriveNumber,
4031 (100 * (BlocksCompleted >> 7))
4032 / (LogicalDriveSize >> 7));
4033 Controller->EphemeralProgressMessage = false;
4034 break;
4035 case DAC960_V1_BackgroundInitializationSuspended:
4036 DAC960_Progress("Background Initialization Suspended\n",
4037 Controller);
4038 break;
4039 case DAC960_V1_BackgroundInitializationCancelled:
4040 DAC960_Progress("Background Initialization Cancelled\n",
4041 Controller);
4042 break;
4043 }
4044 memcpy(&Controller->V1.LastBackgroundInitializationStatus,
4045 Controller->V1.BackgroundInitializationStatus,
4046 sizeof(DAC960_V1_BackgroundInitializationStatus_T));
4047 break;
4048 case DAC960_V1_BackgroundInitSuccessful:
4049 if (Controller->V1.BackgroundInitializationStatus->Status ==
4050 DAC960_V1_BackgroundInitializationInProgress)
4051 DAC960_Progress("Background Initialization "
4052 "Completed Successfully\n", Controller);
4053 Controller->V1.BackgroundInitializationStatus->Status =
4054 DAC960_V1_BackgroundInitializationInvalid;
4055 break;
4056 case DAC960_V1_BackgroundInitAborted:
4057 if (Controller->V1.BackgroundInitializationStatus->Status ==
4058 DAC960_V1_BackgroundInitializationInProgress)
4059 DAC960_Progress("Background Initialization Aborted\n",
4060 Controller);
4061 Controller->V1.BackgroundInitializationStatus->Status =
4062 DAC960_V1_BackgroundInitializationInvalid;
4063 break;
4064 case DAC960_V1_NoBackgroundInitInProgress:
4065 break;
4066 }
4067 }
4068 else if (CommandOpcode == DAC960_V1_DCDB)
4069 {
4070 /*
4071 This is a bit ugly.
4072
4073 The InquiryStandardData and
4074 the InquiryUntitSerialNumber information
4075 retrieval operations BOTH use the DAC960_V1_DCDB
4076 commands. the test above can't distinguish between
4077 these two cases.
4078
4079 Instead, we rely on the order of code later in this
4080 function to ensure that DeviceInquiryInformation commands
4081 are submitted before DeviceSerialNumber commands.
4082 */
4083 if (Controller->V1.NeedDeviceInquiryInformation)
4084 {
4085 DAC960_SCSI_Inquiry_T *InquiryStandardData =
4086 &Controller->V1.InquiryStandardData
4087 [Controller->V1.DeviceStateChannel]
4088 [Controller->V1.DeviceStateTargetID];
4089 if (CommandStatus != DAC960_V1_NormalCompletion)
4090 {
4091 memset(InquiryStandardData, 0,
4092 sizeof(DAC960_SCSI_Inquiry_T));
4093 InquiryStandardData->PeripheralDeviceType = 0x1F;
4094 }
4095 else
4096 memcpy(InquiryStandardData,
4097 Controller->V1.NewInquiryStandardData,
4098 sizeof(DAC960_SCSI_Inquiry_T));
4099 Controller->V1.NeedDeviceInquiryInformation = false;
4100 }
4101 else if (Controller->V1.NeedDeviceSerialNumberInformation)
4102 {
4103 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
4104 &Controller->V1.InquiryUnitSerialNumber
4105 [Controller->V1.DeviceStateChannel]
4106 [Controller->V1.DeviceStateTargetID];
4107 if (CommandStatus != DAC960_V1_NormalCompletion)
4108 {
4109 memset(InquiryUnitSerialNumber, 0,
4110 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
4111 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
4112 }
4113 else
4114 memcpy(InquiryUnitSerialNumber,
4115 Controller->V1.NewInquiryUnitSerialNumber,
4116 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
4117 Controller->V1.NeedDeviceSerialNumberInformation = false;
4118 }
4119 }
4120 /*
4121 Begin submitting new monitoring commands.
4122 */
4123 if (Controller->V1.NewEventLogSequenceNumber
4124 - Controller->V1.OldEventLogSequenceNumber > 0)
4125 {
4126 Command->V1.CommandMailbox.Type3E.CommandOpcode =
4127 DAC960_V1_PerformEventLogOperation;
4128 Command->V1.CommandMailbox.Type3E.OperationType =
4129 DAC960_V1_GetEventLogEntry;
4130 Command->V1.CommandMailbox.Type3E.OperationQualifier = 1;
4131 Command->V1.CommandMailbox.Type3E.SequenceNumber =
4132 Controller->V1.OldEventLogSequenceNumber;
4133 Command->V1.CommandMailbox.Type3E.BusAddress =
4134 Controller->V1.EventLogEntryDMA;
4135 DAC960_QueueCommand(Command);
4136 return;
4137 }
4138 if (Controller->V1.NeedErrorTableInformation)
4139 {
4140 Controller->V1.NeedErrorTableInformation = false;
4141 Command->V1.CommandMailbox.Type3.CommandOpcode =
4142 DAC960_V1_GetErrorTable;
4143 Command->V1.CommandMailbox.Type3.BusAddress =
4144 Controller->V1.NewErrorTableDMA;
4145 DAC960_QueueCommand(Command);
4146 return;
4147 }
4148 if (Controller->V1.NeedRebuildProgress &&
4149 Controller->V1.RebuildProgressFirst)
4150 {
4151 Controller->V1.NeedRebuildProgress = false;
4152 Command->V1.CommandMailbox.Type3.CommandOpcode =
4153 DAC960_V1_GetRebuildProgress;
4154 Command->V1.CommandMailbox.Type3.BusAddress =
4155 Controller->V1.RebuildProgressDMA;
4156 DAC960_QueueCommand(Command);
4157 return;
4158 }
4159 if (Controller->V1.NeedDeviceStateInformation)
4160 {
4161 if (Controller->V1.NeedDeviceInquiryInformation)
4162 {
4163 DAC960_V1_DCDB_T *DCDB = Controller->V1.MonitoringDCDB;
4164 dma_addr_t DCDB_DMA = Controller->V1.MonitoringDCDB_DMA;
4165
4166 dma_addr_t NewInquiryStandardDataDMA =
4167 Controller->V1.NewInquiryStandardDataDMA;
4168
4169 Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
4170 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_DMA;
4171 DCDB->Channel = Controller->V1.DeviceStateChannel;
4172 DCDB->TargetID = Controller->V1.DeviceStateTargetID;
4173 DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
4174 DCDB->EarlyStatus = false;
4175 DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
4176 DCDB->NoAutomaticRequestSense = false;
4177 DCDB->DisconnectPermitted = true;
4178 DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_T);
4179 DCDB->BusAddress = NewInquiryStandardDataDMA;
4180 DCDB->CDBLength = 6;
4181 DCDB->TransferLengthHigh4 = 0;
4182 DCDB->SenseLength = sizeof(DCDB->SenseData);
4183 DCDB->CDB[0] = 0x12; /* INQUIRY */
4184 DCDB->CDB[1] = 0; /* EVPD = 0 */
4185 DCDB->CDB[2] = 0; /* Page Code */
4186 DCDB->CDB[3] = 0; /* Reserved */
4187 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_T);
4188 DCDB->CDB[5] = 0; /* Control */
4189 DAC960_QueueCommand(Command);
4190 return;
4191 }
4192 if (Controller->V1.NeedDeviceSerialNumberInformation)
4193 {
4194 DAC960_V1_DCDB_T *DCDB = Controller->V1.MonitoringDCDB;
4195 dma_addr_t DCDB_DMA = Controller->V1.MonitoringDCDB_DMA;
4196 dma_addr_t NewInquiryUnitSerialNumberDMA =
4197 Controller->V1.NewInquiryUnitSerialNumberDMA;
4198
4199 Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
4200 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_DMA;
4201 DCDB->Channel = Controller->V1.DeviceStateChannel;
4202 DCDB->TargetID = Controller->V1.DeviceStateTargetID;
4203 DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
4204 DCDB->EarlyStatus = false;
4205 DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
4206 DCDB->NoAutomaticRequestSense = false;
4207 DCDB->DisconnectPermitted = true;
4208 DCDB->TransferLength =
4209 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
4210 DCDB->BusAddress = NewInquiryUnitSerialNumberDMA;
4211 DCDB->CDBLength = 6;
4212 DCDB->TransferLengthHigh4 = 0;
4213 DCDB->SenseLength = sizeof(DCDB->SenseData);
4214 DCDB->CDB[0] = 0x12; /* INQUIRY */
4215 DCDB->CDB[1] = 1; /* EVPD = 1 */
4216 DCDB->CDB[2] = 0x80; /* Page Code */
4217 DCDB->CDB[3] = 0; /* Reserved */
4218 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
4219 DCDB->CDB[5] = 0; /* Control */
4220 DAC960_QueueCommand(Command);
4221 return;
4222 }
4223 if (Controller->V1.StartDeviceStateScan)
4224 {
4225 Controller->V1.DeviceStateChannel = 0;
4226 Controller->V1.DeviceStateTargetID = 0;
4227 Controller->V1.StartDeviceStateScan = false;
4228 }
4229 else if (++Controller->V1.DeviceStateTargetID == Controller->Targets)
4230 {
4231 Controller->V1.DeviceStateChannel++;
4232 Controller->V1.DeviceStateTargetID = 0;
4233 }
4234 if (Controller->V1.DeviceStateChannel < Controller->Channels)
4235 {
4236 Controller->V1.NewDeviceState->DeviceState =
4237 DAC960_V1_Device_Dead;
4238 Command->V1.CommandMailbox.Type3D.CommandOpcode =
4239 DAC960_V1_GetDeviceState;
4240 Command->V1.CommandMailbox.Type3D.Channel =
4241 Controller->V1.DeviceStateChannel;
4242 Command->V1.CommandMailbox.Type3D.TargetID =
4243 Controller->V1.DeviceStateTargetID;
4244 Command->V1.CommandMailbox.Type3D.BusAddress =
4245 Controller->V1.NewDeviceStateDMA;
4246 DAC960_QueueCommand(Command);
4247 return;
4248 }
4249 Controller->V1.NeedDeviceStateInformation = false;
4250 }
4251 if (Controller->V1.NeedLogicalDriveInformation)
4252 {
4253 Controller->V1.NeedLogicalDriveInformation = false;
4254 Command->V1.CommandMailbox.Type3.CommandOpcode =
4255 DAC960_V1_GetLogicalDriveInformation;
4256 Command->V1.CommandMailbox.Type3.BusAddress =
4257 Controller->V1.NewLogicalDriveInformationDMA;
4258 DAC960_QueueCommand(Command);
4259 return;
4260 }
4261 if (Controller->V1.NeedRebuildProgress)
4262 {
4263 Controller->V1.NeedRebuildProgress = false;
4264 Command->V1.CommandMailbox.Type3.CommandOpcode =
4265 DAC960_V1_GetRebuildProgress;
4266 Command->V1.CommandMailbox.Type3.BusAddress =
4267 Controller->V1.RebuildProgressDMA;
4268 DAC960_QueueCommand(Command);
4269 return;
4270 }
4271 if (Controller->V1.NeedConsistencyCheckProgress)
4272 {
4273 Controller->V1.NeedConsistencyCheckProgress = false;
4274 Command->V1.CommandMailbox.Type3.CommandOpcode =
4275 DAC960_V1_RebuildStat;
4276 Command->V1.CommandMailbox.Type3.BusAddress =
4277 Controller->V1.RebuildProgressDMA;
4278 DAC960_QueueCommand(Command);
4279 return;
4280 }
4281 if (Controller->V1.NeedBackgroundInitializationStatus)
4282 {
4283 Controller->V1.NeedBackgroundInitializationStatus = false;
4284 Command->V1.CommandMailbox.Type3B.CommandOpcode =
4285 DAC960_V1_BackgroundInitializationControl;
4286 Command->V1.CommandMailbox.Type3B.CommandOpcode2 = 0x20;
4287 Command->V1.CommandMailbox.Type3B.BusAddress =
4288 Controller->V1.BackgroundInitializationStatusDMA;
4289 DAC960_QueueCommand(Command);
4290 return;
4291 }
4292 Controller->MonitoringTimerCount++;
4293 Controller->MonitoringTimer.expires =
4294 jiffies + DAC960_MonitoringTimerInterval;
4295 add_timer(&Controller->MonitoringTimer);
4296 }
4297 if (CommandType == DAC960_ImmediateCommand)
4298 {
4299 complete(Command->Completion);
4300 Command->Completion = NULL;
4301 return;
4302 }
4303 if (CommandType == DAC960_QueuedCommand)
4304 {
4305 DAC960_V1_KernelCommand_T *KernelCommand = Command->V1.KernelCommand;
4306 KernelCommand->CommandStatus = Command->V1.CommandStatus;
4307 Command->V1.KernelCommand = NULL;
4308 if (CommandOpcode == DAC960_V1_DCDB)
4309 Controller->V1.DirectCommandActive[KernelCommand->DCDB->Channel]
4310 [KernelCommand->DCDB->TargetID] =
4311 false;
4312 DAC960_DeallocateCommand(Command);
4313 KernelCommand->CompletionFunction(KernelCommand);
4314 return;
4315 }
4316 /*
4317 Queue a Status Monitoring Command to the Controller using the just
4318 completed Command if one was deferred previously due to lack of a
4319 free Command when the Monitoring Timer Function was called.
4320 */
4321 if (Controller->MonitoringCommandDeferred)
4322 {
4323 Controller->MonitoringCommandDeferred = false;
4324 DAC960_V1_QueueMonitoringCommand(Command);
4325 return;
4326 }
4327 /*
4328 Deallocate the Command.
4329 */
4330 DAC960_DeallocateCommand(Command);
4331 /*
4332 Wake up any processes waiting on a free Command.
4333 */
4334 wake_up(&Controller->CommandWaitQueue);
4335 }
4336
4337
4338 /*
4339 DAC960_V2_ReadWriteError prints an appropriate error message for Command
4340 when an error occurs on a Read or Write operation.
4341 */
4342
DAC960_V2_ReadWriteError(DAC960_Command_T * Command)4343 static void DAC960_V2_ReadWriteError(DAC960_Command_T *Command)
4344 {
4345 DAC960_Controller_T *Controller = Command->Controller;
4346 static const unsigned char *SenseErrors[] = {
4347 "NO SENSE", "RECOVERED ERROR",
4348 "NOT READY", "MEDIUM ERROR",
4349 "HARDWARE ERROR", "ILLEGAL REQUEST",
4350 "UNIT ATTENTION", "DATA PROTECT",
4351 "BLANK CHECK", "VENDOR-SPECIFIC",
4352 "COPY ABORTED", "ABORTED COMMAND",
4353 "EQUAL", "VOLUME OVERFLOW",
4354 "MISCOMPARE", "RESERVED"
4355 };
4356 unsigned char *CommandName = "UNKNOWN";
4357 switch (Command->CommandType)
4358 {
4359 case DAC960_ReadCommand:
4360 case DAC960_ReadRetryCommand:
4361 CommandName = "READ";
4362 break;
4363 case DAC960_WriteCommand:
4364 case DAC960_WriteRetryCommand:
4365 CommandName = "WRITE";
4366 break;
4367 case DAC960_MonitoringCommand:
4368 case DAC960_ImmediateCommand:
4369 case DAC960_QueuedCommand:
4370 break;
4371 }
4372 DAC960_Error("Error Condition %s on %s:\n", Controller,
4373 SenseErrors[Command->V2.RequestSense->SenseKey], CommandName);
4374 DAC960_Error(" /dev/rd/c%dd%d: absolute blocks %u..%u\n",
4375 Controller, Controller->ControllerNumber,
4376 Command->LogicalDriveNumber, Command->BlockNumber,
4377 Command->BlockNumber + Command->BlockCount - 1);
4378 }
4379
4380
4381 /*
4382 DAC960_V2_ReportEvent prints an appropriate message when a Controller Event
4383 occurs.
4384 */
4385
DAC960_V2_ReportEvent(DAC960_Controller_T * Controller,DAC960_V2_Event_T * Event)4386 static void DAC960_V2_ReportEvent(DAC960_Controller_T *Controller,
4387 DAC960_V2_Event_T *Event)
4388 {
4389 DAC960_SCSI_RequestSense_T *RequestSense =
4390 (DAC960_SCSI_RequestSense_T *) &Event->RequestSenseData;
4391 unsigned char MessageBuffer[DAC960_LineBufferSize];
4392 static struct { int EventCode; unsigned char *EventMessage; } EventList[] =
4393 { /* Physical Device Events (0x0000 - 0x007F) */
4394 { 0x0001, "P Online" },
4395 { 0x0002, "P Standby" },
4396 { 0x0005, "P Automatic Rebuild Started" },
4397 { 0x0006, "P Manual Rebuild Started" },
4398 { 0x0007, "P Rebuild Completed" },
4399 { 0x0008, "P Rebuild Cancelled" },
4400 { 0x0009, "P Rebuild Failed for Unknown Reasons" },
4401 { 0x000A, "P Rebuild Failed due to New Physical Device" },
4402 { 0x000B, "P Rebuild Failed due to Logical Drive Failure" },
4403 { 0x000C, "S Offline" },
4404 { 0x000D, "P Found" },
4405 { 0x000E, "P Removed" },
4406 { 0x000F, "P Unconfigured" },
4407 { 0x0010, "P Expand Capacity Started" },
4408 { 0x0011, "P Expand Capacity Completed" },
4409 { 0x0012, "P Expand Capacity Failed" },
4410 { 0x0013, "P Command Timed Out" },
4411 { 0x0014, "P Command Aborted" },
4412 { 0x0015, "P Command Retried" },
4413 { 0x0016, "P Parity Error" },
4414 { 0x0017, "P Soft Error" },
4415 { 0x0018, "P Miscellaneous Error" },
4416 { 0x0019, "P Reset" },
4417 { 0x001A, "P Active Spare Found" },
4418 { 0x001B, "P Warm Spare Found" },
4419 { 0x001C, "S Sense Data Received" },
4420 { 0x001D, "P Initialization Started" },
4421 { 0x001E, "P Initialization Completed" },
4422 { 0x001F, "P Initialization Failed" },
4423 { 0x0020, "P Initialization Cancelled" },
4424 { 0x0021, "P Failed because Write Recovery Failed" },
4425 { 0x0022, "P Failed because SCSI Bus Reset Failed" },
4426 { 0x0023, "P Failed because of Double Check Condition" },
4427 { 0x0024, "P Failed because Device Cannot Be Accessed" },
4428 { 0x0025, "P Failed because of Gross Error on SCSI Processor" },
4429 { 0x0026, "P Failed because of Bad Tag from Device" },
4430 { 0x0027, "P Failed because of Command Timeout" },
4431 { 0x0028, "P Failed because of System Reset" },
4432 { 0x0029, "P Failed because of Busy Status or Parity Error" },
4433 { 0x002A, "P Failed because Host Set Device to Failed State" },
4434 { 0x002B, "P Failed because of Selection Timeout" },
4435 { 0x002C, "P Failed because of SCSI Bus Phase Error" },
4436 { 0x002D, "P Failed because Device Returned Unknown Status" },
4437 { 0x002E, "P Failed because Device Not Ready" },
4438 { 0x002F, "P Failed because Device Not Found at Startup" },
4439 { 0x0030, "P Failed because COD Write Operation Failed" },
4440 { 0x0031, "P Failed because BDT Write Operation Failed" },
4441 { 0x0039, "P Missing at Startup" },
4442 { 0x003A, "P Start Rebuild Failed due to Physical Drive Too Small" },
4443 { 0x003C, "P Temporarily Offline Device Automatically Made Online" },
4444 { 0x003D, "P Standby Rebuild Started" },
4445 /* Logical Device Events (0x0080 - 0x00FF) */
4446 { 0x0080, "M Consistency Check Started" },
4447 { 0x0081, "M Consistency Check Completed" },
4448 { 0x0082, "M Consistency Check Cancelled" },
4449 { 0x0083, "M Consistency Check Completed With Errors" },
4450 { 0x0084, "M Consistency Check Failed due to Logical Drive Failure" },
4451 { 0x0085, "M Consistency Check Failed due to Physical Device Failure" },
4452 { 0x0086, "L Offline" },
4453 { 0x0087, "L Critical" },
4454 { 0x0088, "L Online" },
4455 { 0x0089, "M Automatic Rebuild Started" },
4456 { 0x008A, "M Manual Rebuild Started" },
4457 { 0x008B, "M Rebuild Completed" },
4458 { 0x008C, "M Rebuild Cancelled" },
4459 { 0x008D, "M Rebuild Failed for Unknown Reasons" },
4460 { 0x008E, "M Rebuild Failed due to New Physical Device" },
4461 { 0x008F, "M Rebuild Failed due to Logical Drive Failure" },
4462 { 0x0090, "M Initialization Started" },
4463 { 0x0091, "M Initialization Completed" },
4464 { 0x0092, "M Initialization Cancelled" },
4465 { 0x0093, "M Initialization Failed" },
4466 { 0x0094, "L Found" },
4467 { 0x0095, "L Deleted" },
4468 { 0x0096, "M Expand Capacity Started" },
4469 { 0x0097, "M Expand Capacity Completed" },
4470 { 0x0098, "M Expand Capacity Failed" },
4471 { 0x0099, "L Bad Block Found" },
4472 { 0x009A, "L Size Changed" },
4473 { 0x009B, "L Type Changed" },
4474 { 0x009C, "L Bad Data Block Found" },
4475 { 0x009E, "L Read of Data Block in BDT" },
4476 { 0x009F, "L Write Back Data for Disk Block Lost" },
4477 { 0x00A0, "L Temporarily Offline RAID-5/3 Drive Made Online" },
4478 { 0x00A1, "L Temporarily Offline RAID-6/1/0/7 Drive Made Online" },
4479 { 0x00A2, "L Standby Rebuild Started" },
4480 /* Fault Management Events (0x0100 - 0x017F) */
4481 { 0x0140, "E Fan %d Failed" },
4482 { 0x0141, "E Fan %d OK" },
4483 { 0x0142, "E Fan %d Not Present" },
4484 { 0x0143, "E Power Supply %d Failed" },
4485 { 0x0144, "E Power Supply %d OK" },
4486 { 0x0145, "E Power Supply %d Not Present" },
4487 { 0x0146, "E Temperature Sensor %d Temperature Exceeds Safe Limit" },
4488 { 0x0147, "E Temperature Sensor %d Temperature Exceeds Working Limit" },
4489 { 0x0148, "E Temperature Sensor %d Temperature Normal" },
4490 { 0x0149, "E Temperature Sensor %d Not Present" },
4491 { 0x014A, "E Enclosure Management Unit %d Access Critical" },
4492 { 0x014B, "E Enclosure Management Unit %d Access OK" },
4493 { 0x014C, "E Enclosure Management Unit %d Access Offline" },
4494 /* Controller Events (0x0180 - 0x01FF) */
4495 { 0x0181, "C Cache Write Back Error" },
4496 { 0x0188, "C Battery Backup Unit Found" },
4497 { 0x0189, "C Battery Backup Unit Charge Level Low" },
4498 { 0x018A, "C Battery Backup Unit Charge Level OK" },
4499 { 0x0193, "C Installation Aborted" },
4500 { 0x0195, "C Battery Backup Unit Physically Removed" },
4501 { 0x0196, "C Memory Error During Warm Boot" },
4502 { 0x019E, "C Memory Soft ECC Error Corrected" },
4503 { 0x019F, "C Memory Hard ECC Error Corrected" },
4504 { 0x01A2, "C Battery Backup Unit Failed" },
4505 { 0x01AB, "C Mirror Race Recovery Failed" },
4506 { 0x01AC, "C Mirror Race on Critical Drive" },
4507 /* Controller Internal Processor Events */
4508 { 0x0380, "C Internal Controller Hung" },
4509 { 0x0381, "C Internal Controller Firmware Breakpoint" },
4510 { 0x0390, "C Internal Controller i960 Processor Specific Error" },
4511 { 0x03A0, "C Internal Controller StrongARM Processor Specific Error" },
4512 { 0, "" } };
4513 int EventListIndex = 0, EventCode;
4514 unsigned char EventType, *EventMessage;
4515 if (Event->EventCode == 0x1C &&
4516 RequestSense->SenseKey == DAC960_SenseKey_VendorSpecific &&
4517 (RequestSense->AdditionalSenseCode == 0x80 ||
4518 RequestSense->AdditionalSenseCode == 0x81))
4519 Event->EventCode = ((RequestSense->AdditionalSenseCode - 0x80) << 8) |
4520 RequestSense->AdditionalSenseCodeQualifier;
4521 while (true)
4522 {
4523 EventCode = EventList[EventListIndex].EventCode;
4524 if (EventCode == Event->EventCode || EventCode == 0) break;
4525 EventListIndex++;
4526 }
4527 EventType = EventList[EventListIndex].EventMessage[0];
4528 EventMessage = &EventList[EventListIndex].EventMessage[2];
4529 if (EventCode == 0)
4530 {
4531 DAC960_Critical("Unknown Controller Event Code %04X\n",
4532 Controller, Event->EventCode);
4533 return;
4534 }
4535 switch (EventType)
4536 {
4537 case 'P':
4538 DAC960_Critical("Physical Device %d:%d %s\n", Controller,
4539 Event->Channel, Event->TargetID, EventMessage);
4540 break;
4541 case 'L':
4542 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) %s\n", Controller,
4543 Event->LogicalUnit, Controller->ControllerNumber,
4544 Event->LogicalUnit, EventMessage);
4545 break;
4546 case 'M':
4547 DAC960_Progress("Logical Drive %d (/dev/rd/c%dd%d) %s\n", Controller,
4548 Event->LogicalUnit, Controller->ControllerNumber,
4549 Event->LogicalUnit, EventMessage);
4550 break;
4551 case 'S':
4552 if (RequestSense->SenseKey == DAC960_SenseKey_NoSense ||
4553 (RequestSense->SenseKey == DAC960_SenseKey_NotReady &&
4554 RequestSense->AdditionalSenseCode == 0x04 &&
4555 (RequestSense->AdditionalSenseCodeQualifier == 0x01 ||
4556 RequestSense->AdditionalSenseCodeQualifier == 0x02)))
4557 break;
4558 DAC960_Critical("Physical Device %d:%d %s\n", Controller,
4559 Event->Channel, Event->TargetID, EventMessage);
4560 DAC960_Critical("Physical Device %d:%d Request Sense: "
4561 "Sense Key = %X, ASC = %02X, ASCQ = %02X\n",
4562 Controller,
4563 Event->Channel,
4564 Event->TargetID,
4565 RequestSense->SenseKey,
4566 RequestSense->AdditionalSenseCode,
4567 RequestSense->AdditionalSenseCodeQualifier);
4568 DAC960_Critical("Physical Device %d:%d Request Sense: "
4569 "Information = %02X%02X%02X%02X "
4570 "%02X%02X%02X%02X\n",
4571 Controller,
4572 Event->Channel,
4573 Event->TargetID,
4574 RequestSense->Information[0],
4575 RequestSense->Information[1],
4576 RequestSense->Information[2],
4577 RequestSense->Information[3],
4578 RequestSense->CommandSpecificInformation[0],
4579 RequestSense->CommandSpecificInformation[1],
4580 RequestSense->CommandSpecificInformation[2],
4581 RequestSense->CommandSpecificInformation[3]);
4582 break;
4583 case 'E':
4584 if (Controller->SuppressEnclosureMessages) break;
4585 sprintf(MessageBuffer, EventMessage, Event->LogicalUnit);
4586 DAC960_Critical("Enclosure %d %s\n", Controller,
4587 Event->TargetID, MessageBuffer);
4588 break;
4589 case 'C':
4590 DAC960_Critical("Controller %s\n", Controller, EventMessage);
4591 break;
4592 default:
4593 DAC960_Critical("Unknown Controller Event Code %04X\n",
4594 Controller, Event->EventCode);
4595 break;
4596 }
4597 }
4598
4599
4600 /*
4601 DAC960_V2_ReportProgress prints an appropriate progress message for
4602 Logical Device Long Operations.
4603 */
4604
DAC960_V2_ReportProgress(DAC960_Controller_T * Controller,unsigned char * MessageString,unsigned int LogicalDeviceNumber,unsigned long BlocksCompleted,unsigned long LogicalDeviceSize)4605 static void DAC960_V2_ReportProgress(DAC960_Controller_T *Controller,
4606 unsigned char *MessageString,
4607 unsigned int LogicalDeviceNumber,
4608 unsigned long BlocksCompleted,
4609 unsigned long LogicalDeviceSize)
4610 {
4611 Controller->EphemeralProgressMessage = true;
4612 DAC960_Progress("%s in Progress: Logical Drive %d (/dev/rd/c%dd%d) "
4613 "%d%% completed\n", Controller,
4614 MessageString,
4615 LogicalDeviceNumber,
4616 Controller->ControllerNumber,
4617 LogicalDeviceNumber,
4618 (100 * (BlocksCompleted >> 7)) / (LogicalDeviceSize >> 7));
4619 Controller->EphemeralProgressMessage = false;
4620 }
4621
4622
4623 /*
4624 DAC960_V2_ProcessCompletedCommand performs completion processing for Command
4625 for DAC960 V2 Firmware Controllers.
4626 */
4627
DAC960_V2_ProcessCompletedCommand(DAC960_Command_T * Command)4628 static void DAC960_V2_ProcessCompletedCommand(DAC960_Command_T *Command)
4629 {
4630 DAC960_Controller_T *Controller = Command->Controller;
4631 DAC960_CommandType_T CommandType = Command->CommandType;
4632 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
4633 DAC960_V2_IOCTL_Opcode_T IOCTLOpcode = CommandMailbox->Common.IOCTL_Opcode;
4634 DAC960_V2_CommandOpcode_T CommandOpcode = CommandMailbox->SCSI_10.CommandOpcode;
4635 DAC960_V2_CommandStatus_T CommandStatus = Command->V2.CommandStatus;
4636
4637 if (CommandType == DAC960_ReadCommand ||
4638 CommandType == DAC960_WriteCommand)
4639 {
4640
4641 #ifdef FORCE_RETRY_DEBUG
4642 CommandStatus = DAC960_V2_AbormalCompletion;
4643 #endif
4644 Command->V2.RequestSense->SenseKey = DAC960_SenseKey_MediumError;
4645
4646 if (CommandStatus == DAC960_V2_NormalCompletion) {
4647
4648 if (!DAC960_ProcessCompletedRequest(Command, true))
4649 BUG();
4650
4651 } else if (Command->V2.RequestSense->SenseKey == DAC960_SenseKey_MediumError)
4652 {
4653 /*
4654 * break the command down into pieces and resubmit each
4655 * piece, hoping that some of them will succeed.
4656 */
4657 DAC960_queue_partial_rw(Command);
4658 return;
4659 }
4660 else
4661 {
4662 if (Command->V2.RequestSense->SenseKey != DAC960_SenseKey_NotReady)
4663 DAC960_V2_ReadWriteError(Command);
4664 /*
4665 Perform completion processing for all buffers in this I/O Request.
4666 */
4667 (void)DAC960_ProcessCompletedRequest(Command, false);
4668 }
4669 }
4670 else if (CommandType == DAC960_ReadRetryCommand ||
4671 CommandType == DAC960_WriteRetryCommand)
4672 {
4673 bool normal_completion;
4674
4675 #ifdef FORCE_RETRY_FAILURE_DEBUG
4676 static int retry_count = 1;
4677 #endif
4678 /*
4679 Perform completion processing for the portion that was
4680 retried, and submit the next portion, if any.
4681 */
4682 normal_completion = true;
4683 if (CommandStatus != DAC960_V2_NormalCompletion) {
4684 normal_completion = false;
4685 if (Command->V2.RequestSense->SenseKey != DAC960_SenseKey_NotReady)
4686 DAC960_V2_ReadWriteError(Command);
4687 }
4688
4689 #ifdef FORCE_RETRY_FAILURE_DEBUG
4690 if (!(++retry_count % 10000)) {
4691 printk("V2 error retry failure test\n");
4692 normal_completion = false;
4693 DAC960_V2_ReadWriteError(Command);
4694 }
4695 #endif
4696
4697 if (!DAC960_ProcessCompletedRequest(Command, normal_completion)) {
4698 DAC960_queue_partial_rw(Command);
4699 return;
4700 }
4701 }
4702 else if (CommandType == DAC960_MonitoringCommand)
4703 {
4704 if (Controller->ShutdownMonitoringTimer)
4705 return;
4706 if (IOCTLOpcode == DAC960_V2_GetControllerInfo)
4707 {
4708 DAC960_V2_ControllerInfo_T *NewControllerInfo =
4709 Controller->V2.NewControllerInformation;
4710 DAC960_V2_ControllerInfo_T *ControllerInfo =
4711 &Controller->V2.ControllerInformation;
4712 Controller->LogicalDriveCount =
4713 NewControllerInfo->LogicalDevicesPresent;
4714 Controller->V2.NeedLogicalDeviceInformation = true;
4715 Controller->V2.NeedPhysicalDeviceInformation = true;
4716 Controller->V2.StartLogicalDeviceInformationScan = true;
4717 Controller->V2.StartPhysicalDeviceInformationScan = true;
4718 Controller->MonitoringAlertMode =
4719 (NewControllerInfo->LogicalDevicesCritical > 0 ||
4720 NewControllerInfo->LogicalDevicesOffline > 0 ||
4721 NewControllerInfo->PhysicalDisksCritical > 0 ||
4722 NewControllerInfo->PhysicalDisksOffline > 0);
4723 memcpy(ControllerInfo, NewControllerInfo,
4724 sizeof(DAC960_V2_ControllerInfo_T));
4725 }
4726 else if (IOCTLOpcode == DAC960_V2_GetEvent)
4727 {
4728 if (CommandStatus == DAC960_V2_NormalCompletion) {
4729 DAC960_V2_ReportEvent(Controller, Controller->V2.Event);
4730 }
4731 Controller->V2.NextEventSequenceNumber++;
4732 }
4733 else if (IOCTLOpcode == DAC960_V2_GetPhysicalDeviceInfoValid &&
4734 CommandStatus == DAC960_V2_NormalCompletion)
4735 {
4736 DAC960_V2_PhysicalDeviceInfo_T *NewPhysicalDeviceInfo =
4737 Controller->V2.NewPhysicalDeviceInformation;
4738 unsigned int PhysicalDeviceIndex = Controller->V2.PhysicalDeviceIndex;
4739 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
4740 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
4741 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
4742 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
4743 unsigned int DeviceIndex;
4744 while (PhysicalDeviceInfo != NULL &&
4745 (NewPhysicalDeviceInfo->Channel >
4746 PhysicalDeviceInfo->Channel ||
4747 (NewPhysicalDeviceInfo->Channel ==
4748 PhysicalDeviceInfo->Channel &&
4749 (NewPhysicalDeviceInfo->TargetID >
4750 PhysicalDeviceInfo->TargetID ||
4751 (NewPhysicalDeviceInfo->TargetID ==
4752 PhysicalDeviceInfo->TargetID &&
4753 NewPhysicalDeviceInfo->LogicalUnit >
4754 PhysicalDeviceInfo->LogicalUnit)))))
4755 {
4756 DAC960_Critical("Physical Device %d:%d No Longer Exists\n",
4757 Controller,
4758 PhysicalDeviceInfo->Channel,
4759 PhysicalDeviceInfo->TargetID);
4760 Controller->V2.PhysicalDeviceInformation
4761 [PhysicalDeviceIndex] = NULL;
4762 Controller->V2.InquiryUnitSerialNumber
4763 [PhysicalDeviceIndex] = NULL;
4764 kfree(PhysicalDeviceInfo);
4765 kfree(InquiryUnitSerialNumber);
4766 for (DeviceIndex = PhysicalDeviceIndex;
4767 DeviceIndex < DAC960_V2_MaxPhysicalDevices - 1;
4768 DeviceIndex++)
4769 {
4770 Controller->V2.PhysicalDeviceInformation[DeviceIndex] =
4771 Controller->V2.PhysicalDeviceInformation[DeviceIndex+1];
4772 Controller->V2.InquiryUnitSerialNumber[DeviceIndex] =
4773 Controller->V2.InquiryUnitSerialNumber[DeviceIndex+1];
4774 }
4775 Controller->V2.PhysicalDeviceInformation
4776 [DAC960_V2_MaxPhysicalDevices-1] = NULL;
4777 Controller->V2.InquiryUnitSerialNumber
4778 [DAC960_V2_MaxPhysicalDevices-1] = NULL;
4779 PhysicalDeviceInfo =
4780 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
4781 InquiryUnitSerialNumber =
4782 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
4783 }
4784 if (PhysicalDeviceInfo == NULL ||
4785 (NewPhysicalDeviceInfo->Channel !=
4786 PhysicalDeviceInfo->Channel) ||
4787 (NewPhysicalDeviceInfo->TargetID !=
4788 PhysicalDeviceInfo->TargetID) ||
4789 (NewPhysicalDeviceInfo->LogicalUnit !=
4790 PhysicalDeviceInfo->LogicalUnit))
4791 {
4792 PhysicalDeviceInfo =
4793 kmalloc(sizeof(DAC960_V2_PhysicalDeviceInfo_T), GFP_ATOMIC);
4794 InquiryUnitSerialNumber =
4795 kmalloc(sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
4796 GFP_ATOMIC);
4797 if (InquiryUnitSerialNumber == NULL ||
4798 PhysicalDeviceInfo == NULL)
4799 {
4800 kfree(InquiryUnitSerialNumber);
4801 InquiryUnitSerialNumber = NULL;
4802 kfree(PhysicalDeviceInfo);
4803 PhysicalDeviceInfo = NULL;
4804 }
4805 DAC960_Critical("Physical Device %d:%d Now Exists%s\n",
4806 Controller,
4807 NewPhysicalDeviceInfo->Channel,
4808 NewPhysicalDeviceInfo->TargetID,
4809 (PhysicalDeviceInfo != NULL
4810 ? "" : " - Allocation Failed"));
4811 if (PhysicalDeviceInfo != NULL)
4812 {
4813 memset(PhysicalDeviceInfo, 0,
4814 sizeof(DAC960_V2_PhysicalDeviceInfo_T));
4815 PhysicalDeviceInfo->PhysicalDeviceState =
4816 DAC960_V2_Device_InvalidState;
4817 memset(InquiryUnitSerialNumber, 0,
4818 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
4819 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
4820 for (DeviceIndex = DAC960_V2_MaxPhysicalDevices - 1;
4821 DeviceIndex > PhysicalDeviceIndex;
4822 DeviceIndex--)
4823 {
4824 Controller->V2.PhysicalDeviceInformation[DeviceIndex] =
4825 Controller->V2.PhysicalDeviceInformation[DeviceIndex-1];
4826 Controller->V2.InquiryUnitSerialNumber[DeviceIndex] =
4827 Controller->V2.InquiryUnitSerialNumber[DeviceIndex-1];
4828 }
4829 Controller->V2.PhysicalDeviceInformation
4830 [PhysicalDeviceIndex] =
4831 PhysicalDeviceInfo;
4832 Controller->V2.InquiryUnitSerialNumber
4833 [PhysicalDeviceIndex] =
4834 InquiryUnitSerialNumber;
4835 Controller->V2.NeedDeviceSerialNumberInformation = true;
4836 }
4837 }
4838 if (PhysicalDeviceInfo != NULL)
4839 {
4840 if (NewPhysicalDeviceInfo->PhysicalDeviceState !=
4841 PhysicalDeviceInfo->PhysicalDeviceState)
4842 DAC960_Critical(
4843 "Physical Device %d:%d is now %s\n", Controller,
4844 NewPhysicalDeviceInfo->Channel,
4845 NewPhysicalDeviceInfo->TargetID,
4846 (NewPhysicalDeviceInfo->PhysicalDeviceState
4847 == DAC960_V2_Device_Online
4848 ? "ONLINE"
4849 : NewPhysicalDeviceInfo->PhysicalDeviceState
4850 == DAC960_V2_Device_Rebuild
4851 ? "REBUILD"
4852 : NewPhysicalDeviceInfo->PhysicalDeviceState
4853 == DAC960_V2_Device_Missing
4854 ? "MISSING"
4855 : NewPhysicalDeviceInfo->PhysicalDeviceState
4856 == DAC960_V2_Device_Critical
4857 ? "CRITICAL"
4858 : NewPhysicalDeviceInfo->PhysicalDeviceState
4859 == DAC960_V2_Device_Dead
4860 ? "DEAD"
4861 : NewPhysicalDeviceInfo->PhysicalDeviceState
4862 == DAC960_V2_Device_SuspectedDead
4863 ? "SUSPECTED-DEAD"
4864 : NewPhysicalDeviceInfo->PhysicalDeviceState
4865 == DAC960_V2_Device_CommandedOffline
4866 ? "COMMANDED-OFFLINE"
4867 : NewPhysicalDeviceInfo->PhysicalDeviceState
4868 == DAC960_V2_Device_Standby
4869 ? "STANDBY" : "UNKNOWN"));
4870 if ((NewPhysicalDeviceInfo->ParityErrors !=
4871 PhysicalDeviceInfo->ParityErrors) ||
4872 (NewPhysicalDeviceInfo->SoftErrors !=
4873 PhysicalDeviceInfo->SoftErrors) ||
4874 (NewPhysicalDeviceInfo->HardErrors !=
4875 PhysicalDeviceInfo->HardErrors) ||
4876 (NewPhysicalDeviceInfo->MiscellaneousErrors !=
4877 PhysicalDeviceInfo->MiscellaneousErrors) ||
4878 (NewPhysicalDeviceInfo->CommandTimeouts !=
4879 PhysicalDeviceInfo->CommandTimeouts) ||
4880 (NewPhysicalDeviceInfo->Retries !=
4881 PhysicalDeviceInfo->Retries) ||
4882 (NewPhysicalDeviceInfo->Aborts !=
4883 PhysicalDeviceInfo->Aborts) ||
4884 (NewPhysicalDeviceInfo->PredictedFailuresDetected !=
4885 PhysicalDeviceInfo->PredictedFailuresDetected))
4886 {
4887 DAC960_Critical("Physical Device %d:%d Errors: "
4888 "Parity = %d, Soft = %d, "
4889 "Hard = %d, Misc = %d\n",
4890 Controller,
4891 NewPhysicalDeviceInfo->Channel,
4892 NewPhysicalDeviceInfo->TargetID,
4893 NewPhysicalDeviceInfo->ParityErrors,
4894 NewPhysicalDeviceInfo->SoftErrors,
4895 NewPhysicalDeviceInfo->HardErrors,
4896 NewPhysicalDeviceInfo->MiscellaneousErrors);
4897 DAC960_Critical("Physical Device %d:%d Errors: "
4898 "Timeouts = %d, Retries = %d, "
4899 "Aborts = %d, Predicted = %d\n",
4900 Controller,
4901 NewPhysicalDeviceInfo->Channel,
4902 NewPhysicalDeviceInfo->TargetID,
4903 NewPhysicalDeviceInfo->CommandTimeouts,
4904 NewPhysicalDeviceInfo->Retries,
4905 NewPhysicalDeviceInfo->Aborts,
4906 NewPhysicalDeviceInfo
4907 ->PredictedFailuresDetected);
4908 }
4909 if ((PhysicalDeviceInfo->PhysicalDeviceState
4910 == DAC960_V2_Device_Dead ||
4911 PhysicalDeviceInfo->PhysicalDeviceState
4912 == DAC960_V2_Device_InvalidState) &&
4913 NewPhysicalDeviceInfo->PhysicalDeviceState
4914 != DAC960_V2_Device_Dead)
4915 Controller->V2.NeedDeviceSerialNumberInformation = true;
4916 memcpy(PhysicalDeviceInfo, NewPhysicalDeviceInfo,
4917 sizeof(DAC960_V2_PhysicalDeviceInfo_T));
4918 }
4919 NewPhysicalDeviceInfo->LogicalUnit++;
4920 Controller->V2.PhysicalDeviceIndex++;
4921 }
4922 else if (IOCTLOpcode == DAC960_V2_GetPhysicalDeviceInfoValid)
4923 {
4924 unsigned int DeviceIndex;
4925 for (DeviceIndex = Controller->V2.PhysicalDeviceIndex;
4926 DeviceIndex < DAC960_V2_MaxPhysicalDevices;
4927 DeviceIndex++)
4928 {
4929 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
4930 Controller->V2.PhysicalDeviceInformation[DeviceIndex];
4931 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
4932 Controller->V2.InquiryUnitSerialNumber[DeviceIndex];
4933 if (PhysicalDeviceInfo == NULL) break;
4934 DAC960_Critical("Physical Device %d:%d No Longer Exists\n",
4935 Controller,
4936 PhysicalDeviceInfo->Channel,
4937 PhysicalDeviceInfo->TargetID);
4938 Controller->V2.PhysicalDeviceInformation[DeviceIndex] = NULL;
4939 Controller->V2.InquiryUnitSerialNumber[DeviceIndex] = NULL;
4940 kfree(PhysicalDeviceInfo);
4941 kfree(InquiryUnitSerialNumber);
4942 }
4943 Controller->V2.NeedPhysicalDeviceInformation = false;
4944 }
4945 else if (IOCTLOpcode == DAC960_V2_GetLogicalDeviceInfoValid &&
4946 CommandStatus == DAC960_V2_NormalCompletion)
4947 {
4948 DAC960_V2_LogicalDeviceInfo_T *NewLogicalDeviceInfo =
4949 Controller->V2.NewLogicalDeviceInformation;
4950 unsigned short LogicalDeviceNumber =
4951 NewLogicalDeviceInfo->LogicalDeviceNumber;
4952 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
4953 Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber];
4954 if (LogicalDeviceInfo == NULL)
4955 {
4956 DAC960_V2_PhysicalDevice_T PhysicalDevice;
4957 PhysicalDevice.Controller = 0;
4958 PhysicalDevice.Channel = NewLogicalDeviceInfo->Channel;
4959 PhysicalDevice.TargetID = NewLogicalDeviceInfo->TargetID;
4960 PhysicalDevice.LogicalUnit = NewLogicalDeviceInfo->LogicalUnit;
4961 Controller->V2.LogicalDriveToVirtualDevice[LogicalDeviceNumber] =
4962 PhysicalDevice;
4963 LogicalDeviceInfo = kmalloc(sizeof(DAC960_V2_LogicalDeviceInfo_T),
4964 GFP_ATOMIC);
4965 Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber] =
4966 LogicalDeviceInfo;
4967 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
4968 "Now Exists%s\n", Controller,
4969 LogicalDeviceNumber,
4970 Controller->ControllerNumber,
4971 LogicalDeviceNumber,
4972 (LogicalDeviceInfo != NULL
4973 ? "" : " - Allocation Failed"));
4974 if (LogicalDeviceInfo != NULL)
4975 {
4976 memset(LogicalDeviceInfo, 0,
4977 sizeof(DAC960_V2_LogicalDeviceInfo_T));
4978 DAC960_ComputeGenericDiskInfo(Controller);
4979 }
4980 }
4981 if (LogicalDeviceInfo != NULL)
4982 {
4983 unsigned long LogicalDeviceSize =
4984 NewLogicalDeviceInfo->ConfigurableDeviceSize;
4985 if (NewLogicalDeviceInfo->LogicalDeviceState !=
4986 LogicalDeviceInfo->LogicalDeviceState)
4987 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
4988 "is now %s\n", Controller,
4989 LogicalDeviceNumber,
4990 Controller->ControllerNumber,
4991 LogicalDeviceNumber,
4992 (NewLogicalDeviceInfo->LogicalDeviceState
4993 == DAC960_V2_LogicalDevice_Online
4994 ? "ONLINE"
4995 : NewLogicalDeviceInfo->LogicalDeviceState
4996 == DAC960_V2_LogicalDevice_Critical
4997 ? "CRITICAL" : "OFFLINE"));
4998 if ((NewLogicalDeviceInfo->SoftErrors !=
4999 LogicalDeviceInfo->SoftErrors) ||
5000 (NewLogicalDeviceInfo->CommandsFailed !=
5001 LogicalDeviceInfo->CommandsFailed) ||
5002 (NewLogicalDeviceInfo->DeferredWriteErrors !=
5003 LogicalDeviceInfo->DeferredWriteErrors))
5004 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) Errors: "
5005 "Soft = %d, Failed = %d, Deferred Write = %d\n",
5006 Controller, LogicalDeviceNumber,
5007 Controller->ControllerNumber,
5008 LogicalDeviceNumber,
5009 NewLogicalDeviceInfo->SoftErrors,
5010 NewLogicalDeviceInfo->CommandsFailed,
5011 NewLogicalDeviceInfo->DeferredWriteErrors);
5012 if (NewLogicalDeviceInfo->ConsistencyCheckInProgress)
5013 DAC960_V2_ReportProgress(Controller,
5014 "Consistency Check",
5015 LogicalDeviceNumber,
5016 NewLogicalDeviceInfo
5017 ->ConsistencyCheckBlockNumber,
5018 LogicalDeviceSize);
5019 else if (NewLogicalDeviceInfo->RebuildInProgress)
5020 DAC960_V2_ReportProgress(Controller,
5021 "Rebuild",
5022 LogicalDeviceNumber,
5023 NewLogicalDeviceInfo
5024 ->RebuildBlockNumber,
5025 LogicalDeviceSize);
5026 else if (NewLogicalDeviceInfo->BackgroundInitializationInProgress)
5027 DAC960_V2_ReportProgress(Controller,
5028 "Background Initialization",
5029 LogicalDeviceNumber,
5030 NewLogicalDeviceInfo
5031 ->BackgroundInitializationBlockNumber,
5032 LogicalDeviceSize);
5033 else if (NewLogicalDeviceInfo->ForegroundInitializationInProgress)
5034 DAC960_V2_ReportProgress(Controller,
5035 "Foreground Initialization",
5036 LogicalDeviceNumber,
5037 NewLogicalDeviceInfo
5038 ->ForegroundInitializationBlockNumber,
5039 LogicalDeviceSize);
5040 else if (NewLogicalDeviceInfo->DataMigrationInProgress)
5041 DAC960_V2_ReportProgress(Controller,
5042 "Data Migration",
5043 LogicalDeviceNumber,
5044 NewLogicalDeviceInfo
5045 ->DataMigrationBlockNumber,
5046 LogicalDeviceSize);
5047 else if (NewLogicalDeviceInfo->PatrolOperationInProgress)
5048 DAC960_V2_ReportProgress(Controller,
5049 "Patrol Operation",
5050 LogicalDeviceNumber,
5051 NewLogicalDeviceInfo
5052 ->PatrolOperationBlockNumber,
5053 LogicalDeviceSize);
5054 if (LogicalDeviceInfo->BackgroundInitializationInProgress &&
5055 !NewLogicalDeviceInfo->BackgroundInitializationInProgress)
5056 DAC960_Progress("Logical Drive %d (/dev/rd/c%dd%d) "
5057 "Background Initialization %s\n",
5058 Controller,
5059 LogicalDeviceNumber,
5060 Controller->ControllerNumber,
5061 LogicalDeviceNumber,
5062 (NewLogicalDeviceInfo->LogicalDeviceControl
5063 .LogicalDeviceInitialized
5064 ? "Completed" : "Failed"));
5065 memcpy(LogicalDeviceInfo, NewLogicalDeviceInfo,
5066 sizeof(DAC960_V2_LogicalDeviceInfo_T));
5067 }
5068 Controller->V2.LogicalDriveFoundDuringScan
5069 [LogicalDeviceNumber] = true;
5070 NewLogicalDeviceInfo->LogicalDeviceNumber++;
5071 }
5072 else if (IOCTLOpcode == DAC960_V2_GetLogicalDeviceInfoValid)
5073 {
5074 int LogicalDriveNumber;
5075 for (LogicalDriveNumber = 0;
5076 LogicalDriveNumber < DAC960_MaxLogicalDrives;
5077 LogicalDriveNumber++)
5078 {
5079 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
5080 Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
5081 if (LogicalDeviceInfo == NULL ||
5082 Controller->V2.LogicalDriveFoundDuringScan
5083 [LogicalDriveNumber])
5084 continue;
5085 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
5086 "No Longer Exists\n", Controller,
5087 LogicalDriveNumber,
5088 Controller->ControllerNumber,
5089 LogicalDriveNumber);
5090 Controller->V2.LogicalDeviceInformation
5091 [LogicalDriveNumber] = NULL;
5092 kfree(LogicalDeviceInfo);
5093 Controller->LogicalDriveInitiallyAccessible
5094 [LogicalDriveNumber] = false;
5095 DAC960_ComputeGenericDiskInfo(Controller);
5096 }
5097 Controller->V2.NeedLogicalDeviceInformation = false;
5098 }
5099 else if (CommandOpcode == DAC960_V2_SCSI_10_Passthru)
5100 {
5101 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
5102 Controller->V2.InquiryUnitSerialNumber[Controller->V2.PhysicalDeviceIndex - 1];
5103
5104 if (CommandStatus != DAC960_V2_NormalCompletion) {
5105 memset(InquiryUnitSerialNumber,
5106 0, sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
5107 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
5108 } else
5109 memcpy(InquiryUnitSerialNumber,
5110 Controller->V2.NewInquiryUnitSerialNumber,
5111 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
5112
5113 Controller->V2.NeedDeviceSerialNumberInformation = false;
5114 }
5115
5116 if (Controller->V2.HealthStatusBuffer->NextEventSequenceNumber
5117 - Controller->V2.NextEventSequenceNumber > 0)
5118 {
5119 CommandMailbox->GetEvent.CommandOpcode = DAC960_V2_IOCTL;
5120 CommandMailbox->GetEvent.DataTransferSize = sizeof(DAC960_V2_Event_T);
5121 CommandMailbox->GetEvent.EventSequenceNumberHigh16 =
5122 Controller->V2.NextEventSequenceNumber >> 16;
5123 CommandMailbox->GetEvent.ControllerNumber = 0;
5124 CommandMailbox->GetEvent.IOCTL_Opcode =
5125 DAC960_V2_GetEvent;
5126 CommandMailbox->GetEvent.EventSequenceNumberLow16 =
5127 Controller->V2.NextEventSequenceNumber & 0xFFFF;
5128 CommandMailbox->GetEvent.DataTransferMemoryAddress
5129 .ScatterGatherSegments[0]
5130 .SegmentDataPointer =
5131 Controller->V2.EventDMA;
5132 CommandMailbox->GetEvent.DataTransferMemoryAddress
5133 .ScatterGatherSegments[0]
5134 .SegmentByteCount =
5135 CommandMailbox->GetEvent.DataTransferSize;
5136 DAC960_QueueCommand(Command);
5137 return;
5138 }
5139 if (Controller->V2.NeedPhysicalDeviceInformation)
5140 {
5141 if (Controller->V2.NeedDeviceSerialNumberInformation)
5142 {
5143 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
5144 Controller->V2.NewInquiryUnitSerialNumber;
5145 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
5146
5147 DAC960_V2_ConstructNewUnitSerialNumber(Controller, CommandMailbox,
5148 Controller->V2.NewPhysicalDeviceInformation->Channel,
5149 Controller->V2.NewPhysicalDeviceInformation->TargetID,
5150 Controller->V2.NewPhysicalDeviceInformation->LogicalUnit - 1);
5151
5152
5153 DAC960_QueueCommand(Command);
5154 return;
5155 }
5156 if (Controller->V2.StartPhysicalDeviceInformationScan)
5157 {
5158 Controller->V2.PhysicalDeviceIndex = 0;
5159 Controller->V2.NewPhysicalDeviceInformation->Channel = 0;
5160 Controller->V2.NewPhysicalDeviceInformation->TargetID = 0;
5161 Controller->V2.NewPhysicalDeviceInformation->LogicalUnit = 0;
5162 Controller->V2.StartPhysicalDeviceInformationScan = false;
5163 }
5164 CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
5165 CommandMailbox->PhysicalDeviceInfo.DataTransferSize =
5166 sizeof(DAC960_V2_PhysicalDeviceInfo_T);
5167 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.LogicalUnit =
5168 Controller->V2.NewPhysicalDeviceInformation->LogicalUnit;
5169 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID =
5170 Controller->V2.NewPhysicalDeviceInformation->TargetID;
5171 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel =
5172 Controller->V2.NewPhysicalDeviceInformation->Channel;
5173 CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode =
5174 DAC960_V2_GetPhysicalDeviceInfoValid;
5175 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
5176 .ScatterGatherSegments[0]
5177 .SegmentDataPointer =
5178 Controller->V2.NewPhysicalDeviceInformationDMA;
5179 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
5180 .ScatterGatherSegments[0]
5181 .SegmentByteCount =
5182 CommandMailbox->PhysicalDeviceInfo.DataTransferSize;
5183 DAC960_QueueCommand(Command);
5184 return;
5185 }
5186 if (Controller->V2.NeedLogicalDeviceInformation)
5187 {
5188 if (Controller->V2.StartLogicalDeviceInformationScan)
5189 {
5190 int LogicalDriveNumber;
5191 for (LogicalDriveNumber = 0;
5192 LogicalDriveNumber < DAC960_MaxLogicalDrives;
5193 LogicalDriveNumber++)
5194 Controller->V2.LogicalDriveFoundDuringScan
5195 [LogicalDriveNumber] = false;
5196 Controller->V2.NewLogicalDeviceInformation->LogicalDeviceNumber = 0;
5197 Controller->V2.StartLogicalDeviceInformationScan = false;
5198 }
5199 CommandMailbox->LogicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
5200 CommandMailbox->LogicalDeviceInfo.DataTransferSize =
5201 sizeof(DAC960_V2_LogicalDeviceInfo_T);
5202 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
5203 Controller->V2.NewLogicalDeviceInformation->LogicalDeviceNumber;
5204 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode =
5205 DAC960_V2_GetLogicalDeviceInfoValid;
5206 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
5207 .ScatterGatherSegments[0]
5208 .SegmentDataPointer =
5209 Controller->V2.NewLogicalDeviceInformationDMA;
5210 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
5211 .ScatterGatherSegments[0]
5212 .SegmentByteCount =
5213 CommandMailbox->LogicalDeviceInfo.DataTransferSize;
5214 DAC960_QueueCommand(Command);
5215 return;
5216 }
5217 Controller->MonitoringTimerCount++;
5218 Controller->MonitoringTimer.expires =
5219 jiffies + DAC960_HealthStatusMonitoringInterval;
5220 add_timer(&Controller->MonitoringTimer);
5221 }
5222 if (CommandType == DAC960_ImmediateCommand)
5223 {
5224 complete(Command->Completion);
5225 Command->Completion = NULL;
5226 return;
5227 }
5228 if (CommandType == DAC960_QueuedCommand)
5229 {
5230 DAC960_V2_KernelCommand_T *KernelCommand = Command->V2.KernelCommand;
5231 KernelCommand->CommandStatus = CommandStatus;
5232 KernelCommand->RequestSenseLength = Command->V2.RequestSenseLength;
5233 KernelCommand->DataTransferLength = Command->V2.DataTransferResidue;
5234 Command->V2.KernelCommand = NULL;
5235 DAC960_DeallocateCommand(Command);
5236 KernelCommand->CompletionFunction(KernelCommand);
5237 return;
5238 }
5239 /*
5240 Queue a Status Monitoring Command to the Controller using the just
5241 completed Command if one was deferred previously due to lack of a
5242 free Command when the Monitoring Timer Function was called.
5243 */
5244 if (Controller->MonitoringCommandDeferred)
5245 {
5246 Controller->MonitoringCommandDeferred = false;
5247 DAC960_V2_QueueMonitoringCommand(Command);
5248 return;
5249 }
5250 /*
5251 Deallocate the Command.
5252 */
5253 DAC960_DeallocateCommand(Command);
5254 /*
5255 Wake up any processes waiting on a free Command.
5256 */
5257 wake_up(&Controller->CommandWaitQueue);
5258 }
5259
5260 /*
5261 DAC960_GEM_InterruptHandler handles hardware interrupts from DAC960 GEM Series
5262 Controllers.
5263 */
5264
DAC960_GEM_InterruptHandler(int IRQ_Channel,void * DeviceIdentifier)5265 static irqreturn_t DAC960_GEM_InterruptHandler(int IRQ_Channel,
5266 void *DeviceIdentifier)
5267 {
5268 DAC960_Controller_T *Controller = DeviceIdentifier;
5269 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5270 DAC960_V2_StatusMailbox_T *NextStatusMailbox;
5271 unsigned long flags;
5272
5273 spin_lock_irqsave(&Controller->queue_lock, flags);
5274 DAC960_GEM_AcknowledgeInterrupt(ControllerBaseAddress);
5275 NextStatusMailbox = Controller->V2.NextStatusMailbox;
5276 while (NextStatusMailbox->Fields.CommandIdentifier > 0)
5277 {
5278 DAC960_V2_CommandIdentifier_T CommandIdentifier =
5279 NextStatusMailbox->Fields.CommandIdentifier;
5280 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5281 Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5282 Command->V2.RequestSenseLength =
5283 NextStatusMailbox->Fields.RequestSenseLength;
5284 Command->V2.DataTransferResidue =
5285 NextStatusMailbox->Fields.DataTransferResidue;
5286 NextStatusMailbox->Words[0] = 0;
5287 if (++NextStatusMailbox > Controller->V2.LastStatusMailbox)
5288 NextStatusMailbox = Controller->V2.FirstStatusMailbox;
5289 DAC960_V2_ProcessCompletedCommand(Command);
5290 }
5291 Controller->V2.NextStatusMailbox = NextStatusMailbox;
5292 /*
5293 Attempt to remove additional I/O Requests from the Controller's
5294 I/O Request Queue and queue them to the Controller.
5295 */
5296 DAC960_ProcessRequest(Controller);
5297 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5298 return IRQ_HANDLED;
5299 }
5300
5301 /*
5302 DAC960_BA_InterruptHandler handles hardware interrupts from DAC960 BA Series
5303 Controllers.
5304 */
5305
DAC960_BA_InterruptHandler(int IRQ_Channel,void * DeviceIdentifier)5306 static irqreturn_t DAC960_BA_InterruptHandler(int IRQ_Channel,
5307 void *DeviceIdentifier)
5308 {
5309 DAC960_Controller_T *Controller = DeviceIdentifier;
5310 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5311 DAC960_V2_StatusMailbox_T *NextStatusMailbox;
5312 unsigned long flags;
5313
5314 spin_lock_irqsave(&Controller->queue_lock, flags);
5315 DAC960_BA_AcknowledgeInterrupt(ControllerBaseAddress);
5316 NextStatusMailbox = Controller->V2.NextStatusMailbox;
5317 while (NextStatusMailbox->Fields.CommandIdentifier > 0)
5318 {
5319 DAC960_V2_CommandIdentifier_T CommandIdentifier =
5320 NextStatusMailbox->Fields.CommandIdentifier;
5321 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5322 Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5323 Command->V2.RequestSenseLength =
5324 NextStatusMailbox->Fields.RequestSenseLength;
5325 Command->V2.DataTransferResidue =
5326 NextStatusMailbox->Fields.DataTransferResidue;
5327 NextStatusMailbox->Words[0] = 0;
5328 if (++NextStatusMailbox > Controller->V2.LastStatusMailbox)
5329 NextStatusMailbox = Controller->V2.FirstStatusMailbox;
5330 DAC960_V2_ProcessCompletedCommand(Command);
5331 }
5332 Controller->V2.NextStatusMailbox = NextStatusMailbox;
5333 /*
5334 Attempt to remove additional I/O Requests from the Controller's
5335 I/O Request Queue and queue them to the Controller.
5336 */
5337 DAC960_ProcessRequest(Controller);
5338 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5339 return IRQ_HANDLED;
5340 }
5341
5342
5343 /*
5344 DAC960_LP_InterruptHandler handles hardware interrupts from DAC960 LP Series
5345 Controllers.
5346 */
5347
DAC960_LP_InterruptHandler(int IRQ_Channel,void * DeviceIdentifier)5348 static irqreturn_t DAC960_LP_InterruptHandler(int IRQ_Channel,
5349 void *DeviceIdentifier)
5350 {
5351 DAC960_Controller_T *Controller = DeviceIdentifier;
5352 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5353 DAC960_V2_StatusMailbox_T *NextStatusMailbox;
5354 unsigned long flags;
5355
5356 spin_lock_irqsave(&Controller->queue_lock, flags);
5357 DAC960_LP_AcknowledgeInterrupt(ControllerBaseAddress);
5358 NextStatusMailbox = Controller->V2.NextStatusMailbox;
5359 while (NextStatusMailbox->Fields.CommandIdentifier > 0)
5360 {
5361 DAC960_V2_CommandIdentifier_T CommandIdentifier =
5362 NextStatusMailbox->Fields.CommandIdentifier;
5363 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5364 Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5365 Command->V2.RequestSenseLength =
5366 NextStatusMailbox->Fields.RequestSenseLength;
5367 Command->V2.DataTransferResidue =
5368 NextStatusMailbox->Fields.DataTransferResidue;
5369 NextStatusMailbox->Words[0] = 0;
5370 if (++NextStatusMailbox > Controller->V2.LastStatusMailbox)
5371 NextStatusMailbox = Controller->V2.FirstStatusMailbox;
5372 DAC960_V2_ProcessCompletedCommand(Command);
5373 }
5374 Controller->V2.NextStatusMailbox = NextStatusMailbox;
5375 /*
5376 Attempt to remove additional I/O Requests from the Controller's
5377 I/O Request Queue and queue them to the Controller.
5378 */
5379 DAC960_ProcessRequest(Controller);
5380 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5381 return IRQ_HANDLED;
5382 }
5383
5384
5385 /*
5386 DAC960_LA_InterruptHandler handles hardware interrupts from DAC960 LA Series
5387 Controllers.
5388 */
5389
DAC960_LA_InterruptHandler(int IRQ_Channel,void * DeviceIdentifier)5390 static irqreturn_t DAC960_LA_InterruptHandler(int IRQ_Channel,
5391 void *DeviceIdentifier)
5392 {
5393 DAC960_Controller_T *Controller = DeviceIdentifier;
5394 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5395 DAC960_V1_StatusMailbox_T *NextStatusMailbox;
5396 unsigned long flags;
5397
5398 spin_lock_irqsave(&Controller->queue_lock, flags);
5399 DAC960_LA_AcknowledgeInterrupt(ControllerBaseAddress);
5400 NextStatusMailbox = Controller->V1.NextStatusMailbox;
5401 while (NextStatusMailbox->Fields.Valid)
5402 {
5403 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5404 NextStatusMailbox->Fields.CommandIdentifier;
5405 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5406 Command->V1.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5407 NextStatusMailbox->Word = 0;
5408 if (++NextStatusMailbox > Controller->V1.LastStatusMailbox)
5409 NextStatusMailbox = Controller->V1.FirstStatusMailbox;
5410 DAC960_V1_ProcessCompletedCommand(Command);
5411 }
5412 Controller->V1.NextStatusMailbox = NextStatusMailbox;
5413 /*
5414 Attempt to remove additional I/O Requests from the Controller's
5415 I/O Request Queue and queue them to the Controller.
5416 */
5417 DAC960_ProcessRequest(Controller);
5418 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5419 return IRQ_HANDLED;
5420 }
5421
5422
5423 /*
5424 DAC960_PG_InterruptHandler handles hardware interrupts from DAC960 PG Series
5425 Controllers.
5426 */
5427
DAC960_PG_InterruptHandler(int IRQ_Channel,void * DeviceIdentifier)5428 static irqreturn_t DAC960_PG_InterruptHandler(int IRQ_Channel,
5429 void *DeviceIdentifier)
5430 {
5431 DAC960_Controller_T *Controller = DeviceIdentifier;
5432 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5433 DAC960_V1_StatusMailbox_T *NextStatusMailbox;
5434 unsigned long flags;
5435
5436 spin_lock_irqsave(&Controller->queue_lock, flags);
5437 DAC960_PG_AcknowledgeInterrupt(ControllerBaseAddress);
5438 NextStatusMailbox = Controller->V1.NextStatusMailbox;
5439 while (NextStatusMailbox->Fields.Valid)
5440 {
5441 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5442 NextStatusMailbox->Fields.CommandIdentifier;
5443 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5444 Command->V1.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5445 NextStatusMailbox->Word = 0;
5446 if (++NextStatusMailbox > Controller->V1.LastStatusMailbox)
5447 NextStatusMailbox = Controller->V1.FirstStatusMailbox;
5448 DAC960_V1_ProcessCompletedCommand(Command);
5449 }
5450 Controller->V1.NextStatusMailbox = NextStatusMailbox;
5451 /*
5452 Attempt to remove additional I/O Requests from the Controller's
5453 I/O Request Queue and queue them to the Controller.
5454 */
5455 DAC960_ProcessRequest(Controller);
5456 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5457 return IRQ_HANDLED;
5458 }
5459
5460
5461 /*
5462 DAC960_PD_InterruptHandler handles hardware interrupts from DAC960 PD Series
5463 Controllers.
5464 */
5465
DAC960_PD_InterruptHandler(int IRQ_Channel,void * DeviceIdentifier)5466 static irqreturn_t DAC960_PD_InterruptHandler(int IRQ_Channel,
5467 void *DeviceIdentifier)
5468 {
5469 DAC960_Controller_T *Controller = DeviceIdentifier;
5470 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5471 unsigned long flags;
5472
5473 spin_lock_irqsave(&Controller->queue_lock, flags);
5474 while (DAC960_PD_StatusAvailableP(ControllerBaseAddress))
5475 {
5476 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5477 DAC960_PD_ReadStatusCommandIdentifier(ControllerBaseAddress);
5478 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5479 Command->V1.CommandStatus =
5480 DAC960_PD_ReadStatusRegister(ControllerBaseAddress);
5481 DAC960_PD_AcknowledgeInterrupt(ControllerBaseAddress);
5482 DAC960_PD_AcknowledgeStatus(ControllerBaseAddress);
5483 DAC960_V1_ProcessCompletedCommand(Command);
5484 }
5485 /*
5486 Attempt to remove additional I/O Requests from the Controller's
5487 I/O Request Queue and queue them to the Controller.
5488 */
5489 DAC960_ProcessRequest(Controller);
5490 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5491 return IRQ_HANDLED;
5492 }
5493
5494
5495 /*
5496 DAC960_P_InterruptHandler handles hardware interrupts from DAC960 P Series
5497 Controllers.
5498
5499 Translations of DAC960_V1_Enquiry and DAC960_V1_GetDeviceState rely
5500 on the data having been placed into DAC960_Controller_T, rather than
5501 an arbitrary buffer.
5502 */
5503
DAC960_P_InterruptHandler(int IRQ_Channel,void * DeviceIdentifier)5504 static irqreturn_t DAC960_P_InterruptHandler(int IRQ_Channel,
5505 void *DeviceIdentifier)
5506 {
5507 DAC960_Controller_T *Controller = DeviceIdentifier;
5508 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5509 unsigned long flags;
5510
5511 spin_lock_irqsave(&Controller->queue_lock, flags);
5512 while (DAC960_PD_StatusAvailableP(ControllerBaseAddress))
5513 {
5514 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5515 DAC960_PD_ReadStatusCommandIdentifier(ControllerBaseAddress);
5516 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5517 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
5518 DAC960_V1_CommandOpcode_T CommandOpcode =
5519 CommandMailbox->Common.CommandOpcode;
5520 Command->V1.CommandStatus =
5521 DAC960_PD_ReadStatusRegister(ControllerBaseAddress);
5522 DAC960_PD_AcknowledgeInterrupt(ControllerBaseAddress);
5523 DAC960_PD_AcknowledgeStatus(ControllerBaseAddress);
5524 switch (CommandOpcode)
5525 {
5526 case DAC960_V1_Enquiry_Old:
5527 Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Enquiry;
5528 DAC960_P_To_PD_TranslateEnquiry(Controller->V1.NewEnquiry);
5529 break;
5530 case DAC960_V1_GetDeviceState_Old:
5531 Command->V1.CommandMailbox.Common.CommandOpcode =
5532 DAC960_V1_GetDeviceState;
5533 DAC960_P_To_PD_TranslateDeviceState(Controller->V1.NewDeviceState);
5534 break;
5535 case DAC960_V1_Read_Old:
5536 Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Read;
5537 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5538 break;
5539 case DAC960_V1_Write_Old:
5540 Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Write;
5541 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5542 break;
5543 case DAC960_V1_ReadWithScatterGather_Old:
5544 Command->V1.CommandMailbox.Common.CommandOpcode =
5545 DAC960_V1_ReadWithScatterGather;
5546 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5547 break;
5548 case DAC960_V1_WriteWithScatterGather_Old:
5549 Command->V1.CommandMailbox.Common.CommandOpcode =
5550 DAC960_V1_WriteWithScatterGather;
5551 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5552 break;
5553 default:
5554 break;
5555 }
5556 DAC960_V1_ProcessCompletedCommand(Command);
5557 }
5558 /*
5559 Attempt to remove additional I/O Requests from the Controller's
5560 I/O Request Queue and queue them to the Controller.
5561 */
5562 DAC960_ProcessRequest(Controller);
5563 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5564 return IRQ_HANDLED;
5565 }
5566
5567
5568 /*
5569 DAC960_V1_QueueMonitoringCommand queues a Monitoring Command to DAC960 V1
5570 Firmware Controllers.
5571 */
5572
DAC960_V1_QueueMonitoringCommand(DAC960_Command_T * Command)5573 static void DAC960_V1_QueueMonitoringCommand(DAC960_Command_T *Command)
5574 {
5575 DAC960_Controller_T *Controller = Command->Controller;
5576 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
5577 DAC960_V1_ClearCommand(Command);
5578 Command->CommandType = DAC960_MonitoringCommand;
5579 CommandMailbox->Type3.CommandOpcode = DAC960_V1_Enquiry;
5580 CommandMailbox->Type3.BusAddress = Controller->V1.NewEnquiryDMA;
5581 DAC960_QueueCommand(Command);
5582 }
5583
5584
5585 /*
5586 DAC960_V2_QueueMonitoringCommand queues a Monitoring Command to DAC960 V2
5587 Firmware Controllers.
5588 */
5589
DAC960_V2_QueueMonitoringCommand(DAC960_Command_T * Command)5590 static void DAC960_V2_QueueMonitoringCommand(DAC960_Command_T *Command)
5591 {
5592 DAC960_Controller_T *Controller = Command->Controller;
5593 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
5594 DAC960_V2_ClearCommand(Command);
5595 Command->CommandType = DAC960_MonitoringCommand;
5596 CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL;
5597 CommandMailbox->ControllerInfo.CommandControlBits
5598 .DataTransferControllerToHost = true;
5599 CommandMailbox->ControllerInfo.CommandControlBits
5600 .NoAutoRequestSense = true;
5601 CommandMailbox->ControllerInfo.DataTransferSize =
5602 sizeof(DAC960_V2_ControllerInfo_T);
5603 CommandMailbox->ControllerInfo.ControllerNumber = 0;
5604 CommandMailbox->ControllerInfo.IOCTL_Opcode = DAC960_V2_GetControllerInfo;
5605 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
5606 .ScatterGatherSegments[0]
5607 .SegmentDataPointer =
5608 Controller->V2.NewControllerInformationDMA;
5609 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
5610 .ScatterGatherSegments[0]
5611 .SegmentByteCount =
5612 CommandMailbox->ControllerInfo.DataTransferSize;
5613 DAC960_QueueCommand(Command);
5614 }
5615
5616
5617 /*
5618 DAC960_MonitoringTimerFunction is the timer function for monitoring
5619 the status of DAC960 Controllers.
5620 */
5621
DAC960_MonitoringTimerFunction(struct timer_list * t)5622 static void DAC960_MonitoringTimerFunction(struct timer_list *t)
5623 {
5624 DAC960_Controller_T *Controller = from_timer(Controller, t, MonitoringTimer);
5625 DAC960_Command_T *Command;
5626 unsigned long flags;
5627
5628 if (Controller->FirmwareType == DAC960_V1_Controller)
5629 {
5630 spin_lock_irqsave(&Controller->queue_lock, flags);
5631 /*
5632 Queue a Status Monitoring Command to Controller.
5633 */
5634 Command = DAC960_AllocateCommand(Controller);
5635 if (Command != NULL)
5636 DAC960_V1_QueueMonitoringCommand(Command);
5637 else Controller->MonitoringCommandDeferred = true;
5638 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5639 }
5640 else
5641 {
5642 DAC960_V2_ControllerInfo_T *ControllerInfo =
5643 &Controller->V2.ControllerInformation;
5644 unsigned int StatusChangeCounter =
5645 Controller->V2.HealthStatusBuffer->StatusChangeCounter;
5646 bool ForceMonitoringCommand = false;
5647 if (time_after(jiffies, Controller->SecondaryMonitoringTime
5648 + DAC960_SecondaryMonitoringInterval))
5649 {
5650 int LogicalDriveNumber;
5651 for (LogicalDriveNumber = 0;
5652 LogicalDriveNumber < DAC960_MaxLogicalDrives;
5653 LogicalDriveNumber++)
5654 {
5655 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
5656 Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
5657 if (LogicalDeviceInfo == NULL) continue;
5658 if (!LogicalDeviceInfo->LogicalDeviceControl
5659 .LogicalDeviceInitialized)
5660 {
5661 ForceMonitoringCommand = true;
5662 break;
5663 }
5664 }
5665 Controller->SecondaryMonitoringTime = jiffies;
5666 }
5667 if (StatusChangeCounter == Controller->V2.StatusChangeCounter &&
5668 Controller->V2.HealthStatusBuffer->NextEventSequenceNumber
5669 == Controller->V2.NextEventSequenceNumber &&
5670 (ControllerInfo->BackgroundInitializationsActive +
5671 ControllerInfo->LogicalDeviceInitializationsActive +
5672 ControllerInfo->PhysicalDeviceInitializationsActive +
5673 ControllerInfo->ConsistencyChecksActive +
5674 ControllerInfo->RebuildsActive +
5675 ControllerInfo->OnlineExpansionsActive == 0 ||
5676 time_before(jiffies, Controller->PrimaryMonitoringTime
5677 + DAC960_MonitoringTimerInterval)) &&
5678 !ForceMonitoringCommand)
5679 {
5680 Controller->MonitoringTimer.expires =
5681 jiffies + DAC960_HealthStatusMonitoringInterval;
5682 add_timer(&Controller->MonitoringTimer);
5683 return;
5684 }
5685 Controller->V2.StatusChangeCounter = StatusChangeCounter;
5686 Controller->PrimaryMonitoringTime = jiffies;
5687
5688 spin_lock_irqsave(&Controller->queue_lock, flags);
5689 /*
5690 Queue a Status Monitoring Command to Controller.
5691 */
5692 Command = DAC960_AllocateCommand(Controller);
5693 if (Command != NULL)
5694 DAC960_V2_QueueMonitoringCommand(Command);
5695 else Controller->MonitoringCommandDeferred = true;
5696 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5697 /*
5698 Wake up any processes waiting on a Health Status Buffer change.
5699 */
5700 wake_up(&Controller->HealthStatusWaitQueue);
5701 }
5702 }
5703
5704 /*
5705 DAC960_CheckStatusBuffer verifies that there is room to hold ByteCount
5706 additional bytes in the Combined Status Buffer and grows the buffer if
5707 necessary. It returns true if there is enough room and false otherwise.
5708 */
5709
DAC960_CheckStatusBuffer(DAC960_Controller_T * Controller,unsigned int ByteCount)5710 static bool DAC960_CheckStatusBuffer(DAC960_Controller_T *Controller,
5711 unsigned int ByteCount)
5712 {
5713 unsigned char *NewStatusBuffer;
5714 if (Controller->InitialStatusLength + 1 +
5715 Controller->CurrentStatusLength + ByteCount + 1 <=
5716 Controller->CombinedStatusBufferLength)
5717 return true;
5718 if (Controller->CombinedStatusBufferLength == 0)
5719 {
5720 unsigned int NewStatusBufferLength = DAC960_InitialStatusBufferSize;
5721 while (NewStatusBufferLength < ByteCount)
5722 NewStatusBufferLength *= 2;
5723 Controller->CombinedStatusBuffer = kmalloc(NewStatusBufferLength,
5724 GFP_ATOMIC);
5725 if (Controller->CombinedStatusBuffer == NULL) return false;
5726 Controller->CombinedStatusBufferLength = NewStatusBufferLength;
5727 return true;
5728 }
5729 NewStatusBuffer = kmalloc_array(2, Controller->CombinedStatusBufferLength,
5730 GFP_ATOMIC);
5731 if (NewStatusBuffer == NULL)
5732 {
5733 DAC960_Warning("Unable to expand Combined Status Buffer - Truncating\n",
5734 Controller);
5735 return false;
5736 }
5737 memcpy(NewStatusBuffer, Controller->CombinedStatusBuffer,
5738 Controller->CombinedStatusBufferLength);
5739 kfree(Controller->CombinedStatusBuffer);
5740 Controller->CombinedStatusBuffer = NewStatusBuffer;
5741 Controller->CombinedStatusBufferLength *= 2;
5742 Controller->CurrentStatusBuffer =
5743 &NewStatusBuffer[Controller->InitialStatusLength + 1];
5744 return true;
5745 }
5746
5747
5748 /*
5749 DAC960_Message prints Driver Messages.
5750 */
5751
DAC960_Message(DAC960_MessageLevel_T MessageLevel,unsigned char * Format,DAC960_Controller_T * Controller,...)5752 static void DAC960_Message(DAC960_MessageLevel_T MessageLevel,
5753 unsigned char *Format,
5754 DAC960_Controller_T *Controller,
5755 ...)
5756 {
5757 static unsigned char Buffer[DAC960_LineBufferSize];
5758 static bool BeginningOfLine = true;
5759 va_list Arguments;
5760 int Length = 0;
5761 va_start(Arguments, Controller);
5762 Length = vsprintf(Buffer, Format, Arguments);
5763 va_end(Arguments);
5764 if (Controller == NULL)
5765 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5766 DAC960_ControllerCount, Buffer);
5767 else if (MessageLevel == DAC960_AnnounceLevel ||
5768 MessageLevel == DAC960_InfoLevel)
5769 {
5770 if (!Controller->ControllerInitialized)
5771 {
5772 if (DAC960_CheckStatusBuffer(Controller, Length))
5773 {
5774 strcpy(&Controller->CombinedStatusBuffer
5775 [Controller->InitialStatusLength],
5776 Buffer);
5777 Controller->InitialStatusLength += Length;
5778 Controller->CurrentStatusBuffer =
5779 &Controller->CombinedStatusBuffer
5780 [Controller->InitialStatusLength + 1];
5781 }
5782 if (MessageLevel == DAC960_AnnounceLevel)
5783 {
5784 static int AnnouncementLines = 0;
5785 if (++AnnouncementLines <= 2)
5786 printk("%sDAC960: %s", DAC960_MessageLevelMap[MessageLevel],
5787 Buffer);
5788 }
5789 else
5790 {
5791 if (BeginningOfLine)
5792 {
5793 if (Buffer[0] != '\n' || Length > 1)
5794 printk("%sDAC960#%d: %s",
5795 DAC960_MessageLevelMap[MessageLevel],
5796 Controller->ControllerNumber, Buffer);
5797 }
5798 else printk("%s", Buffer);
5799 }
5800 }
5801 else if (DAC960_CheckStatusBuffer(Controller, Length))
5802 {
5803 strcpy(&Controller->CurrentStatusBuffer[
5804 Controller->CurrentStatusLength], Buffer);
5805 Controller->CurrentStatusLength += Length;
5806 }
5807 }
5808 else if (MessageLevel == DAC960_ProgressLevel)
5809 {
5810 strcpy(Controller->ProgressBuffer, Buffer);
5811 Controller->ProgressBufferLength = Length;
5812 if (Controller->EphemeralProgressMessage)
5813 {
5814 if (time_after_eq(jiffies, Controller->LastProgressReportTime
5815 + DAC960_ProgressReportingInterval))
5816 {
5817 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5818 Controller->ControllerNumber, Buffer);
5819 Controller->LastProgressReportTime = jiffies;
5820 }
5821 }
5822 else printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5823 Controller->ControllerNumber, Buffer);
5824 }
5825 else if (MessageLevel == DAC960_UserCriticalLevel)
5826 {
5827 strcpy(&Controller->UserStatusBuffer[Controller->UserStatusLength],
5828 Buffer);
5829 Controller->UserStatusLength += Length;
5830 if (Buffer[0] != '\n' || Length > 1)
5831 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5832 Controller->ControllerNumber, Buffer);
5833 }
5834 else
5835 {
5836 if (BeginningOfLine)
5837 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5838 Controller->ControllerNumber, Buffer);
5839 else printk("%s", Buffer);
5840 }
5841 BeginningOfLine = (Buffer[Length-1] == '\n');
5842 }
5843
5844
5845 /*
5846 DAC960_ParsePhysicalDevice parses spaces followed by a Physical Device
5847 Channel:TargetID specification from a User Command string. It updates
5848 Channel and TargetID and returns true on success and false on failure.
5849 */
5850
DAC960_ParsePhysicalDevice(DAC960_Controller_T * Controller,char * UserCommandString,unsigned char * Channel,unsigned char * TargetID)5851 static bool DAC960_ParsePhysicalDevice(DAC960_Controller_T *Controller,
5852 char *UserCommandString,
5853 unsigned char *Channel,
5854 unsigned char *TargetID)
5855 {
5856 char *NewUserCommandString = UserCommandString;
5857 unsigned long XChannel, XTargetID;
5858 while (*UserCommandString == ' ') UserCommandString++;
5859 if (UserCommandString == NewUserCommandString)
5860 return false;
5861 XChannel = simple_strtoul(UserCommandString, &NewUserCommandString, 10);
5862 if (NewUserCommandString == UserCommandString ||
5863 *NewUserCommandString != ':' ||
5864 XChannel >= Controller->Channels)
5865 return false;
5866 UserCommandString = ++NewUserCommandString;
5867 XTargetID = simple_strtoul(UserCommandString, &NewUserCommandString, 10);
5868 if (NewUserCommandString == UserCommandString ||
5869 *NewUserCommandString != '\0' ||
5870 XTargetID >= Controller->Targets)
5871 return false;
5872 *Channel = XChannel;
5873 *TargetID = XTargetID;
5874 return true;
5875 }
5876
5877
5878 /*
5879 DAC960_ParseLogicalDrive parses spaces followed by a Logical Drive Number
5880 specification from a User Command string. It updates LogicalDriveNumber and
5881 returns true on success and false on failure.
5882 */
5883
DAC960_ParseLogicalDrive(DAC960_Controller_T * Controller,char * UserCommandString,unsigned char * LogicalDriveNumber)5884 static bool DAC960_ParseLogicalDrive(DAC960_Controller_T *Controller,
5885 char *UserCommandString,
5886 unsigned char *LogicalDriveNumber)
5887 {
5888 char *NewUserCommandString = UserCommandString;
5889 unsigned long XLogicalDriveNumber;
5890 while (*UserCommandString == ' ') UserCommandString++;
5891 if (UserCommandString == NewUserCommandString)
5892 return false;
5893 XLogicalDriveNumber =
5894 simple_strtoul(UserCommandString, &NewUserCommandString, 10);
5895 if (NewUserCommandString == UserCommandString ||
5896 *NewUserCommandString != '\0' ||
5897 XLogicalDriveNumber > DAC960_MaxLogicalDrives - 1)
5898 return false;
5899 *LogicalDriveNumber = XLogicalDriveNumber;
5900 return true;
5901 }
5902
5903
5904 /*
5905 DAC960_V1_SetDeviceState sets the Device State for a Physical Device for
5906 DAC960 V1 Firmware Controllers.
5907 */
5908
DAC960_V1_SetDeviceState(DAC960_Controller_T * Controller,DAC960_Command_T * Command,unsigned char Channel,unsigned char TargetID,DAC960_V1_PhysicalDeviceState_T DeviceState,const unsigned char * DeviceStateString)5909 static void DAC960_V1_SetDeviceState(DAC960_Controller_T *Controller,
5910 DAC960_Command_T *Command,
5911 unsigned char Channel,
5912 unsigned char TargetID,
5913 DAC960_V1_PhysicalDeviceState_T
5914 DeviceState,
5915 const unsigned char *DeviceStateString)
5916 {
5917 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
5918 CommandMailbox->Type3D.CommandOpcode = DAC960_V1_StartDevice;
5919 CommandMailbox->Type3D.Channel = Channel;
5920 CommandMailbox->Type3D.TargetID = TargetID;
5921 CommandMailbox->Type3D.DeviceState = DeviceState;
5922 CommandMailbox->Type3D.Modifier = 0;
5923 DAC960_ExecuteCommand(Command);
5924 switch (Command->V1.CommandStatus)
5925 {
5926 case DAC960_V1_NormalCompletion:
5927 DAC960_UserCritical("%s of Physical Device %d:%d Succeeded\n", Controller,
5928 DeviceStateString, Channel, TargetID);
5929 break;
5930 case DAC960_V1_UnableToStartDevice:
5931 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5932 "Unable to Start Device\n", Controller,
5933 DeviceStateString, Channel, TargetID);
5934 break;
5935 case DAC960_V1_NoDeviceAtAddress:
5936 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5937 "No Device at Address\n", Controller,
5938 DeviceStateString, Channel, TargetID);
5939 break;
5940 case DAC960_V1_InvalidChannelOrTargetOrModifier:
5941 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5942 "Invalid Channel or Target or Modifier\n",
5943 Controller, DeviceStateString, Channel, TargetID);
5944 break;
5945 case DAC960_V1_ChannelBusy:
5946 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5947 "Channel Busy\n", Controller,
5948 DeviceStateString, Channel, TargetID);
5949 break;
5950 default:
5951 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5952 "Unexpected Status %04X\n", Controller,
5953 DeviceStateString, Channel, TargetID,
5954 Command->V1.CommandStatus);
5955 break;
5956 }
5957 }
5958
5959
5960 /*
5961 DAC960_V1_ExecuteUserCommand executes a User Command for DAC960 V1 Firmware
5962 Controllers.
5963 */
5964
DAC960_V1_ExecuteUserCommand(DAC960_Controller_T * Controller,unsigned char * UserCommand)5965 static bool DAC960_V1_ExecuteUserCommand(DAC960_Controller_T *Controller,
5966 unsigned char *UserCommand)
5967 {
5968 DAC960_Command_T *Command;
5969 DAC960_V1_CommandMailbox_T *CommandMailbox;
5970 unsigned long flags;
5971 unsigned char Channel, TargetID, LogicalDriveNumber;
5972
5973 spin_lock_irqsave(&Controller->queue_lock, flags);
5974 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
5975 DAC960_WaitForCommand(Controller);
5976 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5977 Controller->UserStatusLength = 0;
5978 DAC960_V1_ClearCommand(Command);
5979 Command->CommandType = DAC960_ImmediateCommand;
5980 CommandMailbox = &Command->V1.CommandMailbox;
5981 if (strcmp(UserCommand, "flush-cache") == 0)
5982 {
5983 CommandMailbox->Type3.CommandOpcode = DAC960_V1_Flush;
5984 DAC960_ExecuteCommand(Command);
5985 DAC960_UserCritical("Cache Flush Completed\n", Controller);
5986 }
5987 else if (strncmp(UserCommand, "kill", 4) == 0 &&
5988 DAC960_ParsePhysicalDevice(Controller, &UserCommand[4],
5989 &Channel, &TargetID))
5990 {
5991 DAC960_V1_DeviceState_T *DeviceState =
5992 &Controller->V1.DeviceState[Channel][TargetID];
5993 if (DeviceState->Present &&
5994 DeviceState->DeviceType == DAC960_V1_DiskType &&
5995 DeviceState->DeviceState != DAC960_V1_Device_Dead)
5996 DAC960_V1_SetDeviceState(Controller, Command, Channel, TargetID,
5997 DAC960_V1_Device_Dead, "Kill");
5998 else DAC960_UserCritical("Kill of Physical Device %d:%d Illegal\n",
5999 Controller, Channel, TargetID);
6000 }
6001 else if (strncmp(UserCommand, "make-online", 11) == 0 &&
6002 DAC960_ParsePhysicalDevice(Controller, &UserCommand[11],
6003 &Channel, &TargetID))
6004 {
6005 DAC960_V1_DeviceState_T *DeviceState =
6006 &Controller->V1.DeviceState[Channel][TargetID];
6007 if (DeviceState->Present &&
6008 DeviceState->DeviceType == DAC960_V1_DiskType &&
6009 DeviceState->DeviceState == DAC960_V1_Device_Dead)
6010 DAC960_V1_SetDeviceState(Controller, Command, Channel, TargetID,
6011 DAC960_V1_Device_Online, "Make Online");
6012 else DAC960_UserCritical("Make Online of Physical Device %d:%d Illegal\n",
6013 Controller, Channel, TargetID);
6014
6015 }
6016 else if (strncmp(UserCommand, "make-standby", 12) == 0 &&
6017 DAC960_ParsePhysicalDevice(Controller, &UserCommand[12],
6018 &Channel, &TargetID))
6019 {
6020 DAC960_V1_DeviceState_T *DeviceState =
6021 &Controller->V1.DeviceState[Channel][TargetID];
6022 if (DeviceState->Present &&
6023 DeviceState->DeviceType == DAC960_V1_DiskType &&
6024 DeviceState->DeviceState == DAC960_V1_Device_Dead)
6025 DAC960_V1_SetDeviceState(Controller, Command, Channel, TargetID,
6026 DAC960_V1_Device_Standby, "Make Standby");
6027 else DAC960_UserCritical("Make Standby of Physical "
6028 "Device %d:%d Illegal\n",
6029 Controller, Channel, TargetID);
6030 }
6031 else if (strncmp(UserCommand, "rebuild", 7) == 0 &&
6032 DAC960_ParsePhysicalDevice(Controller, &UserCommand[7],
6033 &Channel, &TargetID))
6034 {
6035 CommandMailbox->Type3D.CommandOpcode = DAC960_V1_RebuildAsync;
6036 CommandMailbox->Type3D.Channel = Channel;
6037 CommandMailbox->Type3D.TargetID = TargetID;
6038 DAC960_ExecuteCommand(Command);
6039 switch (Command->V1.CommandStatus)
6040 {
6041 case DAC960_V1_NormalCompletion:
6042 DAC960_UserCritical("Rebuild of Physical Device %d:%d Initiated\n",
6043 Controller, Channel, TargetID);
6044 break;
6045 case DAC960_V1_AttemptToRebuildOnlineDrive:
6046 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6047 "Attempt to Rebuild Online or "
6048 "Unresponsive Drive\n",
6049 Controller, Channel, TargetID);
6050 break;
6051 case DAC960_V1_NewDiskFailedDuringRebuild:
6052 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6053 "New Disk Failed During Rebuild\n",
6054 Controller, Channel, TargetID);
6055 break;
6056 case DAC960_V1_InvalidDeviceAddress:
6057 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6058 "Invalid Device Address\n",
6059 Controller, Channel, TargetID);
6060 break;
6061 case DAC960_V1_RebuildOrCheckAlreadyInProgress:
6062 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6063 "Rebuild or Consistency Check Already "
6064 "in Progress\n", Controller, Channel, TargetID);
6065 break;
6066 default:
6067 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6068 "Unexpected Status %04X\n", Controller,
6069 Channel, TargetID, Command->V1.CommandStatus);
6070 break;
6071 }
6072 }
6073 else if (strncmp(UserCommand, "check-consistency", 17) == 0 &&
6074 DAC960_ParseLogicalDrive(Controller, &UserCommand[17],
6075 &LogicalDriveNumber))
6076 {
6077 CommandMailbox->Type3C.CommandOpcode = DAC960_V1_CheckConsistencyAsync;
6078 CommandMailbox->Type3C.LogicalDriveNumber = LogicalDriveNumber;
6079 CommandMailbox->Type3C.AutoRestore = true;
6080 DAC960_ExecuteCommand(Command);
6081 switch (Command->V1.CommandStatus)
6082 {
6083 case DAC960_V1_NormalCompletion:
6084 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6085 "(/dev/rd/c%dd%d) Initiated\n",
6086 Controller, LogicalDriveNumber,
6087 Controller->ControllerNumber,
6088 LogicalDriveNumber);
6089 break;
6090 case DAC960_V1_DependentDiskIsDead:
6091 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6092 "(/dev/rd/c%dd%d) Failed - "
6093 "Dependent Physical Device is DEAD\n",
6094 Controller, LogicalDriveNumber,
6095 Controller->ControllerNumber,
6096 LogicalDriveNumber);
6097 break;
6098 case DAC960_V1_InvalidOrNonredundantLogicalDrive:
6099 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6100 "(/dev/rd/c%dd%d) Failed - "
6101 "Invalid or Nonredundant Logical Drive\n",
6102 Controller, LogicalDriveNumber,
6103 Controller->ControllerNumber,
6104 LogicalDriveNumber);
6105 break;
6106 case DAC960_V1_RebuildOrCheckAlreadyInProgress:
6107 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6108 "(/dev/rd/c%dd%d) Failed - Rebuild or "
6109 "Consistency Check Already in Progress\n",
6110 Controller, LogicalDriveNumber,
6111 Controller->ControllerNumber,
6112 LogicalDriveNumber);
6113 break;
6114 default:
6115 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6116 "(/dev/rd/c%dd%d) Failed - "
6117 "Unexpected Status %04X\n",
6118 Controller, LogicalDriveNumber,
6119 Controller->ControllerNumber,
6120 LogicalDriveNumber, Command->V1.CommandStatus);
6121 break;
6122 }
6123 }
6124 else if (strcmp(UserCommand, "cancel-rebuild") == 0 ||
6125 strcmp(UserCommand, "cancel-consistency-check") == 0)
6126 {
6127 /*
6128 the OldRebuildRateConstant is never actually used
6129 once its value is retrieved from the controller.
6130 */
6131 unsigned char *OldRebuildRateConstant;
6132 dma_addr_t OldRebuildRateConstantDMA;
6133
6134 OldRebuildRateConstant = pci_alloc_consistent( Controller->PCIDevice,
6135 sizeof(char), &OldRebuildRateConstantDMA);
6136 if (OldRebuildRateConstant == NULL) {
6137 DAC960_UserCritical("Cancellation of Rebuild or "
6138 "Consistency Check Failed - "
6139 "Out of Memory",
6140 Controller);
6141 goto failure;
6142 }
6143 CommandMailbox->Type3R.CommandOpcode = DAC960_V1_RebuildControl;
6144 CommandMailbox->Type3R.RebuildRateConstant = 0xFF;
6145 CommandMailbox->Type3R.BusAddress = OldRebuildRateConstantDMA;
6146 DAC960_ExecuteCommand(Command);
6147 switch (Command->V1.CommandStatus)
6148 {
6149 case DAC960_V1_NormalCompletion:
6150 DAC960_UserCritical("Rebuild or Consistency Check Cancelled\n",
6151 Controller);
6152 break;
6153 default:
6154 DAC960_UserCritical("Cancellation of Rebuild or "
6155 "Consistency Check Failed - "
6156 "Unexpected Status %04X\n",
6157 Controller, Command->V1.CommandStatus);
6158 break;
6159 }
6160 failure:
6161 pci_free_consistent(Controller->PCIDevice, sizeof(char),
6162 OldRebuildRateConstant, OldRebuildRateConstantDMA);
6163 }
6164 else DAC960_UserCritical("Illegal User Command: '%s'\n",
6165 Controller, UserCommand);
6166
6167 spin_lock_irqsave(&Controller->queue_lock, flags);
6168 DAC960_DeallocateCommand(Command);
6169 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6170 return true;
6171 }
6172
6173
6174 /*
6175 DAC960_V2_TranslatePhysicalDevice translates a Physical Device Channel and
6176 TargetID into a Logical Device. It returns true on success and false
6177 on failure.
6178 */
6179
DAC960_V2_TranslatePhysicalDevice(DAC960_Command_T * Command,unsigned char Channel,unsigned char TargetID,unsigned short * LogicalDeviceNumber)6180 static bool DAC960_V2_TranslatePhysicalDevice(DAC960_Command_T *Command,
6181 unsigned char Channel,
6182 unsigned char TargetID,
6183 unsigned short
6184 *LogicalDeviceNumber)
6185 {
6186 DAC960_V2_CommandMailbox_T SavedCommandMailbox, *CommandMailbox;
6187 DAC960_Controller_T *Controller = Command->Controller;
6188
6189 CommandMailbox = &Command->V2.CommandMailbox;
6190 memcpy(&SavedCommandMailbox, CommandMailbox,
6191 sizeof(DAC960_V2_CommandMailbox_T));
6192
6193 CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
6194 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
6195 .DataTransferControllerToHost = true;
6196 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
6197 .NoAutoRequestSense = true;
6198 CommandMailbox->PhysicalDeviceInfo.DataTransferSize =
6199 sizeof(DAC960_V2_PhysicalToLogicalDevice_T);
6200 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID = TargetID;
6201 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel = Channel;
6202 CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode =
6203 DAC960_V2_TranslatePhysicalToLogicalDevice;
6204 CommandMailbox->Common.DataTransferMemoryAddress
6205 .ScatterGatherSegments[0]
6206 .SegmentDataPointer =
6207 Controller->V2.PhysicalToLogicalDeviceDMA;
6208 CommandMailbox->Common.DataTransferMemoryAddress
6209 .ScatterGatherSegments[0]
6210 .SegmentByteCount =
6211 CommandMailbox->Common.DataTransferSize;
6212
6213 DAC960_ExecuteCommand(Command);
6214 *LogicalDeviceNumber = Controller->V2.PhysicalToLogicalDevice->LogicalDeviceNumber;
6215
6216 memcpy(CommandMailbox, &SavedCommandMailbox,
6217 sizeof(DAC960_V2_CommandMailbox_T));
6218 return (Command->V2.CommandStatus == DAC960_V2_NormalCompletion);
6219 }
6220
6221
6222 /*
6223 DAC960_V2_ExecuteUserCommand executes a User Command for DAC960 V2 Firmware
6224 Controllers.
6225 */
6226
DAC960_V2_ExecuteUserCommand(DAC960_Controller_T * Controller,unsigned char * UserCommand)6227 static bool DAC960_V2_ExecuteUserCommand(DAC960_Controller_T *Controller,
6228 unsigned char *UserCommand)
6229 {
6230 DAC960_Command_T *Command;
6231 DAC960_V2_CommandMailbox_T *CommandMailbox;
6232 unsigned long flags;
6233 unsigned char Channel, TargetID, LogicalDriveNumber;
6234 unsigned short LogicalDeviceNumber;
6235
6236 spin_lock_irqsave(&Controller->queue_lock, flags);
6237 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6238 DAC960_WaitForCommand(Controller);
6239 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6240 Controller->UserStatusLength = 0;
6241 DAC960_V2_ClearCommand(Command);
6242 Command->CommandType = DAC960_ImmediateCommand;
6243 CommandMailbox = &Command->V2.CommandMailbox;
6244 CommandMailbox->Common.CommandOpcode = DAC960_V2_IOCTL;
6245 CommandMailbox->Common.CommandControlBits.DataTransferControllerToHost = true;
6246 CommandMailbox->Common.CommandControlBits.NoAutoRequestSense = true;
6247 if (strcmp(UserCommand, "flush-cache") == 0)
6248 {
6249 CommandMailbox->DeviceOperation.IOCTL_Opcode = DAC960_V2_PauseDevice;
6250 CommandMailbox->DeviceOperation.OperationDevice =
6251 DAC960_V2_RAID_Controller;
6252 DAC960_ExecuteCommand(Command);
6253 DAC960_UserCritical("Cache Flush Completed\n", Controller);
6254 }
6255 else if (strncmp(UserCommand, "kill", 4) == 0 &&
6256 DAC960_ParsePhysicalDevice(Controller, &UserCommand[4],
6257 &Channel, &TargetID) &&
6258 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6259 &LogicalDeviceNumber))
6260 {
6261 CommandMailbox->SetDeviceState.LogicalDevice.LogicalDeviceNumber =
6262 LogicalDeviceNumber;
6263 CommandMailbox->SetDeviceState.IOCTL_Opcode =
6264 DAC960_V2_SetDeviceState;
6265 CommandMailbox->SetDeviceState.DeviceState.PhysicalDeviceState =
6266 DAC960_V2_Device_Dead;
6267 DAC960_ExecuteCommand(Command);
6268 DAC960_UserCritical("Kill of Physical Device %d:%d %s\n",
6269 Controller, Channel, TargetID,
6270 (Command->V2.CommandStatus
6271 == DAC960_V2_NormalCompletion
6272 ? "Succeeded" : "Failed"));
6273 }
6274 else if (strncmp(UserCommand, "make-online", 11) == 0 &&
6275 DAC960_ParsePhysicalDevice(Controller, &UserCommand[11],
6276 &Channel, &TargetID) &&
6277 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6278 &LogicalDeviceNumber))
6279 {
6280 CommandMailbox->SetDeviceState.LogicalDevice.LogicalDeviceNumber =
6281 LogicalDeviceNumber;
6282 CommandMailbox->SetDeviceState.IOCTL_Opcode =
6283 DAC960_V2_SetDeviceState;
6284 CommandMailbox->SetDeviceState.DeviceState.PhysicalDeviceState =
6285 DAC960_V2_Device_Online;
6286 DAC960_ExecuteCommand(Command);
6287 DAC960_UserCritical("Make Online of Physical Device %d:%d %s\n",
6288 Controller, Channel, TargetID,
6289 (Command->V2.CommandStatus
6290 == DAC960_V2_NormalCompletion
6291 ? "Succeeded" : "Failed"));
6292 }
6293 else if (strncmp(UserCommand, "make-standby", 12) == 0 &&
6294 DAC960_ParsePhysicalDevice(Controller, &UserCommand[12],
6295 &Channel, &TargetID) &&
6296 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6297 &LogicalDeviceNumber))
6298 {
6299 CommandMailbox->SetDeviceState.LogicalDevice.LogicalDeviceNumber =
6300 LogicalDeviceNumber;
6301 CommandMailbox->SetDeviceState.IOCTL_Opcode =
6302 DAC960_V2_SetDeviceState;
6303 CommandMailbox->SetDeviceState.DeviceState.PhysicalDeviceState =
6304 DAC960_V2_Device_Standby;
6305 DAC960_ExecuteCommand(Command);
6306 DAC960_UserCritical("Make Standby of Physical Device %d:%d %s\n",
6307 Controller, Channel, TargetID,
6308 (Command->V2.CommandStatus
6309 == DAC960_V2_NormalCompletion
6310 ? "Succeeded" : "Failed"));
6311 }
6312 else if (strncmp(UserCommand, "rebuild", 7) == 0 &&
6313 DAC960_ParsePhysicalDevice(Controller, &UserCommand[7],
6314 &Channel, &TargetID) &&
6315 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6316 &LogicalDeviceNumber))
6317 {
6318 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
6319 LogicalDeviceNumber;
6320 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode =
6321 DAC960_V2_RebuildDeviceStart;
6322 DAC960_ExecuteCommand(Command);
6323 DAC960_UserCritical("Rebuild of Physical Device %d:%d %s\n",
6324 Controller, Channel, TargetID,
6325 (Command->V2.CommandStatus
6326 == DAC960_V2_NormalCompletion
6327 ? "Initiated" : "Not Initiated"));
6328 }
6329 else if (strncmp(UserCommand, "cancel-rebuild", 14) == 0 &&
6330 DAC960_ParsePhysicalDevice(Controller, &UserCommand[14],
6331 &Channel, &TargetID) &&
6332 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6333 &LogicalDeviceNumber))
6334 {
6335 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
6336 LogicalDeviceNumber;
6337 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode =
6338 DAC960_V2_RebuildDeviceStop;
6339 DAC960_ExecuteCommand(Command);
6340 DAC960_UserCritical("Rebuild of Physical Device %d:%d %s\n",
6341 Controller, Channel, TargetID,
6342 (Command->V2.CommandStatus
6343 == DAC960_V2_NormalCompletion
6344 ? "Cancelled" : "Not Cancelled"));
6345 }
6346 else if (strncmp(UserCommand, "check-consistency", 17) == 0 &&
6347 DAC960_ParseLogicalDrive(Controller, &UserCommand[17],
6348 &LogicalDriveNumber))
6349 {
6350 CommandMailbox->ConsistencyCheck.LogicalDevice.LogicalDeviceNumber =
6351 LogicalDriveNumber;
6352 CommandMailbox->ConsistencyCheck.IOCTL_Opcode =
6353 DAC960_V2_ConsistencyCheckStart;
6354 CommandMailbox->ConsistencyCheck.RestoreConsistency = true;
6355 CommandMailbox->ConsistencyCheck.InitializedAreaOnly = false;
6356 DAC960_ExecuteCommand(Command);
6357 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6358 "(/dev/rd/c%dd%d) %s\n",
6359 Controller, LogicalDriveNumber,
6360 Controller->ControllerNumber,
6361 LogicalDriveNumber,
6362 (Command->V2.CommandStatus
6363 == DAC960_V2_NormalCompletion
6364 ? "Initiated" : "Not Initiated"));
6365 }
6366 else if (strncmp(UserCommand, "cancel-consistency-check", 24) == 0 &&
6367 DAC960_ParseLogicalDrive(Controller, &UserCommand[24],
6368 &LogicalDriveNumber))
6369 {
6370 CommandMailbox->ConsistencyCheck.LogicalDevice.LogicalDeviceNumber =
6371 LogicalDriveNumber;
6372 CommandMailbox->ConsistencyCheck.IOCTL_Opcode =
6373 DAC960_V2_ConsistencyCheckStop;
6374 DAC960_ExecuteCommand(Command);
6375 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6376 "(/dev/rd/c%dd%d) %s\n",
6377 Controller, LogicalDriveNumber,
6378 Controller->ControllerNumber,
6379 LogicalDriveNumber,
6380 (Command->V2.CommandStatus
6381 == DAC960_V2_NormalCompletion
6382 ? "Cancelled" : "Not Cancelled"));
6383 }
6384 else if (strcmp(UserCommand, "perform-discovery") == 0)
6385 {
6386 CommandMailbox->Common.IOCTL_Opcode = DAC960_V2_StartDiscovery;
6387 DAC960_ExecuteCommand(Command);
6388 DAC960_UserCritical("Discovery %s\n", Controller,
6389 (Command->V2.CommandStatus
6390 == DAC960_V2_NormalCompletion
6391 ? "Initiated" : "Not Initiated"));
6392 if (Command->V2.CommandStatus == DAC960_V2_NormalCompletion)
6393 {
6394 CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL;
6395 CommandMailbox->ControllerInfo.CommandControlBits
6396 .DataTransferControllerToHost = true;
6397 CommandMailbox->ControllerInfo.CommandControlBits
6398 .NoAutoRequestSense = true;
6399 CommandMailbox->ControllerInfo.DataTransferSize =
6400 sizeof(DAC960_V2_ControllerInfo_T);
6401 CommandMailbox->ControllerInfo.ControllerNumber = 0;
6402 CommandMailbox->ControllerInfo.IOCTL_Opcode =
6403 DAC960_V2_GetControllerInfo;
6404 /*
6405 * How does this NOT race with the queued Monitoring
6406 * usage of this structure?
6407 */
6408 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
6409 .ScatterGatherSegments[0]
6410 .SegmentDataPointer =
6411 Controller->V2.NewControllerInformationDMA;
6412 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
6413 .ScatterGatherSegments[0]
6414 .SegmentByteCount =
6415 CommandMailbox->ControllerInfo.DataTransferSize;
6416 while (1) {
6417 DAC960_ExecuteCommand(Command);
6418 if (!Controller->V2.NewControllerInformation->PhysicalScanActive)
6419 break;
6420 msleep(1000);
6421 }
6422 DAC960_UserCritical("Discovery Completed\n", Controller);
6423 }
6424 }
6425 else if (strcmp(UserCommand, "suppress-enclosure-messages") == 0)
6426 Controller->SuppressEnclosureMessages = true;
6427 else DAC960_UserCritical("Illegal User Command: '%s'\n",
6428 Controller, UserCommand);
6429
6430 spin_lock_irqsave(&Controller->queue_lock, flags);
6431 DAC960_DeallocateCommand(Command);
6432 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6433 return true;
6434 }
6435
dac960_proc_show(struct seq_file * m,void * v)6436 static int __maybe_unused dac960_proc_show(struct seq_file *m, void *v)
6437 {
6438 unsigned char *StatusMessage = "OK\n";
6439 int ControllerNumber;
6440 for (ControllerNumber = 0;
6441 ControllerNumber < DAC960_ControllerCount;
6442 ControllerNumber++)
6443 {
6444 DAC960_Controller_T *Controller = DAC960_Controllers[ControllerNumber];
6445 if (Controller == NULL) continue;
6446 if (Controller->MonitoringAlertMode)
6447 {
6448 StatusMessage = "ALERT\n";
6449 break;
6450 }
6451 }
6452 seq_puts(m, StatusMessage);
6453 return 0;
6454 }
6455
dac960_initial_status_proc_show(struct seq_file * m,void * v)6456 static int __maybe_unused dac960_initial_status_proc_show(struct seq_file *m,
6457 void *v)
6458 {
6459 DAC960_Controller_T *Controller = (DAC960_Controller_T *)m->private;
6460 seq_printf(m, "%.*s", Controller->InitialStatusLength, Controller->CombinedStatusBuffer);
6461 return 0;
6462 }
6463
dac960_current_status_proc_show(struct seq_file * m,void * v)6464 static int __maybe_unused dac960_current_status_proc_show(struct seq_file *m,
6465 void *v)
6466 {
6467 DAC960_Controller_T *Controller = (DAC960_Controller_T *) m->private;
6468 unsigned char *StatusMessage =
6469 "No Rebuild or Consistency Check in Progress\n";
6470 int ProgressMessageLength = strlen(StatusMessage);
6471 if (jiffies != Controller->LastCurrentStatusTime)
6472 {
6473 Controller->CurrentStatusLength = 0;
6474 DAC960_AnnounceDriver(Controller);
6475 DAC960_ReportControllerConfiguration(Controller);
6476 DAC960_ReportDeviceConfiguration(Controller);
6477 if (Controller->ProgressBufferLength > 0)
6478 ProgressMessageLength = Controller->ProgressBufferLength;
6479 if (DAC960_CheckStatusBuffer(Controller, 2 + ProgressMessageLength))
6480 {
6481 unsigned char *CurrentStatusBuffer = Controller->CurrentStatusBuffer;
6482 CurrentStatusBuffer[Controller->CurrentStatusLength++] = ' ';
6483 CurrentStatusBuffer[Controller->CurrentStatusLength++] = ' ';
6484 if (Controller->ProgressBufferLength > 0)
6485 strcpy(&CurrentStatusBuffer[Controller->CurrentStatusLength],
6486 Controller->ProgressBuffer);
6487 else
6488 strcpy(&CurrentStatusBuffer[Controller->CurrentStatusLength],
6489 StatusMessage);
6490 Controller->CurrentStatusLength += ProgressMessageLength;
6491 }
6492 Controller->LastCurrentStatusTime = jiffies;
6493 }
6494 seq_printf(m, "%.*s", Controller->CurrentStatusLength, Controller->CurrentStatusBuffer);
6495 return 0;
6496 }
6497
dac960_user_command_proc_show(struct seq_file * m,void * v)6498 static int dac960_user_command_proc_show(struct seq_file *m, void *v)
6499 {
6500 DAC960_Controller_T *Controller = (DAC960_Controller_T *)m->private;
6501
6502 seq_printf(m, "%.*s", Controller->UserStatusLength, Controller->UserStatusBuffer);
6503 return 0;
6504 }
6505
dac960_user_command_proc_open(struct inode * inode,struct file * file)6506 static int dac960_user_command_proc_open(struct inode *inode, struct file *file)
6507 {
6508 return single_open(file, dac960_user_command_proc_show, PDE_DATA(inode));
6509 }
6510
dac960_user_command_proc_write(struct file * file,const char __user * Buffer,size_t Count,loff_t * pos)6511 static ssize_t dac960_user_command_proc_write(struct file *file,
6512 const char __user *Buffer,
6513 size_t Count, loff_t *pos)
6514 {
6515 DAC960_Controller_T *Controller = PDE_DATA(file_inode(file));
6516 unsigned char CommandBuffer[80];
6517 int Length;
6518 if (Count > sizeof(CommandBuffer)-1) return -EINVAL;
6519 if (copy_from_user(CommandBuffer, Buffer, Count)) return -EFAULT;
6520 CommandBuffer[Count] = '\0';
6521 Length = strlen(CommandBuffer);
6522 if (Length > 0 && CommandBuffer[Length-1] == '\n')
6523 CommandBuffer[--Length] = '\0';
6524 if (Controller->FirmwareType == DAC960_V1_Controller)
6525 return (DAC960_V1_ExecuteUserCommand(Controller, CommandBuffer)
6526 ? Count : -EBUSY);
6527 else
6528 return (DAC960_V2_ExecuteUserCommand(Controller, CommandBuffer)
6529 ? Count : -EBUSY);
6530 }
6531
6532 static const struct file_operations dac960_user_command_proc_fops = {
6533 .owner = THIS_MODULE,
6534 .open = dac960_user_command_proc_open,
6535 .read = seq_read,
6536 .llseek = seq_lseek,
6537 .release = single_release,
6538 .write = dac960_user_command_proc_write,
6539 };
6540
6541 /*
6542 DAC960_CreateProcEntries creates the /proc/rd/... entries for the
6543 DAC960 Driver.
6544 */
6545
DAC960_CreateProcEntries(DAC960_Controller_T * Controller)6546 static void DAC960_CreateProcEntries(DAC960_Controller_T *Controller)
6547 {
6548 struct proc_dir_entry *ControllerProcEntry;
6549
6550 if (DAC960_ProcDirectoryEntry == NULL) {
6551 DAC960_ProcDirectoryEntry = proc_mkdir("rd", NULL);
6552 proc_create_single("status", 0, DAC960_ProcDirectoryEntry,
6553 dac960_proc_show);
6554 }
6555
6556 snprintf(Controller->ControllerName, sizeof(Controller->ControllerName),
6557 "c%d", Controller->ControllerNumber);
6558 ControllerProcEntry = proc_mkdir(Controller->ControllerName,
6559 DAC960_ProcDirectoryEntry);
6560 proc_create_single_data("initial_status", 0, ControllerProcEntry,
6561 dac960_initial_status_proc_show, Controller);
6562 proc_create_single_data("current_status", 0, ControllerProcEntry,
6563 dac960_current_status_proc_show, Controller);
6564 proc_create_data("user_command", 0600, ControllerProcEntry, &dac960_user_command_proc_fops, Controller);
6565 Controller->ControllerProcEntry = ControllerProcEntry;
6566 }
6567
6568
6569 /*
6570 DAC960_DestroyProcEntries destroys the /proc/rd/... entries for the
6571 DAC960 Driver.
6572 */
6573
DAC960_DestroyProcEntries(DAC960_Controller_T * Controller)6574 static void DAC960_DestroyProcEntries(DAC960_Controller_T *Controller)
6575 {
6576 if (Controller->ControllerProcEntry == NULL)
6577 return;
6578 remove_proc_entry("initial_status", Controller->ControllerProcEntry);
6579 remove_proc_entry("current_status", Controller->ControllerProcEntry);
6580 remove_proc_entry("user_command", Controller->ControllerProcEntry);
6581 remove_proc_entry(Controller->ControllerName, DAC960_ProcDirectoryEntry);
6582 Controller->ControllerProcEntry = NULL;
6583 }
6584
6585 #ifdef DAC960_GAM_MINOR
6586
DAC960_gam_get_controller_info(DAC960_ControllerInfo_T __user * UserSpaceControllerInfo)6587 static long DAC960_gam_get_controller_info(DAC960_ControllerInfo_T __user *UserSpaceControllerInfo)
6588 {
6589 DAC960_ControllerInfo_T ControllerInfo;
6590 DAC960_Controller_T *Controller;
6591 int ControllerNumber;
6592 long ErrorCode;
6593
6594 if (UserSpaceControllerInfo == NULL)
6595 ErrorCode = -EINVAL;
6596 else ErrorCode = get_user(ControllerNumber,
6597 &UserSpaceControllerInfo->ControllerNumber);
6598 if (ErrorCode != 0)
6599 goto out;
6600 ErrorCode = -ENXIO;
6601 if (ControllerNumber < 0 ||
6602 ControllerNumber > DAC960_ControllerCount - 1) {
6603 goto out;
6604 }
6605 Controller = DAC960_Controllers[ControllerNumber];
6606 if (Controller == NULL)
6607 goto out;
6608 memset(&ControllerInfo, 0, sizeof(DAC960_ControllerInfo_T));
6609 ControllerInfo.ControllerNumber = ControllerNumber;
6610 ControllerInfo.FirmwareType = Controller->FirmwareType;
6611 ControllerInfo.Channels = Controller->Channels;
6612 ControllerInfo.Targets = Controller->Targets;
6613 ControllerInfo.PCI_Bus = Controller->Bus;
6614 ControllerInfo.PCI_Device = Controller->Device;
6615 ControllerInfo.PCI_Function = Controller->Function;
6616 ControllerInfo.IRQ_Channel = Controller->IRQ_Channel;
6617 ControllerInfo.PCI_Address = Controller->PCI_Address;
6618 strcpy(ControllerInfo.ModelName, Controller->ModelName);
6619 strcpy(ControllerInfo.FirmwareVersion, Controller->FirmwareVersion);
6620 ErrorCode = (copy_to_user(UserSpaceControllerInfo, &ControllerInfo,
6621 sizeof(DAC960_ControllerInfo_T)) ? -EFAULT : 0);
6622 out:
6623 return ErrorCode;
6624 }
6625
DAC960_gam_v1_execute_command(DAC960_V1_UserCommand_T __user * UserSpaceUserCommand)6626 static long DAC960_gam_v1_execute_command(DAC960_V1_UserCommand_T __user *UserSpaceUserCommand)
6627 {
6628 DAC960_V1_UserCommand_T UserCommand;
6629 DAC960_Controller_T *Controller;
6630 DAC960_Command_T *Command = NULL;
6631 DAC960_V1_CommandOpcode_T CommandOpcode;
6632 DAC960_V1_CommandStatus_T CommandStatus;
6633 DAC960_V1_DCDB_T DCDB;
6634 DAC960_V1_DCDB_T *DCDB_IOBUF = NULL;
6635 dma_addr_t DCDB_IOBUFDMA;
6636 unsigned long flags;
6637 int ControllerNumber, DataTransferLength;
6638 unsigned char *DataTransferBuffer = NULL;
6639 dma_addr_t DataTransferBufferDMA;
6640 long ErrorCode;
6641
6642 if (UserSpaceUserCommand == NULL) {
6643 ErrorCode = -EINVAL;
6644 goto out;
6645 }
6646 if (copy_from_user(&UserCommand, UserSpaceUserCommand,
6647 sizeof(DAC960_V1_UserCommand_T))) {
6648 ErrorCode = -EFAULT;
6649 goto out;
6650 }
6651 ControllerNumber = UserCommand.ControllerNumber;
6652 ErrorCode = -ENXIO;
6653 if (ControllerNumber < 0 ||
6654 ControllerNumber > DAC960_ControllerCount - 1)
6655 goto out;
6656 Controller = DAC960_Controllers[ControllerNumber];
6657 if (Controller == NULL)
6658 goto out;
6659 ErrorCode = -EINVAL;
6660 if (Controller->FirmwareType != DAC960_V1_Controller)
6661 goto out;
6662 CommandOpcode = UserCommand.CommandMailbox.Common.CommandOpcode;
6663 DataTransferLength = UserCommand.DataTransferLength;
6664 if (CommandOpcode & 0x80)
6665 goto out;
6666 if (CommandOpcode == DAC960_V1_DCDB)
6667 {
6668 if (copy_from_user(&DCDB, UserCommand.DCDB,
6669 sizeof(DAC960_V1_DCDB_T))) {
6670 ErrorCode = -EFAULT;
6671 goto out;
6672 }
6673 if (DCDB.Channel >= DAC960_V1_MaxChannels)
6674 goto out;
6675 if (!((DataTransferLength == 0 &&
6676 DCDB.Direction
6677 == DAC960_V1_DCDB_NoDataTransfer) ||
6678 (DataTransferLength > 0 &&
6679 DCDB.Direction
6680 == DAC960_V1_DCDB_DataTransferDeviceToSystem) ||
6681 (DataTransferLength < 0 &&
6682 DCDB.Direction
6683 == DAC960_V1_DCDB_DataTransferSystemToDevice)))
6684 goto out;
6685 if (((DCDB.TransferLengthHigh4 << 16) | DCDB.TransferLength)
6686 != abs(DataTransferLength))
6687 goto out;
6688 DCDB_IOBUF = pci_alloc_consistent(Controller->PCIDevice,
6689 sizeof(DAC960_V1_DCDB_T), &DCDB_IOBUFDMA);
6690 if (DCDB_IOBUF == NULL) {
6691 ErrorCode = -ENOMEM;
6692 goto out;
6693 }
6694 }
6695 ErrorCode = -ENOMEM;
6696 if (DataTransferLength > 0)
6697 {
6698 DataTransferBuffer = pci_zalloc_consistent(Controller->PCIDevice,
6699 DataTransferLength,
6700 &DataTransferBufferDMA);
6701 if (DataTransferBuffer == NULL)
6702 goto out;
6703 }
6704 else if (DataTransferLength < 0)
6705 {
6706 DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice,
6707 -DataTransferLength, &DataTransferBufferDMA);
6708 if (DataTransferBuffer == NULL)
6709 goto out;
6710 if (copy_from_user(DataTransferBuffer,
6711 UserCommand.DataTransferBuffer,
6712 -DataTransferLength)) {
6713 ErrorCode = -EFAULT;
6714 goto out;
6715 }
6716 }
6717 if (CommandOpcode == DAC960_V1_DCDB)
6718 {
6719 spin_lock_irqsave(&Controller->queue_lock, flags);
6720 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6721 DAC960_WaitForCommand(Controller);
6722 while (Controller->V1.DirectCommandActive[DCDB.Channel]
6723 [DCDB.TargetID])
6724 {
6725 spin_unlock_irq(&Controller->queue_lock);
6726 __wait_event(Controller->CommandWaitQueue,
6727 !Controller->V1.DirectCommandActive
6728 [DCDB.Channel][DCDB.TargetID]);
6729 spin_lock_irq(&Controller->queue_lock);
6730 }
6731 Controller->V1.DirectCommandActive[DCDB.Channel]
6732 [DCDB.TargetID] = true;
6733 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6734 DAC960_V1_ClearCommand(Command);
6735 Command->CommandType = DAC960_ImmediateCommand;
6736 memcpy(&Command->V1.CommandMailbox, &UserCommand.CommandMailbox,
6737 sizeof(DAC960_V1_CommandMailbox_T));
6738 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_IOBUFDMA;
6739 DCDB.BusAddress = DataTransferBufferDMA;
6740 memcpy(DCDB_IOBUF, &DCDB, sizeof(DAC960_V1_DCDB_T));
6741 }
6742 else
6743 {
6744 spin_lock_irqsave(&Controller->queue_lock, flags);
6745 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6746 DAC960_WaitForCommand(Controller);
6747 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6748 DAC960_V1_ClearCommand(Command);
6749 Command->CommandType = DAC960_ImmediateCommand;
6750 memcpy(&Command->V1.CommandMailbox, &UserCommand.CommandMailbox,
6751 sizeof(DAC960_V1_CommandMailbox_T));
6752 if (DataTransferBuffer != NULL)
6753 Command->V1.CommandMailbox.Type3.BusAddress =
6754 DataTransferBufferDMA;
6755 }
6756 DAC960_ExecuteCommand(Command);
6757 CommandStatus = Command->V1.CommandStatus;
6758 spin_lock_irqsave(&Controller->queue_lock, flags);
6759 DAC960_DeallocateCommand(Command);
6760 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6761 if (DataTransferLength > 0)
6762 {
6763 if (copy_to_user(UserCommand.DataTransferBuffer,
6764 DataTransferBuffer, DataTransferLength)) {
6765 ErrorCode = -EFAULT;
6766 goto Failure1;
6767 }
6768 }
6769 if (CommandOpcode == DAC960_V1_DCDB)
6770 {
6771 /*
6772 I don't believe Target or Channel in the DCDB_IOBUF
6773 should be any different from the contents of DCDB.
6774 */
6775 Controller->V1.DirectCommandActive[DCDB.Channel]
6776 [DCDB.TargetID] = false;
6777 if (copy_to_user(UserCommand.DCDB, DCDB_IOBUF,
6778 sizeof(DAC960_V1_DCDB_T))) {
6779 ErrorCode = -EFAULT;
6780 goto Failure1;
6781 }
6782 }
6783 ErrorCode = CommandStatus;
6784 Failure1:
6785 if (DataTransferBuffer != NULL)
6786 pci_free_consistent(Controller->PCIDevice, abs(DataTransferLength),
6787 DataTransferBuffer, DataTransferBufferDMA);
6788 if (DCDB_IOBUF != NULL)
6789 pci_free_consistent(Controller->PCIDevice, sizeof(DAC960_V1_DCDB_T),
6790 DCDB_IOBUF, DCDB_IOBUFDMA);
6791 out:
6792 return ErrorCode;
6793 }
6794
DAC960_gam_v2_execute_command(DAC960_V2_UserCommand_T __user * UserSpaceUserCommand)6795 static long DAC960_gam_v2_execute_command(DAC960_V2_UserCommand_T __user *UserSpaceUserCommand)
6796 {
6797 DAC960_V2_UserCommand_T UserCommand;
6798 DAC960_Controller_T *Controller;
6799 DAC960_Command_T *Command = NULL;
6800 DAC960_V2_CommandMailbox_T *CommandMailbox;
6801 DAC960_V2_CommandStatus_T CommandStatus;
6802 unsigned long flags;
6803 int ControllerNumber, DataTransferLength;
6804 int DataTransferResidue, RequestSenseLength;
6805 unsigned char *DataTransferBuffer = NULL;
6806 dma_addr_t DataTransferBufferDMA;
6807 unsigned char *RequestSenseBuffer = NULL;
6808 dma_addr_t RequestSenseBufferDMA;
6809 long ErrorCode = -EINVAL;
6810
6811 if (UserSpaceUserCommand == NULL)
6812 goto out;
6813 if (copy_from_user(&UserCommand, UserSpaceUserCommand,
6814 sizeof(DAC960_V2_UserCommand_T))) {
6815 ErrorCode = -EFAULT;
6816 goto out;
6817 }
6818 ErrorCode = -ENXIO;
6819 ControllerNumber = UserCommand.ControllerNumber;
6820 if (ControllerNumber < 0 ||
6821 ControllerNumber > DAC960_ControllerCount - 1)
6822 goto out;
6823 Controller = DAC960_Controllers[ControllerNumber];
6824 if (Controller == NULL)
6825 goto out;
6826 if (Controller->FirmwareType != DAC960_V2_Controller){
6827 ErrorCode = -EINVAL;
6828 goto out;
6829 }
6830 DataTransferLength = UserCommand.DataTransferLength;
6831 ErrorCode = -ENOMEM;
6832 if (DataTransferLength > 0)
6833 {
6834 DataTransferBuffer = pci_zalloc_consistent(Controller->PCIDevice,
6835 DataTransferLength,
6836 &DataTransferBufferDMA);
6837 if (DataTransferBuffer == NULL)
6838 goto out;
6839 }
6840 else if (DataTransferLength < 0)
6841 {
6842 DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice,
6843 -DataTransferLength, &DataTransferBufferDMA);
6844 if (DataTransferBuffer == NULL)
6845 goto out;
6846 if (copy_from_user(DataTransferBuffer,
6847 UserCommand.DataTransferBuffer,
6848 -DataTransferLength)) {
6849 ErrorCode = -EFAULT;
6850 goto Failure2;
6851 }
6852 }
6853 RequestSenseLength = UserCommand.RequestSenseLength;
6854 if (RequestSenseLength > 0)
6855 {
6856 RequestSenseBuffer = pci_zalloc_consistent(Controller->PCIDevice,
6857 RequestSenseLength,
6858 &RequestSenseBufferDMA);
6859 if (RequestSenseBuffer == NULL)
6860 {
6861 ErrorCode = -ENOMEM;
6862 goto Failure2;
6863 }
6864 }
6865 spin_lock_irqsave(&Controller->queue_lock, flags);
6866 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6867 DAC960_WaitForCommand(Controller);
6868 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6869 DAC960_V2_ClearCommand(Command);
6870 Command->CommandType = DAC960_ImmediateCommand;
6871 CommandMailbox = &Command->V2.CommandMailbox;
6872 memcpy(CommandMailbox, &UserCommand.CommandMailbox,
6873 sizeof(DAC960_V2_CommandMailbox_T));
6874 CommandMailbox->Common.CommandControlBits
6875 .AdditionalScatterGatherListMemory = false;
6876 CommandMailbox->Common.CommandControlBits
6877 .NoAutoRequestSense = true;
6878 CommandMailbox->Common.DataTransferSize = 0;
6879 CommandMailbox->Common.DataTransferPageNumber = 0;
6880 memset(&CommandMailbox->Common.DataTransferMemoryAddress, 0,
6881 sizeof(DAC960_V2_DataTransferMemoryAddress_T));
6882 if (DataTransferLength != 0)
6883 {
6884 if (DataTransferLength > 0)
6885 {
6886 CommandMailbox->Common.CommandControlBits
6887 .DataTransferControllerToHost = true;
6888 CommandMailbox->Common.DataTransferSize = DataTransferLength;
6889 }
6890 else
6891 {
6892 CommandMailbox->Common.CommandControlBits
6893 .DataTransferControllerToHost = false;
6894 CommandMailbox->Common.DataTransferSize = -DataTransferLength;
6895 }
6896 CommandMailbox->Common.DataTransferMemoryAddress
6897 .ScatterGatherSegments[0]
6898 .SegmentDataPointer = DataTransferBufferDMA;
6899 CommandMailbox->Common.DataTransferMemoryAddress
6900 .ScatterGatherSegments[0]
6901 .SegmentByteCount =
6902 CommandMailbox->Common.DataTransferSize;
6903 }
6904 if (RequestSenseLength > 0)
6905 {
6906 CommandMailbox->Common.CommandControlBits
6907 .NoAutoRequestSense = false;
6908 CommandMailbox->Common.RequestSenseSize = RequestSenseLength;
6909 CommandMailbox->Common.RequestSenseBusAddress =
6910 RequestSenseBufferDMA;
6911 }
6912 DAC960_ExecuteCommand(Command);
6913 CommandStatus = Command->V2.CommandStatus;
6914 RequestSenseLength = Command->V2.RequestSenseLength;
6915 DataTransferResidue = Command->V2.DataTransferResidue;
6916 spin_lock_irqsave(&Controller->queue_lock, flags);
6917 DAC960_DeallocateCommand(Command);
6918 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6919 if (RequestSenseLength > UserCommand.RequestSenseLength)
6920 RequestSenseLength = UserCommand.RequestSenseLength;
6921 if (copy_to_user(&UserSpaceUserCommand->DataTransferLength,
6922 &DataTransferResidue,
6923 sizeof(DataTransferResidue))) {
6924 ErrorCode = -EFAULT;
6925 goto Failure2;
6926 }
6927 if (copy_to_user(&UserSpaceUserCommand->RequestSenseLength,
6928 &RequestSenseLength, sizeof(RequestSenseLength))) {
6929 ErrorCode = -EFAULT;
6930 goto Failure2;
6931 }
6932 if (DataTransferLength > 0)
6933 {
6934 if (copy_to_user(UserCommand.DataTransferBuffer,
6935 DataTransferBuffer, DataTransferLength)) {
6936 ErrorCode = -EFAULT;
6937 goto Failure2;
6938 }
6939 }
6940 if (RequestSenseLength > 0)
6941 {
6942 if (copy_to_user(UserCommand.RequestSenseBuffer,
6943 RequestSenseBuffer, RequestSenseLength)) {
6944 ErrorCode = -EFAULT;
6945 goto Failure2;
6946 }
6947 }
6948 ErrorCode = CommandStatus;
6949 Failure2:
6950 pci_free_consistent(Controller->PCIDevice, abs(DataTransferLength),
6951 DataTransferBuffer, DataTransferBufferDMA);
6952 if (RequestSenseBuffer != NULL)
6953 pci_free_consistent(Controller->PCIDevice, RequestSenseLength,
6954 RequestSenseBuffer, RequestSenseBufferDMA);
6955 out:
6956 return ErrorCode;
6957 }
6958
DAC960_gam_v2_get_health_status(DAC960_V2_GetHealthStatus_T __user * UserSpaceGetHealthStatus)6959 static long DAC960_gam_v2_get_health_status(DAC960_V2_GetHealthStatus_T __user *UserSpaceGetHealthStatus)
6960 {
6961 DAC960_V2_GetHealthStatus_T GetHealthStatus;
6962 DAC960_V2_HealthStatusBuffer_T HealthStatusBuffer;
6963 DAC960_Controller_T *Controller;
6964 int ControllerNumber;
6965 long ErrorCode;
6966
6967 if (UserSpaceGetHealthStatus == NULL) {
6968 ErrorCode = -EINVAL;
6969 goto out;
6970 }
6971 if (copy_from_user(&GetHealthStatus, UserSpaceGetHealthStatus,
6972 sizeof(DAC960_V2_GetHealthStatus_T))) {
6973 ErrorCode = -EFAULT;
6974 goto out;
6975 }
6976 ErrorCode = -ENXIO;
6977 ControllerNumber = GetHealthStatus.ControllerNumber;
6978 if (ControllerNumber < 0 ||
6979 ControllerNumber > DAC960_ControllerCount - 1)
6980 goto out;
6981 Controller = DAC960_Controllers[ControllerNumber];
6982 if (Controller == NULL)
6983 goto out;
6984 if (Controller->FirmwareType != DAC960_V2_Controller) {
6985 ErrorCode = -EINVAL;
6986 goto out;
6987 }
6988 if (copy_from_user(&HealthStatusBuffer,
6989 GetHealthStatus.HealthStatusBuffer,
6990 sizeof(DAC960_V2_HealthStatusBuffer_T))) {
6991 ErrorCode = -EFAULT;
6992 goto out;
6993 }
6994 ErrorCode = wait_event_interruptible_timeout(Controller->HealthStatusWaitQueue,
6995 !(Controller->V2.HealthStatusBuffer->StatusChangeCounter
6996 == HealthStatusBuffer.StatusChangeCounter &&
6997 Controller->V2.HealthStatusBuffer->NextEventSequenceNumber
6998 == HealthStatusBuffer.NextEventSequenceNumber),
6999 DAC960_MonitoringTimerInterval);
7000 if (ErrorCode == -ERESTARTSYS) {
7001 ErrorCode = -EINTR;
7002 goto out;
7003 }
7004 if (copy_to_user(GetHealthStatus.HealthStatusBuffer,
7005 Controller->V2.HealthStatusBuffer,
7006 sizeof(DAC960_V2_HealthStatusBuffer_T)))
7007 ErrorCode = -EFAULT;
7008 else
7009 ErrorCode = 0;
7010
7011 out:
7012 return ErrorCode;
7013 }
7014
7015 /*
7016 * DAC960_gam_ioctl is the ioctl function for performing RAID operations.
7017 */
7018
DAC960_gam_ioctl(struct file * file,unsigned int Request,unsigned long Argument)7019 static long DAC960_gam_ioctl(struct file *file, unsigned int Request,
7020 unsigned long Argument)
7021 {
7022 long ErrorCode = 0;
7023 void __user *argp = (void __user *)Argument;
7024 if (!capable(CAP_SYS_ADMIN)) return -EACCES;
7025
7026 mutex_lock(&DAC960_mutex);
7027 switch (Request)
7028 {
7029 case DAC960_IOCTL_GET_CONTROLLER_COUNT:
7030 ErrorCode = DAC960_ControllerCount;
7031 break;
7032 case DAC960_IOCTL_GET_CONTROLLER_INFO:
7033 ErrorCode = DAC960_gam_get_controller_info(argp);
7034 break;
7035 case DAC960_IOCTL_V1_EXECUTE_COMMAND:
7036 ErrorCode = DAC960_gam_v1_execute_command(argp);
7037 break;
7038 case DAC960_IOCTL_V2_EXECUTE_COMMAND:
7039 ErrorCode = DAC960_gam_v2_execute_command(argp);
7040 break;
7041 case DAC960_IOCTL_V2_GET_HEALTH_STATUS:
7042 ErrorCode = DAC960_gam_v2_get_health_status(argp);
7043 break;
7044 default:
7045 ErrorCode = -ENOTTY;
7046 }
7047 mutex_unlock(&DAC960_mutex);
7048 return ErrorCode;
7049 }
7050
7051 static const struct file_operations DAC960_gam_fops = {
7052 .owner = THIS_MODULE,
7053 .unlocked_ioctl = DAC960_gam_ioctl,
7054 .llseek = noop_llseek,
7055 };
7056
7057 static struct miscdevice DAC960_gam_dev = {
7058 DAC960_GAM_MINOR,
7059 "dac960_gam",
7060 &DAC960_gam_fops
7061 };
7062
DAC960_gam_init(void)7063 static int DAC960_gam_init(void)
7064 {
7065 int ret;
7066
7067 ret = misc_register(&DAC960_gam_dev);
7068 if (ret)
7069 printk(KERN_ERR "DAC960_gam: can't misc_register on minor %d\n", DAC960_GAM_MINOR);
7070 return ret;
7071 }
7072
DAC960_gam_cleanup(void)7073 static void DAC960_gam_cleanup(void)
7074 {
7075 misc_deregister(&DAC960_gam_dev);
7076 }
7077
7078 #endif /* DAC960_GAM_MINOR */
7079
7080 static struct DAC960_privdata DAC960_GEM_privdata = {
7081 .HardwareType = DAC960_GEM_Controller,
7082 .FirmwareType = DAC960_V2_Controller,
7083 .InterruptHandler = DAC960_GEM_InterruptHandler,
7084 .MemoryWindowSize = DAC960_GEM_RegisterWindowSize,
7085 };
7086
7087
7088 static struct DAC960_privdata DAC960_BA_privdata = {
7089 .HardwareType = DAC960_BA_Controller,
7090 .FirmwareType = DAC960_V2_Controller,
7091 .InterruptHandler = DAC960_BA_InterruptHandler,
7092 .MemoryWindowSize = DAC960_BA_RegisterWindowSize,
7093 };
7094
7095 static struct DAC960_privdata DAC960_LP_privdata = {
7096 .HardwareType = DAC960_LP_Controller,
7097 .FirmwareType = DAC960_V2_Controller,
7098 .InterruptHandler = DAC960_LP_InterruptHandler,
7099 .MemoryWindowSize = DAC960_LP_RegisterWindowSize,
7100 };
7101
7102 static struct DAC960_privdata DAC960_LA_privdata = {
7103 .HardwareType = DAC960_LA_Controller,
7104 .FirmwareType = DAC960_V1_Controller,
7105 .InterruptHandler = DAC960_LA_InterruptHandler,
7106 .MemoryWindowSize = DAC960_LA_RegisterWindowSize,
7107 };
7108
7109 static struct DAC960_privdata DAC960_PG_privdata = {
7110 .HardwareType = DAC960_PG_Controller,
7111 .FirmwareType = DAC960_V1_Controller,
7112 .InterruptHandler = DAC960_PG_InterruptHandler,
7113 .MemoryWindowSize = DAC960_PG_RegisterWindowSize,
7114 };
7115
7116 static struct DAC960_privdata DAC960_PD_privdata = {
7117 .HardwareType = DAC960_PD_Controller,
7118 .FirmwareType = DAC960_V1_Controller,
7119 .InterruptHandler = DAC960_PD_InterruptHandler,
7120 .MemoryWindowSize = DAC960_PD_RegisterWindowSize,
7121 };
7122
7123 static struct DAC960_privdata DAC960_P_privdata = {
7124 .HardwareType = DAC960_P_Controller,
7125 .FirmwareType = DAC960_V1_Controller,
7126 .InterruptHandler = DAC960_P_InterruptHandler,
7127 .MemoryWindowSize = DAC960_PD_RegisterWindowSize,
7128 };
7129
7130 static const struct pci_device_id DAC960_id_table[] = {
7131 {
7132 .vendor = PCI_VENDOR_ID_MYLEX,
7133 .device = PCI_DEVICE_ID_MYLEX_DAC960_GEM,
7134 .subvendor = PCI_VENDOR_ID_MYLEX,
7135 .subdevice = PCI_ANY_ID,
7136 .driver_data = (unsigned long) &DAC960_GEM_privdata,
7137 },
7138 {
7139 .vendor = PCI_VENDOR_ID_MYLEX,
7140 .device = PCI_DEVICE_ID_MYLEX_DAC960_BA,
7141 .subvendor = PCI_ANY_ID,
7142 .subdevice = PCI_ANY_ID,
7143 .driver_data = (unsigned long) &DAC960_BA_privdata,
7144 },
7145 {
7146 .vendor = PCI_VENDOR_ID_MYLEX,
7147 .device = PCI_DEVICE_ID_MYLEX_DAC960_LP,
7148 .subvendor = PCI_ANY_ID,
7149 .subdevice = PCI_ANY_ID,
7150 .driver_data = (unsigned long) &DAC960_LP_privdata,
7151 },
7152 {
7153 .vendor = PCI_VENDOR_ID_DEC,
7154 .device = PCI_DEVICE_ID_DEC_21285,
7155 .subvendor = PCI_VENDOR_ID_MYLEX,
7156 .subdevice = PCI_DEVICE_ID_MYLEX_DAC960_LA,
7157 .driver_data = (unsigned long) &DAC960_LA_privdata,
7158 },
7159 {
7160 .vendor = PCI_VENDOR_ID_MYLEX,
7161 .device = PCI_DEVICE_ID_MYLEX_DAC960_PG,
7162 .subvendor = PCI_ANY_ID,
7163 .subdevice = PCI_ANY_ID,
7164 .driver_data = (unsigned long) &DAC960_PG_privdata,
7165 },
7166 {
7167 .vendor = PCI_VENDOR_ID_MYLEX,
7168 .device = PCI_DEVICE_ID_MYLEX_DAC960_PD,
7169 .subvendor = PCI_ANY_ID,
7170 .subdevice = PCI_ANY_ID,
7171 .driver_data = (unsigned long) &DAC960_PD_privdata,
7172 },
7173 {
7174 .vendor = PCI_VENDOR_ID_MYLEX,
7175 .device = PCI_DEVICE_ID_MYLEX_DAC960_P,
7176 .subvendor = PCI_ANY_ID,
7177 .subdevice = PCI_ANY_ID,
7178 .driver_data = (unsigned long) &DAC960_P_privdata,
7179 },
7180 {0, },
7181 };
7182
7183 MODULE_DEVICE_TABLE(pci, DAC960_id_table);
7184
7185 static struct pci_driver DAC960_pci_driver = {
7186 .name = "DAC960",
7187 .id_table = DAC960_id_table,
7188 .probe = DAC960_Probe,
7189 .remove = DAC960_Remove,
7190 };
7191
DAC960_init_module(void)7192 static int __init DAC960_init_module(void)
7193 {
7194 int ret;
7195
7196 ret = pci_register_driver(&DAC960_pci_driver);
7197 #ifdef DAC960_GAM_MINOR
7198 if (!ret)
7199 DAC960_gam_init();
7200 #endif
7201 return ret;
7202 }
7203
DAC960_cleanup_module(void)7204 static void __exit DAC960_cleanup_module(void)
7205 {
7206 int i;
7207
7208 #ifdef DAC960_GAM_MINOR
7209 DAC960_gam_cleanup();
7210 #endif
7211
7212 for (i = 0; i < DAC960_ControllerCount; i++) {
7213 DAC960_Controller_T *Controller = DAC960_Controllers[i];
7214 if (Controller == NULL)
7215 continue;
7216 DAC960_FinalizeController(Controller);
7217 }
7218 if (DAC960_ProcDirectoryEntry != NULL) {
7219 remove_proc_entry("rd/status", NULL);
7220 remove_proc_entry("rd", NULL);
7221 }
7222 DAC960_ControllerCount = 0;
7223 pci_unregister_driver(&DAC960_pci_driver);
7224 }
7225
7226 module_init(DAC960_init_module);
7227 module_exit(DAC960_cleanup_module);
7228
7229 MODULE_LICENSE("GPL");
7230
