1 /*
2 * This file is part of the Chelsio T4 Ethernet driver for Linux.
3 *
4 * Copyright (c) 2003-2016 Chelsio Communications, Inc. All rights reserved.
5 *
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
11 *
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
14 * conditions are met:
15 *
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
18 * disclaimer.
19 *
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
24 *
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32 * SOFTWARE.
33 */
34
35 #ifndef __CXGB4_ULD_H
36 #define __CXGB4_ULD_H
37
38 #include <linux/cache.h>
39 #include <linux/spinlock.h>
40 #include <linux/skbuff.h>
41 #include <linux/inetdevice.h>
42 #include <linux/atomic.h>
43 #include "cxgb4.h"
44
45 #define MAX_ULD_QSETS 16
46
47 /* CPL message priority levels */
48 enum {
49 CPL_PRIORITY_DATA = 0, /* data messages */
50 CPL_PRIORITY_SETUP = 1, /* connection setup messages */
51 CPL_PRIORITY_TEARDOWN = 0, /* connection teardown messages */
52 CPL_PRIORITY_LISTEN = 1, /* listen start/stop messages */
53 CPL_PRIORITY_ACK = 1, /* RX ACK messages */
54 CPL_PRIORITY_CONTROL = 1 /* control messages */
55 };
56
57 #define INIT_TP_WR(w, tid) do { \
58 (w)->wr.wr_hi = htonl(FW_WR_OP_V(FW_TP_WR) | \
59 FW_WR_IMMDLEN_V(sizeof(*w) - sizeof(w->wr))); \
60 (w)->wr.wr_mid = htonl(FW_WR_LEN16_V(DIV_ROUND_UP(sizeof(*w), 16)) | \
61 FW_WR_FLOWID_V(tid)); \
62 (w)->wr.wr_lo = cpu_to_be64(0); \
63 } while (0)
64
65 #define INIT_TP_WR_CPL(w, cpl, tid) do { \
66 INIT_TP_WR(w, tid); \
67 OPCODE_TID(w) = htonl(MK_OPCODE_TID(cpl, tid)); \
68 } while (0)
69
70 #define INIT_ULPTX_WR(w, wrlen, atomic, tid) do { \
71 (w)->wr.wr_hi = htonl(FW_WR_OP_V(FW_ULPTX_WR) | \
72 FW_WR_ATOMIC_V(atomic)); \
73 (w)->wr.wr_mid = htonl(FW_WR_LEN16_V(DIV_ROUND_UP(wrlen, 16)) | \
74 FW_WR_FLOWID_V(tid)); \
75 (w)->wr.wr_lo = cpu_to_be64(0); \
76 } while (0)
77
78 /* Special asynchronous notification message */
79 #define CXGB4_MSG_AN ((void *)1)
80 #define TX_ULD(uld)(((uld) != CXGB4_ULD_CRYPTO) ? CXGB4_TX_OFLD :\
81 CXGB4_TX_CRYPTO)
82
83 struct serv_entry {
84 void *data;
85 };
86
87 union aopen_entry {
88 void *data;
89 union aopen_entry *next;
90 };
91
92 /*
93 * Holds the size, base address, free list start, etc of the TID, server TID,
94 * and active-open TID tables. The tables themselves are allocated dynamically.
95 */
96 struct tid_info {
97 void **tid_tab;
98 unsigned int ntids;
99
100 struct serv_entry *stid_tab;
101 unsigned long *stid_bmap;
102 unsigned int nstids;
103 unsigned int stid_base;
104 unsigned int hash_base;
105
106 union aopen_entry *atid_tab;
107 unsigned int natids;
108 unsigned int atid_base;
109
110 struct filter_entry *ftid_tab;
111 unsigned long *ftid_bmap;
112 unsigned int nftids;
113 unsigned int ftid_base;
114 unsigned int aftid_base;
115 unsigned int aftid_end;
116 /* Server filter region */
117 unsigned int sftid_base;
118 unsigned int nsftids;
119
120 spinlock_t atid_lock ____cacheline_aligned_in_smp;
121 union aopen_entry *afree;
122 unsigned int atids_in_use;
123
124 spinlock_t stid_lock;
125 unsigned int stids_in_use;
126 unsigned int v6_stids_in_use;
127 unsigned int sftids_in_use;
128
129 /* TIDs in the TCAM */
130 atomic_t tids_in_use;
131 /* TIDs in the HASH */
132 atomic_t hash_tids_in_use;
133 atomic_t conns_in_use;
134 /* lock for setting/clearing filter bitmap */
135 spinlock_t ftid_lock;
136 };
137
lookup_tid(const struct tid_info * t,unsigned int tid)138 static inline void *lookup_tid(const struct tid_info *t, unsigned int tid)
139 {
140 return tid < t->ntids ? t->tid_tab[tid] : NULL;
141 }
142
lookup_atid(const struct tid_info * t,unsigned int atid)143 static inline void *lookup_atid(const struct tid_info *t, unsigned int atid)
144 {
145 return atid < t->natids ? t->atid_tab[atid].data : NULL;
146 }
147
lookup_stid(const struct tid_info * t,unsigned int stid)148 static inline void *lookup_stid(const struct tid_info *t, unsigned int stid)
149 {
150 /* Is it a server filter TID? */
151 if (t->nsftids && (stid >= t->sftid_base)) {
152 stid -= t->sftid_base;
153 stid += t->nstids;
154 } else {
155 stid -= t->stid_base;
156 }
157
158 return stid < (t->nstids + t->nsftids) ? t->stid_tab[stid].data : NULL;
159 }
160
cxgb4_insert_tid(struct tid_info * t,void * data,unsigned int tid,unsigned short family)161 static inline void cxgb4_insert_tid(struct tid_info *t, void *data,
162 unsigned int tid, unsigned short family)
163 {
164 t->tid_tab[tid] = data;
165 if (t->hash_base && (tid >= t->hash_base)) {
166 if (family == AF_INET6)
167 atomic_add(2, &t->hash_tids_in_use);
168 else
169 atomic_inc(&t->hash_tids_in_use);
170 } else {
171 if (family == AF_INET6)
172 atomic_add(2, &t->tids_in_use);
173 else
174 atomic_inc(&t->tids_in_use);
175 }
176 atomic_inc(&t->conns_in_use);
177 }
178
179 int cxgb4_alloc_atid(struct tid_info *t, void *data);
180 int cxgb4_alloc_stid(struct tid_info *t, int family, void *data);
181 int cxgb4_alloc_sftid(struct tid_info *t, int family, void *data);
182 void cxgb4_free_atid(struct tid_info *t, unsigned int atid);
183 void cxgb4_free_stid(struct tid_info *t, unsigned int stid, int family);
184 void cxgb4_remove_tid(struct tid_info *t, unsigned int qid, unsigned int tid,
185 unsigned short family);
186 struct in6_addr;
187
188 int cxgb4_create_server(const struct net_device *dev, unsigned int stid,
189 __be32 sip, __be16 sport, __be16 vlan,
190 unsigned int queue);
191 int cxgb4_create_server6(const struct net_device *dev, unsigned int stid,
192 const struct in6_addr *sip, __be16 sport,
193 unsigned int queue);
194 int cxgb4_remove_server(const struct net_device *dev, unsigned int stid,
195 unsigned int queue, bool ipv6);
196 int cxgb4_create_server_filter(const struct net_device *dev, unsigned int stid,
197 __be32 sip, __be16 sport, __be16 vlan,
198 unsigned int queue,
199 unsigned char port, unsigned char mask);
200 int cxgb4_remove_server_filter(const struct net_device *dev, unsigned int stid,
201 unsigned int queue, bool ipv6);
202
203 /* Filter operation context to allow callers of cxgb4_set_filter() and
204 * cxgb4_del_filter() to wait for an asynchronous completion.
205 */
206 struct filter_ctx {
207 struct completion completion; /* completion rendezvous */
208 void *closure; /* caller's opaque information */
209 int result; /* result of operation */
210 u32 tid; /* to store tid */
211 };
212
213 struct ch_filter_specification;
214
215 int cxgb4_get_free_ftid(struct net_device *dev, int family);
216 int __cxgb4_set_filter(struct net_device *dev, int filter_id,
217 struct ch_filter_specification *fs,
218 struct filter_ctx *ctx);
219 int __cxgb4_del_filter(struct net_device *dev, int filter_id,
220 struct ch_filter_specification *fs,
221 struct filter_ctx *ctx);
222 int cxgb4_set_filter(struct net_device *dev, int filter_id,
223 struct ch_filter_specification *fs);
224 int cxgb4_del_filter(struct net_device *dev, int filter_id,
225 struct ch_filter_specification *fs);
226 int cxgb4_get_filter_counters(struct net_device *dev, unsigned int fidx,
227 u64 *hitcnt, u64 *bytecnt, bool hash);
228
set_wr_txq(struct sk_buff * skb,int prio,int queue)229 static inline void set_wr_txq(struct sk_buff *skb, int prio, int queue)
230 {
231 skb_set_queue_mapping(skb, (queue << 1) | prio);
232 }
233
234 enum cxgb4_uld {
235 CXGB4_ULD_INIT,
236 CXGB4_ULD_RDMA,
237 CXGB4_ULD_ISCSI,
238 CXGB4_ULD_ISCSIT,
239 CXGB4_ULD_CRYPTO,
240 CXGB4_ULD_TLS,
241 CXGB4_ULD_MAX
242 };
243
244 enum cxgb4_tx_uld {
245 CXGB4_TX_OFLD,
246 CXGB4_TX_CRYPTO,
247 CXGB4_TX_MAX
248 };
249
250 enum cxgb4_txq_type {
251 CXGB4_TXQ_ETH,
252 CXGB4_TXQ_ULD,
253 CXGB4_TXQ_CTRL,
254 CXGB4_TXQ_MAX
255 };
256
257 enum cxgb4_state {
258 CXGB4_STATE_UP,
259 CXGB4_STATE_START_RECOVERY,
260 CXGB4_STATE_DOWN,
261 CXGB4_STATE_DETACH,
262 CXGB4_STATE_FATAL_ERROR
263 };
264
265 enum cxgb4_control {
266 CXGB4_CONTROL_DB_FULL,
267 CXGB4_CONTROL_DB_EMPTY,
268 CXGB4_CONTROL_DB_DROP,
269 };
270
271 struct pci_dev;
272 struct l2t_data;
273 struct net_device;
274 struct pkt_gl;
275 struct tp_tcp_stats;
276 struct t4_lro_mgr;
277
278 struct cxgb4_range {
279 unsigned int start;
280 unsigned int size;
281 };
282
283 struct cxgb4_virt_res { /* virtualized HW resources */
284 struct cxgb4_range ddp;
285 struct cxgb4_range iscsi;
286 struct cxgb4_range stag;
287 struct cxgb4_range rq;
288 struct cxgb4_range srq;
289 struct cxgb4_range pbl;
290 struct cxgb4_range qp;
291 struct cxgb4_range cq;
292 struct cxgb4_range ocq;
293 struct cxgb4_range key;
294 unsigned int ncrypto_fc;
295 struct cxgb4_range ppod_edram;
296 };
297
298 struct chcr_stats_debug {
299 atomic_t cipher_rqst;
300 atomic_t digest_rqst;
301 atomic_t aead_rqst;
302 atomic_t complete;
303 atomic_t error;
304 atomic_t fallback;
305 atomic_t ipsec_cnt;
306 atomic_t tls_pdu_tx;
307 atomic_t tls_pdu_rx;
308 atomic_t tls_key;
309 };
310
311 #define OCQ_WIN_OFFSET(pdev, vres) \
312 (pci_resource_len((pdev), 2) - roundup_pow_of_two((vres)->ocq.size))
313
314 /*
315 * Block of information the LLD provides to ULDs attaching to a device.
316 */
317 struct cxgb4_lld_info {
318 struct pci_dev *pdev; /* associated PCI device */
319 struct l2t_data *l2t; /* L2 table */
320 struct tid_info *tids; /* TID table */
321 struct net_device **ports; /* device ports */
322 const struct cxgb4_virt_res *vr; /* assorted HW resources */
323 const unsigned short *mtus; /* MTU table */
324 const unsigned short *rxq_ids; /* the ULD's Rx queue ids */
325 const unsigned short *ciq_ids; /* the ULD's concentrator IQ ids */
326 unsigned short nrxq; /* # of Rx queues */
327 unsigned short ntxq; /* # of Tx queues */
328 unsigned short nciq; /* # of concentrator IQ */
329 unsigned char nchan:4; /* # of channels */
330 unsigned char nports:4; /* # of ports */
331 unsigned char wr_cred; /* WR 16-byte credits */
332 unsigned char adapter_type; /* type of adapter */
333 unsigned char fw_api_ver; /* FW API version */
334 unsigned char crypto; /* crypto support */
335 unsigned int fw_vers; /* FW version */
336 unsigned int iscsi_iolen; /* iSCSI max I/O length */
337 unsigned int cclk_ps; /* Core clock period in psec */
338 unsigned short udb_density; /* # of user DB/page */
339 unsigned short ucq_density; /* # of user CQs/page */
340 unsigned int sge_host_page_size; /* SGE host page size */
341 unsigned short filt_mode; /* filter optional components */
342 unsigned short tx_modq[NCHAN]; /* maps each tx channel to a */
343 /* scheduler queue */
344 void __iomem *gts_reg; /* address of GTS register */
345 void __iomem *db_reg; /* address of kernel doorbell */
346 int dbfifo_int_thresh; /* doorbell fifo int threshold */
347 unsigned int sge_ingpadboundary; /* SGE ingress padding boundary */
348 unsigned int sge_egrstatuspagesize; /* SGE egress status page size */
349 unsigned int sge_pktshift; /* Padding between CPL and */
350 /* packet data */
351 unsigned int pf; /* Physical Function we're using */
352 bool enable_fw_ofld_conn; /* Enable connection through fw */
353 /* WR */
354 unsigned int max_ordird_qp; /* Max ORD/IRD depth per RDMA QP */
355 unsigned int max_ird_adapter; /* Max IRD memory per adapter */
356 bool ulptx_memwrite_dsgl; /* use of T5 DSGL allowed */
357 unsigned int iscsi_tagmask; /* iscsi ddp tag mask */
358 unsigned int iscsi_pgsz_order; /* iscsi ddp page size orders */
359 unsigned int iscsi_llimit; /* chip's iscsi region llimit */
360 unsigned int ulp_crypto; /* crypto lookaside support */
361 void **iscsi_ppm; /* iscsi page pod manager */
362 int nodeid; /* device numa node id */
363 bool fr_nsmr_tpte_wr_support; /* FW supports FR_NSMR_TPTE_WR */
364 bool write_w_imm_support; /* FW supports WRITE_WITH_IMMEDIATE */
365 bool write_cmpl_support; /* FW supports WRITE_CMPL WR */
366 };
367
368 struct cxgb4_uld_info {
369 char name[IFNAMSIZ];
370 void *handle;
371 unsigned int nrxq;
372 unsigned int rxq_size;
373 unsigned int ntxq;
374 bool ciq;
375 bool lro;
376 void *(*add)(const struct cxgb4_lld_info *p);
377 int (*rx_handler)(void *handle, const __be64 *rsp,
378 const struct pkt_gl *gl);
379 int (*state_change)(void *handle, enum cxgb4_state new_state);
380 int (*control)(void *handle, enum cxgb4_control control, ...);
381 int (*lro_rx_handler)(void *handle, const __be64 *rsp,
382 const struct pkt_gl *gl,
383 struct t4_lro_mgr *lro_mgr,
384 struct napi_struct *napi);
385 void (*lro_flush)(struct t4_lro_mgr *);
386 int (*tx_handler)(struct sk_buff *skb, struct net_device *dev);
387 };
388
389 void cxgb4_register_uld(enum cxgb4_uld type, const struct cxgb4_uld_info *p);
390 int cxgb4_unregister_uld(enum cxgb4_uld type);
391 int cxgb4_ofld_send(struct net_device *dev, struct sk_buff *skb);
392 int cxgb4_immdata_send(struct net_device *dev, unsigned int idx,
393 const void *src, unsigned int len);
394 int cxgb4_crypto_send(struct net_device *dev, struct sk_buff *skb);
395 unsigned int cxgb4_dbfifo_count(const struct net_device *dev, int lpfifo);
396 unsigned int cxgb4_port_chan(const struct net_device *dev);
397 unsigned int cxgb4_port_e2cchan(const struct net_device *dev);
398 unsigned int cxgb4_port_viid(const struct net_device *dev);
399 unsigned int cxgb4_tp_smt_idx(enum chip_type chip, unsigned int viid);
400 unsigned int cxgb4_port_idx(const struct net_device *dev);
401 unsigned int cxgb4_best_mtu(const unsigned short *mtus, unsigned short mtu,
402 unsigned int *idx);
403 unsigned int cxgb4_best_aligned_mtu(const unsigned short *mtus,
404 unsigned short header_size,
405 unsigned short data_size_max,
406 unsigned short data_size_align,
407 unsigned int *mtu_idxp);
408 void cxgb4_get_tcp_stats(struct pci_dev *pdev, struct tp_tcp_stats *v4,
409 struct tp_tcp_stats *v6);
410 void cxgb4_iscsi_init(struct net_device *dev, unsigned int tag_mask,
411 const unsigned int *pgsz_order);
412 struct sk_buff *cxgb4_pktgl_to_skb(const struct pkt_gl *gl,
413 unsigned int skb_len, unsigned int pull_len);
414 int cxgb4_sync_txq_pidx(struct net_device *dev, u16 qid, u16 pidx, u16 size);
415 int cxgb4_flush_eq_cache(struct net_device *dev);
416 int cxgb4_read_tpte(struct net_device *dev, u32 stag, __be32 *tpte);
417 u64 cxgb4_read_sge_timestamp(struct net_device *dev);
418
419 enum cxgb4_bar2_qtype { CXGB4_BAR2_QTYPE_EGRESS, CXGB4_BAR2_QTYPE_INGRESS };
420 int cxgb4_bar2_sge_qregs(struct net_device *dev,
421 unsigned int qid,
422 enum cxgb4_bar2_qtype qtype,
423 int user,
424 u64 *pbar2_qoffset,
425 unsigned int *pbar2_qid);
426
427 #endif /* !__CXGB4_ULD_H */
428
