1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * V4L2 Media Controller Driver for Freescale i.MX5/6 SOC
4  *
5  * Copyright (c) 2016 Mentor Graphics Inc.
6  */
7 #ifndef _IMX_MEDIA_H
8 #define _IMX_MEDIA_H
9 
10 #include <linux/platform_device.h>
11 #include <media/v4l2-ctrls.h>
12 #include <media/v4l2-device.h>
13 #include <media/v4l2-fwnode.h>
14 #include <media/v4l2-subdev.h>
15 #include <media/videobuf2-dma-contig.h>
16 #include <video/imx-ipu-v3.h>
17 
18 /*
19  * Enumeration of the IPU internal sub-devices
20  */
21 enum {
22 	IPU_CSI0 = 0,
23 	IPU_CSI1,
24 	IPU_VDIC,
25 	IPU_IC_PRP,
26 	IPU_IC_PRPENC,
27 	IPU_IC_PRPVF,
28 	NUM_IPU_SUBDEVS,
29 };
30 
31 /*
32  * Pad definitions for the subdevs with multiple source or
33  * sink pads
34  */
35 
36 /* ipu_csi */
37 enum {
38 	CSI_SINK_PAD = 0,
39 	CSI_SRC_PAD_DIRECT,
40 	CSI_SRC_PAD_IDMAC,
41 	CSI_NUM_PADS,
42 };
43 
44 /* ipu_vdic */
45 enum {
46 	VDIC_SINK_PAD_DIRECT = 0,
47 	VDIC_SINK_PAD_IDMAC,
48 	VDIC_SRC_PAD_DIRECT,
49 	VDIC_NUM_PADS,
50 };
51 
52 /* ipu_ic_prp */
53 enum {
54 	PRP_SINK_PAD = 0,
55 	PRP_SRC_PAD_PRPENC,
56 	PRP_SRC_PAD_PRPVF,
57 	PRP_NUM_PADS,
58 };
59 
60 /* ipu_ic_prpencvf */
61 enum {
62 	PRPENCVF_SINK_PAD = 0,
63 	PRPENCVF_SRC_PAD,
64 	PRPENCVF_NUM_PADS,
65 };
66 
67 /* How long to wait for EOF interrupts in the buffer-capture subdevs */
68 #define IMX_MEDIA_EOF_TIMEOUT       1000
69 
70 struct imx_media_pixfmt {
71 	u32     fourcc;
72 	u32     codes[4];
73 	int     bpp;     /* total bpp */
74 	/* cycles per pixel for generic (bayer) formats for the parallel bus */
75 	int	cycles;
76 	enum ipu_color_space cs;
77 	bool    planar;  /* is a planar format */
78 	bool    bayer;   /* is a raw bayer format */
79 	bool    ipufmt;  /* is one of the IPU internal formats */
80 };
81 
82 struct imx_media_buffer {
83 	struct vb2_v4l2_buffer vbuf; /* v4l buffer must be first */
84 	struct list_head  list;
85 };
86 
87 struct imx_media_video_dev {
88 	struct video_device *vfd;
89 
90 	/* the user format */
91 	struct v4l2_format fmt;
92 	/* the compose rectangle */
93 	struct v4l2_rect compose;
94 	const struct imx_media_pixfmt *cc;
95 
96 	/* links this vdev to master list */
97 	struct list_head list;
98 };
99 
to_imx_media_vb(struct vb2_buffer * vb)100 static inline struct imx_media_buffer *to_imx_media_vb(struct vb2_buffer *vb)
101 {
102 	struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
103 
104 	return container_of(vbuf, struct imx_media_buffer, vbuf);
105 }
106 
107 /*
108  * to support control inheritance to video devices, this
109  * retrieves a pad's list_head of video devices that can
110  * be reached from the pad. Note that only the lists in
111  * source pads get populated, sink pads have empty lists.
112  */
113 static inline struct list_head *
to_pad_vdev_list(struct v4l2_subdev * sd,int pad_index)114 to_pad_vdev_list(struct v4l2_subdev *sd, int pad_index)
115 {
116 	struct list_head *vdev_list = sd->host_priv;
117 
118 	return vdev_list ? &vdev_list[pad_index] : NULL;
119 }
120 
121 /* an entry in a pad's video device list */
122 struct imx_media_pad_vdev {
123 	struct imx_media_video_dev *vdev;
124 	struct list_head list;
125 };
126 
127 struct imx_media_dev {
128 	struct media_device md;
129 	struct v4l2_device  v4l2_dev;
130 
131 	/* the pipeline object */
132 	struct media_pipeline pipe;
133 
134 	struct mutex mutex; /* protect elements below */
135 
136 	/* master video device list */
137 	struct list_head vdev_list;
138 
139 	/* IPUs this media driver control, valid after subdevs bound */
140 	struct ipu_soc *ipu[2];
141 
142 	/* for async subdev registration */
143 	struct v4l2_async_notifier notifier;
144 
145 	/* IC scaler/CSC mem2mem video device */
146 	struct imx_media_video_dev *m2m_vdev;
147 
148 	/* the IPU internal subdev's registered synchronously */
149 	struct v4l2_subdev *sync_sd[2][NUM_IPU_SUBDEVS];
150 };
151 
152 enum codespace_sel {
153 	CS_SEL_YUV = 0,
154 	CS_SEL_RGB,
155 	CS_SEL_ANY,
156 };
157 
158 /* imx-media-utils.c */
159 const struct imx_media_pixfmt *
160 imx_media_find_format(u32 fourcc, enum codespace_sel cs_sel, bool allow_bayer);
161 int imx_media_enum_format(u32 *fourcc, u32 index, enum codespace_sel cs_sel);
162 const struct imx_media_pixfmt *
163 imx_media_find_mbus_format(u32 code, enum codespace_sel cs_sel,
164 			   bool allow_bayer);
165 int imx_media_enum_mbus_format(u32 *code, u32 index, enum codespace_sel cs_sel,
166 			       bool allow_bayer);
167 const struct imx_media_pixfmt *
168 imx_media_find_ipu_format(u32 code, enum codespace_sel cs_sel);
169 int imx_media_enum_ipu_format(u32 *code, u32 index, enum codespace_sel cs_sel);
170 int imx_media_init_mbus_fmt(struct v4l2_mbus_framefmt *mbus,
171 			    u32 width, u32 height, u32 code, u32 field,
172 			    const struct imx_media_pixfmt **cc);
173 int imx_media_init_cfg(struct v4l2_subdev *sd,
174 		       struct v4l2_subdev_pad_config *cfg);
175 void imx_media_try_colorimetry(struct v4l2_mbus_framefmt *tryfmt,
176 			       bool ic_route);
177 int imx_media_mbus_fmt_to_pix_fmt(struct v4l2_pix_format *pix,
178 				  struct v4l2_mbus_framefmt *mbus,
179 				  const struct imx_media_pixfmt *cc);
180 int imx_media_mbus_fmt_to_ipu_image(struct ipu_image *image,
181 				    struct v4l2_mbus_framefmt *mbus);
182 int imx_media_ipu_image_to_mbus_fmt(struct v4l2_mbus_framefmt *mbus,
183 				    struct ipu_image *image);
184 void imx_media_grp_id_to_sd_name(char *sd_name, int sz,
185 				 u32 grp_id, int ipu_id);
186 struct v4l2_subdev *
187 imx_media_find_subdev_by_fwnode(struct imx_media_dev *imxmd,
188 				struct fwnode_handle *fwnode);
189 struct v4l2_subdev *
190 imx_media_find_subdev_by_devname(struct imx_media_dev *imxmd,
191 				 const char *devname);
192 void imx_media_add_video_device(struct imx_media_dev *imxmd,
193 				struct imx_media_video_dev *vdev);
194 int imx_media_pipeline_csi2_channel(struct media_entity *start_entity);
195 struct media_pad *
196 imx_media_pipeline_pad(struct media_entity *start_entity, u32 grp_id,
197 		       enum v4l2_buf_type buftype, bool upstream);
198 struct v4l2_subdev *
199 imx_media_pipeline_subdev(struct media_entity *start_entity, u32 grp_id,
200 			  bool upstream);
201 struct video_device *
202 imx_media_pipeline_video_device(struct media_entity *start_entity,
203 				enum v4l2_buf_type buftype, bool upstream);
204 
205 struct imx_media_dma_buf {
206 	void          *virt;
207 	dma_addr_t     phys;
208 	unsigned long  len;
209 };
210 
211 void imx_media_free_dma_buf(struct device *dev,
212 			    struct imx_media_dma_buf *buf);
213 int imx_media_alloc_dma_buf(struct device *dev,
214 			    struct imx_media_dma_buf *buf,
215 			    int size);
216 
217 int imx_media_pipeline_set_stream(struct imx_media_dev *imxmd,
218 				  struct media_entity *entity,
219 				  bool on);
220 
221 /* imx-media-dev-common.c */
222 int imx_media_probe_complete(struct v4l2_async_notifier *notifier);
223 struct imx_media_dev *imx_media_dev_init(struct device *dev,
224 					 const struct media_device_ops *ops);
225 int imx_media_dev_notifier_register(struct imx_media_dev *imxmd,
226 			    const struct v4l2_async_notifier_operations *ops);
227 
228 /* imx-media-fim.c */
229 struct imx_media_fim;
230 void imx_media_fim_eof_monitor(struct imx_media_fim *fim, ktime_t timestamp);
231 int imx_media_fim_set_stream(struct imx_media_fim *fim,
232 			     const struct v4l2_fract *frame_interval,
233 			     bool on);
234 int imx_media_fim_add_controls(struct imx_media_fim *fim);
235 struct imx_media_fim *imx_media_fim_init(struct v4l2_subdev *sd);
236 void imx_media_fim_free(struct imx_media_fim *fim);
237 
238 /* imx-media-internal-sd.c */
239 int imx_media_register_ipu_internal_subdevs(struct imx_media_dev *imxmd,
240 					    struct v4l2_subdev *csi);
241 void imx_media_unregister_ipu_internal_subdevs(struct imx_media_dev *imxmd);
242 
243 /* imx-media-of.c */
244 int imx_media_add_of_subdevs(struct imx_media_dev *dev,
245 			     struct device_node *np);
246 int imx_media_create_of_links(struct imx_media_dev *imxmd,
247 			      struct v4l2_subdev *sd);
248 int imx_media_create_csi_of_links(struct imx_media_dev *imxmd,
249 				  struct v4l2_subdev *csi);
250 int imx_media_of_add_csi(struct imx_media_dev *imxmd,
251 			 struct device_node *csi_np);
252 
253 /* imx-media-vdic.c */
254 struct v4l2_subdev *imx_media_vdic_register(struct v4l2_device *v4l2_dev,
255 					    struct device *ipu_dev,
256 					    struct ipu_soc *ipu,
257 					    u32 grp_id);
258 int imx_media_vdic_unregister(struct v4l2_subdev *sd);
259 
260 /* imx-ic-common.c */
261 struct v4l2_subdev *imx_media_ic_register(struct v4l2_device *v4l2_dev,
262 					  struct device *ipu_dev,
263 					  struct ipu_soc *ipu,
264 					  u32 grp_id);
265 int imx_media_ic_unregister(struct v4l2_subdev *sd);
266 
267 /* imx-media-capture.c */
268 struct imx_media_video_dev *
269 imx_media_capture_device_init(struct device *dev, struct v4l2_subdev *src_sd,
270 			      int pad);
271 void imx_media_capture_device_remove(struct imx_media_video_dev *vdev);
272 int imx_media_capture_device_register(struct imx_media_video_dev *vdev);
273 void imx_media_capture_device_unregister(struct imx_media_video_dev *vdev);
274 struct imx_media_buffer *
275 imx_media_capture_device_next_buf(struct imx_media_video_dev *vdev);
276 void imx_media_capture_device_error(struct imx_media_video_dev *vdev);
277 
278 /* imx-media-csc-scaler.c */
279 struct imx_media_video_dev *
280 imx_media_csc_scaler_device_init(struct imx_media_dev *dev);
281 int imx_media_csc_scaler_device_register(struct imx_media_video_dev *vdev);
282 void imx_media_csc_scaler_device_unregister(struct imx_media_video_dev *vdev);
283 
284 /* subdev group ids */
285 #define IMX_MEDIA_GRP_ID_CSI2          BIT(8)
286 #define IMX_MEDIA_GRP_ID_CSI           BIT(9)
287 #define IMX_MEDIA_GRP_ID_IPU_CSI_BIT   10
288 #define IMX_MEDIA_GRP_ID_IPU_CSI       (0x3 << IMX_MEDIA_GRP_ID_IPU_CSI_BIT)
289 #define IMX_MEDIA_GRP_ID_IPU_CSI0      BIT(IMX_MEDIA_GRP_ID_IPU_CSI_BIT)
290 #define IMX_MEDIA_GRP_ID_IPU_CSI1      (2 << IMX_MEDIA_GRP_ID_IPU_CSI_BIT)
291 #define IMX_MEDIA_GRP_ID_IPU_VDIC      BIT(12)
292 #define IMX_MEDIA_GRP_ID_IPU_IC_PRP    BIT(13)
293 #define IMX_MEDIA_GRP_ID_IPU_IC_PRPENC BIT(14)
294 #define IMX_MEDIA_GRP_ID_IPU_IC_PRPVF  BIT(15)
295 
296 #endif
297