1menu "TI OMAP/AM/DM/DRA Family" 2 depends on ARCH_MULTI_V6 || ARCH_MULTI_V7 3 4config ARCH_OMAP2 5 bool "TI OMAP2" 6 depends on ARCH_MULTI_V6 7 select ARCH_OMAP2PLUS 8 select CPU_V6 9 select SOC_HAS_OMAP2_SDRC 10 11config ARCH_OMAP3 12 bool "TI OMAP3" 13 depends on ARCH_MULTI_V7 14 select ARCH_OMAP2PLUS 15 select ARM_CPU_SUSPEND if PM 16 select OMAP_INTERCONNECT 17 select PM_OPP if PM 18 select PM if CPU_IDLE 19 select SOC_HAS_OMAP2_SDRC 20 select ARM_ERRATA_430973 21 22config ARCH_OMAP4 23 bool "TI OMAP4" 24 depends on ARCH_MULTI_V7 25 select ARCH_OMAP2PLUS 26 select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP 27 select ARM_CPU_SUSPEND if PM 28 select ARM_ERRATA_720789 29 select ARM_GIC 30 select HAVE_ARM_SCU if SMP 31 select HAVE_ARM_TWD if SMP 32 select OMAP_INTERCONNECT 33 select OMAP_INTERCONNECT_BARRIER 34 select PL310_ERRATA_588369 if CACHE_L2X0 35 select PL310_ERRATA_727915 if CACHE_L2X0 36 select PM_OPP if PM 37 select PM if CPU_IDLE 38 select ARM_ERRATA_754322 39 select ARM_ERRATA_775420 40 select OMAP_INTERCONNECT 41 42config SOC_OMAP5 43 bool "TI OMAP5" 44 depends on ARCH_MULTI_V7 45 select ARCH_OMAP2PLUS 46 select ARM_CPU_SUSPEND if PM 47 select ARM_GIC 48 select HAVE_ARM_SCU if SMP 49 select HAVE_ARM_ARCH_TIMER 50 select ARM_ERRATA_798181 if SMP 51 select OMAP_INTERCONNECT 52 select OMAP_INTERCONNECT_BARRIER 53 select PM_OPP if PM 54 select ZONE_DMA if ARM_LPAE 55 56config SOC_AM33XX 57 bool "TI AM33XX" 58 depends on ARCH_MULTI_V7 59 select ARCH_OMAP2PLUS 60 select ARM_CPU_SUSPEND if PM 61 62config SOC_AM43XX 63 bool "TI AM43x" 64 depends on ARCH_MULTI_V7 65 select ARCH_OMAP2PLUS 66 select ARM_GIC 67 select MACH_OMAP_GENERIC 68 select MIGHT_HAVE_CACHE_L2X0 69 select HAVE_ARM_SCU 70 select GENERIC_CLOCKEVENTS_BROADCAST 71 select HAVE_ARM_TWD 72 select ARM_ERRATA_754322 73 select ARM_ERRATA_775420 74 select OMAP_INTERCONNECT 75 select ARM_CPU_SUSPEND if PM 76 77config SOC_DRA7XX 78 bool "TI DRA7XX" 79 depends on ARCH_MULTI_V7 80 select ARCH_OMAP2PLUS 81 select ARM_CPU_SUSPEND if PM 82 select ARM_GIC 83 select HAVE_ARM_SCU if SMP 84 select HAVE_ARM_ARCH_TIMER 85 select IRQ_CROSSBAR 86 select ARM_ERRATA_798181 if SMP 87 select OMAP_INTERCONNECT 88 select OMAP_INTERCONNECT_BARRIER 89 select PM_OPP if PM 90 select ZONE_DMA if ARM_LPAE 91 select PINCTRL_TI_IODELAY if OF && PINCTRL 92 93config ARCH_OMAP2PLUS 94 bool 95 select ARCH_HAS_BANDGAP 96 select ARCH_HAS_HOLES_MEMORYMODEL 97 select ARCH_OMAP 98 select CLKSRC_MMIO 99 select GENERIC_IRQ_CHIP 100 select GPIOLIB 101 select MACH_OMAP_GENERIC 102 select MEMORY 103 select MFD_SYSCON 104 select OMAP_DM_TIMER 105 select OMAP_GPMC 106 select PINCTRL 107 select SOC_BUS 108 select TI_SYSC 109 select OMAP_IRQCHIP 110 select CLKSRC_TI_32K 111 help 112 Systems based on OMAP2, OMAP3, OMAP4 or OMAP5 113 114config OMAP_INTERCONNECT_BARRIER 115 bool 116 select ARM_HEAVY_MB 117 118 119if ARCH_OMAP2PLUS 120 121menu "TI OMAP2/3/4 Specific Features" 122 123config ARCH_OMAP2PLUS_TYPICAL 124 bool "Typical OMAP configuration" 125 default y 126 select AEABI 127 select HIGHMEM 128 select I2C 129 select I2C_OMAP 130 select MENELAUS if ARCH_OMAP2 131 select NEON if CPU_V7 132 select PM 133 select REGULATOR 134 select REGULATOR_FIXED_VOLTAGE 135 select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4 136 select TWL4030_POWER if ARCH_OMAP3 || ARCH_OMAP4 137 select VFP 138 help 139 Compile a kernel suitable for booting most boards 140 141config SOC_HAS_OMAP2_SDRC 142 bool "OMAP2 SDRAM Controller support" 143 144config SOC_HAS_REALTIME_COUNTER 145 bool "Real time free running counter" 146 depends on SOC_OMAP5 || SOC_DRA7XX 147 default y 148 149comment "OMAP Core Type" 150 depends on ARCH_OMAP2 151 152config SOC_OMAP2420 153 bool "OMAP2420 support" 154 depends on ARCH_OMAP2 155 default y 156 select OMAP_DM_TIMER 157 select SOC_HAS_OMAP2_SDRC 158 159config SOC_OMAP2430 160 bool "OMAP2430 support" 161 depends on ARCH_OMAP2 162 default y 163 select SOC_HAS_OMAP2_SDRC 164 165config SOC_OMAP3430 166 bool "OMAP3430 support" 167 depends on ARCH_OMAP3 168 default y 169 select SOC_HAS_OMAP2_SDRC 170 171config SOC_TI81XX 172 bool "TI81XX support" 173 depends on ARCH_OMAP3 174 default y 175 176config OMAP_PACKAGE_CBC 177 bool 178 179config OMAP_PACKAGE_CBB 180 bool 181 182config OMAP_PACKAGE_CUS 183 bool 184 185config OMAP_PACKAGE_CBP 186 bool 187 188comment "OMAP Legacy Platform Data Board Type" 189 depends on ARCH_OMAP2PLUS 190 191config MACH_OMAP_GENERIC 192 bool 193 194config MACH_OMAP2_TUSB6010 195 bool 196 depends on ARCH_OMAP2 && SOC_OMAP2420 197 default y if MACH_NOKIA_N8X0 198 199config MACH_OMAP3517EVM 200 bool "OMAP3517/ AM3517 EVM board" 201 depends on ARCH_OMAP3 202 default y 203 204config MACH_OMAP3_PANDORA 205 bool "OMAP3 Pandora" 206 depends on ARCH_OMAP3 207 default y 208 select OMAP_PACKAGE_CBB 209 210config MACH_NOKIA_N810 211 bool 212 213config MACH_NOKIA_N810_WIMAX 214 bool 215 216config MACH_NOKIA_N8X0 217 bool "Nokia N800/N810" 218 depends on SOC_OMAP2420 219 default y 220 select MACH_NOKIA_N810 221 select MACH_NOKIA_N810_WIMAX 222 223config OMAP3_SDRC_AC_TIMING 224 bool "Enable SDRC AC timing register changes" 225 depends on ARCH_OMAP3 226 default n 227 help 228 If you know that none of your system initiators will attempt to 229 access SDRAM during CORE DVFS, select Y here. This should boost 230 SDRAM performance at lower CORE OPPs. There are relatively few 231 users who will wish to say yes at this point - almost everyone will 232 wish to say no. Selecting yes without understanding what is 233 going on could result in system crashes; 234 235endmenu 236 237endif 238 239config OMAP5_ERRATA_801819 240 bool "Errata 801819: An eviction from L1 data cache might stall indefinitely" 241 depends on SOC_OMAP5 || SOC_DRA7XX 242 help 243 A livelock can occur in the L2 cache arbitration that might prevent 244 a snoop from completing. Under certain conditions this can cause the 245 system to deadlock. 246 247endmenu 248
