1# SPDX-License-Identifier: GPL-2.0
2config SIBYTE_SB1250
3	bool
4	select CEVT_SB1250
5	select CSRC_SB1250
6	select HAVE_PCI
7	select IRQ_MIPS_CPU
8	select SIBYTE_ENABLE_LDT_IF_PCI
9	select SIBYTE_HAS_ZBUS_PROFILING
10	select SIBYTE_SB1xxx_SOC
11	select SYS_SUPPORTS_SMP
12
13config SIBYTE_BCM1125
14	bool
15	select CEVT_SB1250
16	select CSRC_SB1250
17	select HAVE_PCI
18	select IRQ_MIPS_CPU
19	select SIBYTE_BCM112X
20	select SIBYTE_HAS_ZBUS_PROFILING
21	select SIBYTE_SB1xxx_SOC
22
23config SIBYTE_BCM112X
24	bool
25	select CEVT_SB1250
26	select CSRC_SB1250
27	select IRQ_MIPS_CPU
28	select SIBYTE_SB1xxx_SOC
29	select SIBYTE_HAS_ZBUS_PROFILING
30
31config SIBYTE_BCM1x80
32	bool
33	select CEVT_BCM1480
34	select CSRC_BCM1480
35	select HAVE_PCI
36	select IRQ_MIPS_CPU
37	select SIBYTE_HAS_ZBUS_PROFILING
38	select SIBYTE_SB1xxx_SOC
39	select SYS_SUPPORTS_SMP
40
41config SIBYTE_SB1xxx_SOC
42	bool
43	select IRQ_MIPS_CPU
44	select SWAP_IO_SPACE
45	select SYS_SUPPORTS_32BIT_KERNEL
46	select SYS_SUPPORTS_64BIT_KERNEL
47	select FW_CFE
48	select SYS_HAS_EARLY_PRINTK
49
50choice
51	prompt "SiByte SOC Stepping"
52	depends on SIBYTE_SB1xxx_SOC
53
54config CPU_SB1_PASS_2_1250
55	bool "1250 An"
56	depends on SIBYTE_SB1250
57	select CPU_SB1_PASS_2
58	help
59	  Also called BCM1250 Pass 2
60
61config CPU_SB1_PASS_2_2
62	bool "1250 Bn"
63	depends on SIBYTE_SB1250
64	select CPU_HAS_PREFETCH
65	help
66	  Also called BCM1250 Pass 2.2
67
68config CPU_SB1_PASS_4
69	bool "1250 Cn"
70	depends on SIBYTE_SB1250
71	select CPU_HAS_PREFETCH
72	help
73	  Also called BCM1250 Pass 3
74
75config CPU_SB1_PASS_2_112x
76	bool "112x Hybrid"
77	depends on SIBYTE_BCM112X
78	select CPU_SB1_PASS_2
79
80config CPU_SB1_PASS_3
81	bool "112x An"
82	depends on SIBYTE_BCM112X
83	select CPU_HAS_PREFETCH
84
85endchoice
86
87config CPU_SB1_PASS_2
88	bool
89
90config SIBYTE_HAS_LDT
91	bool
92
93config SIBYTE_ENABLE_LDT_IF_PCI
94	bool
95	select SIBYTE_HAS_LDT if PCI
96
97config SB1_CEX_ALWAYS_FATAL
98	bool "All cache exceptions considered fatal (no recovery attempted)"
99	depends on SIBYTE_SB1xxx_SOC
100
101config SB1_CERR_STALL
102	bool "Stall (rather than panic) on fatal cache error"
103	depends on SIBYTE_SB1xxx_SOC
104
105config SIBYTE_CFE_CONSOLE
106	bool "Use firmware console"
107	depends on SIBYTE_SB1xxx_SOC
108	help
109	  Use the CFE API's console write routines during boot.  Other console
110	  options (VT console, sb1250 duart console, etc.) should not be
111	  configured.
112
113config SIBYTE_BUS_WATCHER
114	bool "Support for Bus Watcher statistics"
115	depends on SIBYTE_SB1xxx_SOC && \
116		(SIBYTE_BCM112X || SIBYTE_SB1250 || SIBYTE_BCM1x80)
117	help
118	  Handle and keep statistics on the bus error interrupts (COR_ECC,
119	  BAD_ECC, IO_BUS).
120
121config SIBYTE_BW_TRACE
122	bool "Capture bus trace before bus error"
123	depends on SIBYTE_BUS_WATCHER
124	help
125	  Run a continuous bus trace, dumping the raw data as soon as
126	  a ZBbus error is detected.  Cannot work if ZBbus profiling
127	  is turned on, and also will interfere with JTAG-based trace
128	  buffer activity.  Raw buffer data is dumped to console, and
129	  must be processed off-line.
130
131config SIBYTE_TBPROF
132	tristate "Support for ZBbus profiling"
133	depends on SIBYTE_HAS_ZBUS_PROFILING
134
135config SIBYTE_HAS_ZBUS_PROFILING
136	bool
137