1# SPDX-License-Identifier: GPL-2.0 2# 3# Copyright 2009 Simtec Electronics 4 5config PLAT_SAMSUNG 6 bool 7 depends on PLAT_S3C24XX || ARCH_S3C64XX || ARCH_EXYNOS || ARCH_S5PV210 8 default y 9 select GENERIC_IRQ_CHIP 10 select NO_IOPORT_MAP 11 help 12 Base platform code for all Samsung SoC based systems 13 14config SAMSUNG_PM 15 bool 16 depends on PM && (PLAT_S3C24XX || ARCH_S3C64XX) 17 default y 18 help 19 Base platform power management code for samsung code 20 21if PLAT_SAMSUNG 22menu "Samsung Common options" 23 24# boot configurations 25 26comment "Boot options" 27 28config S3C_LOWLEVEL_UART_PORT 29 int "S3C UART to use for low-level messages" 30 depends on ARCH_S3C64XX 31 default 0 32 help 33 Choice of which UART port to use for the low-level messages, 34 such as the `Uncompressing...` at start time. The value of 35 this configuration should be between zero and two. The port 36 must have been initialised by the boot-loader before use. 37 38config SAMSUNG_ATAGS 39 def_bool n 40 depends on ATAGS 41 help 42 This option enables ATAGS based boot support code for 43 Samsung platforms, including static platform devices, legacy 44 clock, timer and interrupt initialization, etc. 45 46 Platforms that support only DT based boot need not to select 47 this option. 48 49if SAMSUNG_ATAGS 50 51config S3C_GPIO_SPACE 52 int "Space between gpio banks" 53 default 0 54 help 55 Add a number of spare GPIO entries between each bank for debugging 56 purposes. This allows any problems where an counter overflows from 57 one bank to another to be caught, at the expense of using a little 58 more memory. 59 60config S3C_GPIO_TRACK 61 bool 62 help 63 Internal configuration option to enable the s3c specific gpio 64 chip tracking if the platform requires it. 65 66# ADC driver 67 68config S3C_ADC 69 bool "ADC common driver support" 70 depends on !ARCH_MULTIPLATFORM 71 help 72 Core support for the ADC block found in the Samsung SoC systems 73 for drivers such as the touchscreen and hwmon to use to share 74 this resource. 75 76# device definitions to compile in 77 78config S3C_DEV_HSMMC 79 bool 80 help 81 Compile in platform device definitions for HSMMC code 82 83config S3C_DEV_HSMMC1 84 bool 85 help 86 Compile in platform device definitions for HSMMC channel 1 87 88config S3C_DEV_HSMMC2 89 bool 90 help 91 Compile in platform device definitions for HSMMC channel 2 92 93config S3C_DEV_HSMMC3 94 bool 95 help 96 Compile in platform device definitions for HSMMC channel 3 97 98config S3C_DEV_HWMON 99 bool 100 help 101 Compile in platform device definitions for HWMON 102 103config S3C_DEV_I2C1 104 bool 105 help 106 Compile in platform device definitions for I2C channel 1 107 108config S3C_DEV_I2C2 109 bool 110 help 111 Compile in platform device definitions for I2C channel 2 112 113config S3C_DEV_I2C3 114 bool 115 help 116 Compile in platform device definition for I2C controller 3 117 118config S3C_DEV_I2C4 119 bool 120 help 121 Compile in platform device definition for I2C controller 4 122 123config S3C_DEV_I2C5 124 bool 125 help 126 Compile in platform device definition for I2C controller 5 127 128config S3C_DEV_I2C6 129 bool 130 help 131 Compile in platform device definition for I2C controller 6 132 133config S3C_DEV_I2C7 134 bool 135 help 136 Compile in platform device definition for I2C controller 7 137 138config S3C_DEV_FB 139 bool 140 help 141 Compile in platform device definition for framebuffer 142 143config S3C_DEV_USB_HOST 144 bool 145 help 146 Compile in platform device definition for USB host. 147 148config S3C_DEV_USB_HSOTG 149 bool 150 help 151 Compile in platform device definition for USB high-speed OtG 152 153config S3C_DEV_WDT 154 bool 155 default y if ARCH_S3C24XX 156 help 157 Complie in platform device definition for Watchdog Timer 158 159config S3C_DEV_NAND 160 bool 161 help 162 Compile in platform device definition for NAND controller 163 164config S3C_DEV_ONENAND 165 bool 166 help 167 Compile in platform device definition for OneNAND controller 168 169config S3C_DEV_RTC 170 bool 171 help 172 Complie in platform device definition for RTC 173 174config SAMSUNG_DEV_ADC 175 bool 176 help 177 Compile in platform device definition for ADC controller 178 179config SAMSUNG_DEV_IDE 180 bool 181 help 182 Compile in platform device definitions for IDE 183 184config S3C64XX_DEV_SPI0 185 bool 186 help 187 Compile in platform device definitions for S3C64XX's type 188 SPI controller 0 189 190config S3C64XX_DEV_SPI1 191 bool 192 help 193 Compile in platform device definitions for S3C64XX's type 194 SPI controller 1 195 196config S3C64XX_DEV_SPI2 197 bool 198 help 199 Compile in platform device definitions for S3C64XX's type 200 SPI controller 2 201 202config SAMSUNG_DEV_TS 203 bool 204 help 205 Common in platform device definitions for touchscreen device 206 207config SAMSUNG_DEV_KEYPAD 208 bool 209 help 210 Compile in platform device definitions for keypad 211 212config SAMSUNG_DEV_PWM 213 bool 214 default y if ARCH_S3C24XX 215 help 216 Compile in platform device definition for PWM Timer 217 218config S3C24XX_PWM 219 bool "PWM device support" 220 select PWM 221 select PWM_SAMSUNG 222 help 223 Support for exporting the PWM timer blocks via the pwm device 224 system 225 226config GPIO_SAMSUNG 227 def_bool y 228 229config SAMSUNG_PM_GPIO 230 bool 231 default y if GPIO_SAMSUNG && PM 232 help 233 Include legacy GPIO power management code for platforms not using 234 pinctrl-samsung driver. 235endif 236 237comment "Power management" 238 239config SAMSUNG_PM_DEBUG 240 bool "Samsung PM Suspend debug" 241 depends on PM && DEBUG_KERNEL 242 depends on DEBUG_EXYNOS_UART || DEBUG_S3C24XX_UART || DEBUG_S3C2410_UART 243 help 244 Say Y here if you want verbose debugging from the PM Suspend and 245 Resume code. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt> 246 for more information. 247 248config S3C_PM_DEBUG_LED_SMDK 249 bool "SMDK LED suspend/resume debugging" 250 depends on PM && (MACH_SMDK6410) 251 help 252 Say Y here to enable the use of the SMDK LEDs on the baseboard 253 for debugging of the state of the suspend and resume process. 254 255 Note, this currently only works for S3C64XX based SMDK boards. 256 257config SAMSUNG_PM_CHECK 258 bool "S3C2410 PM Suspend Memory CRC" 259 depends on PM 260 select CRC32 261 help 262 Enable the PM code's memory area checksum over sleep. This option 263 will generate CRCs of all blocks of memory, and store them before 264 going to sleep. The blocks are then checked on resume for any 265 errors. 266 267 Note, this can take several seconds depending on memory size 268 and CPU speed. 269 270 See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt> 271 272config SAMSUNG_PM_CHECK_CHUNKSIZE 273 int "S3C2410 PM Suspend CRC Chunksize (KiB)" 274 depends on PM && SAMSUNG_PM_CHECK 275 default 64 276 help 277 Set the chunksize in Kilobytes of the CRC for checking memory 278 corruption over suspend and resume. A smaller value will mean that 279 the CRC data block will take more memory, but will identify any 280 faults with better precision. 281 282 See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt> 283 284config SAMSUNG_WAKEMASK 285 bool 286 depends on PM 287 help 288 Compile support for wakeup-mask controls found on the S3C6400 289 and above. This code allows a set of interrupt to wakeup-mask 290 mappings. See <plat/wakeup-mask.h> 291 292config SAMSUNG_WDT_RESET 293 bool 294 help 295 Compile support for system restart by triggering watchdog reset. 296 Used on SoCs that do not provide dedicated reset control. 297 298config DEBUG_S3C_UART 299 depends on PLAT_SAMSUNG 300 int 301 default "0" if DEBUG_S3C_UART0 302 default "1" if DEBUG_S3C_UART1 303 default "2" if DEBUG_S3C_UART2 304 default "3" if DEBUG_S3C_UART3 305 306endmenu 307endif 308
