1# SPDX-License-Identifier: GPL-2.0-only 2config MTD_NAND_ECC_SW_HAMMING 3 tristate 4 5config MTD_NAND_ECC_SW_HAMMING_SMC 6 bool "NAND ECC Smart Media byte order" 7 depends on MTD_NAND_ECC_SW_HAMMING 8 default n 9 help 10 Software ECC according to the Smart Media Specification. 11 The original Linux implementation had byte 0 and 1 swapped. 12 13menuconfig MTD_RAW_NAND 14 tristate "Raw/Parallel NAND Device Support" 15 select MTD_NAND_CORE 16 select MTD_NAND_ECC 17 select MTD_NAND_ECC_SW_HAMMING 18 help 19 This enables support for accessing all type of raw/parallel 20 NAND flash devices. For further information see 21 <http://www.linux-mtd.infradead.org/doc/nand.html>. 22 23if MTD_RAW_NAND 24 25config MTD_NAND_ECC_SW_BCH 26 bool "Support software BCH ECC" 27 select BCH 28 default n 29 help 30 This enables support for software BCH error correction. Binary BCH 31 codes are more powerful and cpu intensive than traditional Hamming 32 ECC codes. They are used with NAND devices requiring more than 1 bit 33 of error correction. 34 35comment "Raw/parallel NAND flash controllers" 36 37config MTD_NAND_DENALI 38 tristate 39 40config MTD_NAND_DENALI_PCI 41 tristate "Denali NAND controller on Intel Moorestown" 42 select MTD_NAND_DENALI 43 depends on PCI 44 help 45 Enable the driver for NAND flash on Intel Moorestown, using the 46 Denali NAND controller core. 47 48config MTD_NAND_DENALI_DT 49 tristate "Denali NAND controller as a DT device" 50 select MTD_NAND_DENALI 51 depends on HAS_DMA && HAVE_CLK && OF 52 help 53 Enable the driver for NAND flash on platforms using a Denali NAND 54 controller as a DT device. 55 56config MTD_NAND_AMS_DELTA 57 tristate "Amstrad E3 NAND controller" 58 depends on MACH_AMS_DELTA || COMPILE_TEST 59 default y 60 help 61 Support for NAND flash on Amstrad E3 (Delta). 62 63config MTD_NAND_OMAP2 64 tristate "OMAP2, OMAP3, OMAP4 and Keystone NAND controller" 65 depends on ARCH_OMAP2PLUS || ARCH_KEYSTONE || COMPILE_TEST 66 depends on HAS_IOMEM 67 help 68 Support for NAND flash on Texas Instruments OMAP2, OMAP3, OMAP4 69 and Keystone platforms. 70 71config MTD_NAND_OMAP_BCH 72 depends on MTD_NAND_OMAP2 73 bool "Support hardware based BCH error correction" 74 default n 75 select BCH 76 help 77 This config enables the ELM hardware engine, which can be used to 78 locate and correct errors when using BCH ECC scheme. This offloads 79 the cpu from doing ECC error searching and correction. However some 80 legacy OMAP families like OMAP2xxx, OMAP3xxx do not have ELM engine 81 so this is optional for them. 82 83config MTD_NAND_OMAP_BCH_BUILD 84 def_tristate MTD_NAND_OMAP2 && MTD_NAND_OMAP_BCH 85 86config MTD_NAND_AU1550 87 tristate "Au1550/1200 NAND support" 88 depends on MIPS_ALCHEMY 89 help 90 This enables the driver for the NAND flash controller on the 91 AMD/Alchemy 1550 SOC. 92 93config MTD_NAND_NDFC 94 tristate "IBM/MCC 4xx NAND controller" 95 depends on 4xx 96 select MTD_NAND_ECC_SW_HAMMING_SMC 97 help 98 NDFC Nand Flash Controllers are integrated in IBM/AMCC's 4xx SoCs 99 100config MTD_NAND_S3C2410 101 tristate "Samsung S3C NAND controller" 102 depends on ARCH_S3C24XX || ARCH_S3C64XX 103 help 104 This enables the NAND flash controller on the S3C24xx and S3C64xx 105 SoCs 106 107 No board specific support is done by this driver, each board 108 must advertise a platform_device for the driver to attach. 109 110config MTD_NAND_S3C2410_DEBUG 111 bool "Samsung S3C NAND controller debug" 112 depends on MTD_NAND_S3C2410 113 help 114 Enable debugging of the S3C NAND driver 115 116config MTD_NAND_S3C2410_CLKSTOP 117 bool "Samsung S3C NAND IDLE clock stop" 118 depends on MTD_NAND_S3C2410 119 default n 120 help 121 Stop the clock to the NAND controller when there is no chip 122 selected to save power. This will mean there is a small delay 123 when the is NAND chip selected or released, but will save 124 approximately 5mA of power when there is nothing happening. 125 126config MTD_NAND_TANGO 127 tristate "Tango NAND controller" 128 depends on ARCH_TANGO || COMPILE_TEST 129 depends on HAS_IOMEM 130 help 131 Enables the NAND Flash controller on Tango chips. 132 133config MTD_NAND_SHARPSL 134 tristate "Sharp SL Series (C7xx + others) NAND controller" 135 depends on ARCH_PXA || COMPILE_TEST 136 depends on HAS_IOMEM 137 138config MTD_NAND_CAFE 139 tristate "OLPC CAFÉ NAND controller" 140 depends on PCI 141 select REED_SOLOMON 142 select REED_SOLOMON_DEC16 143 help 144 Use NAND flash attached to the CAFÉ chip designed for the OLPC 145 laptop. 146 147config MTD_NAND_CS553X 148 tristate "CS5535/CS5536 (AMD Geode companion) NAND controller" 149 depends on X86_32 150 depends on !UML && HAS_IOMEM 151 help 152 The CS553x companion chips for the AMD Geode processor 153 include NAND flash controllers with built-in hardware ECC 154 capabilities; enabling this option will allow you to use 155 these. The driver will check the MSRs to verify that the 156 controller is enabled for NAND, and currently requires that 157 the controller be in MMIO mode. 158 159 If you say "m", the module will be called cs553x_nand. 160 161config MTD_NAND_ATMEL 162 tristate "Atmel AT91 NAND Flash/SmartMedia NAND controller" 163 depends on ARCH_AT91 || COMPILE_TEST 164 depends on HAS_IOMEM 165 select GENERIC_ALLOCATOR 166 select MFD_ATMEL_SMC 167 help 168 Enables support for NAND Flash / Smart Media Card interface 169 on Atmel AT91 processors. 170 171config MTD_NAND_ORION 172 tristate "Marvell Orion NAND controller" 173 depends on PLAT_ORION 174 help 175 This enables the NAND flash controller on Orion machines. 176 177 No board specific support is done by this driver, each board 178 must advertise a platform_device for the driver to attach. 179 180config MTD_NAND_MARVELL 181 tristate "Marvell EBU NAND controller" 182 depends on PXA3xx || ARCH_MMP || PLAT_ORION || ARCH_MVEBU || \ 183 COMPILE_TEST 184 depends on HAS_IOMEM 185 help 186 This enables the NAND flash controller driver for Marvell boards, 187 including: 188 - PXA3xx processors (NFCv1) 189 - 32-bit Armada platforms (XP, 37x, 38x, 39x) (NFCv2) 190 - 64-bit Aramda platforms (7k, 8k) (NFCv2) 191 192config MTD_NAND_SLC_LPC32XX 193 tristate "NXP LPC32xx SLC NAND controller" 194 depends on ARCH_LPC32XX || COMPILE_TEST 195 depends on HAS_IOMEM 196 help 197 Enables support for NXP's LPC32XX SLC (i.e. for Single Level Cell 198 chips) NAND controller. This is the default for the PHYTEC 3250 199 reference board which contains a NAND256R3A2CZA6 chip. 200 201 Please check the actual NAND chip connected and its support 202 by the SLC NAND controller. 203 204config MTD_NAND_MLC_LPC32XX 205 tristate "NXP LPC32xx MLC NAND controller" 206 depends on ARCH_LPC32XX || COMPILE_TEST 207 depends on HAS_IOMEM 208 help 209 Uses the LPC32XX MLC (i.e. for Multi Level Cell chips) NAND 210 controller. This is the default for the WORK92105 controller 211 board. 212 213 Please check the actual NAND chip connected and its support 214 by the MLC NAND controller. 215 216config MTD_NAND_PASEMI 217 tristate "PA Semi PWRficient NAND controller" 218 depends on PPC_PASEMI 219 help 220 Enables support for NAND Flash interface on PA Semi PWRficient 221 based boards 222 223config MTD_NAND_TMIO 224 tristate "Toshiba Mobile IO NAND controller" 225 depends on MFD_TMIO 226 help 227 Support for NAND flash connected to a Toshiba Mobile IO 228 Controller in some PDAs, including the Sharp SL6000x. 229 230config MTD_NAND_BRCMNAND 231 tristate "Broadcom STB NAND controller" 232 depends on ARM || ARM64 || MIPS || COMPILE_TEST 233 depends on HAS_IOMEM 234 help 235 Enables the Broadcom NAND controller driver. The controller was 236 originally designed for Set-Top Box but is used on various BCM7xxx, 237 BCM3xxx, BCM63xxx, iProc/Cygnus and more. 238 239config MTD_NAND_BCM47XXNFLASH 240 tristate "BCM4706 BCMA NAND controller" 241 depends on BCMA_NFLASH 242 depends on BCMA 243 help 244 BCMA bus can have various flash memories attached, they are 245 registered by bcma as platform devices. This enables driver for 246 NAND flash memories. For now only BCM4706 is supported. 247 248config MTD_NAND_OXNAS 249 tristate "Oxford Semiconductor NAND controller" 250 depends on ARCH_OXNAS || COMPILE_TEST 251 depends on HAS_IOMEM 252 help 253 This enables the NAND flash controller on Oxford Semiconductor SoCs. 254 255config MTD_NAND_MPC5121_NFC 256 tristate "MPC5121 NAND controller" 257 depends on PPC_MPC512x 258 help 259 This enables the driver for the NAND flash controller on the 260 MPC5121 SoC. 261 262config MTD_NAND_GPMI_NAND 263 tristate "Freescale GPMI NAND controller" 264 depends on MXS_DMA 265 help 266 Enables NAND Flash support for IMX23, IMX28 or IMX6. 267 The GPMI controller is very powerful, with the help of BCH 268 module, it can do the hardware ECC. The GPMI supports several 269 NAND flashs at the same time. 270 271config MTD_NAND_FSL_ELBC 272 tristate "Freescale eLBC NAND controller" 273 depends on FSL_SOC 274 select FSL_LBC 275 help 276 Various Freescale chips, including the 8313, include a NAND Flash 277 Controller Module with built-in hardware ECC capabilities. 278 Enabling this option will enable you to use this to control 279 external NAND devices. 280 281config MTD_NAND_FSL_IFC 282 tristate "Freescale IFC NAND controller" 283 depends on FSL_SOC || ARCH_LAYERSCAPE || SOC_LS1021A || COMPILE_TEST 284 depends on HAS_IOMEM 285 select FSL_IFC 286 select MEMORY 287 help 288 Various Freescale chips e.g P1010, include a NAND Flash machine 289 with built-in hardware ECC capabilities. 290 Enabling this option will enable you to use this to control 291 external NAND devices. 292 293config MTD_NAND_FSL_UPM 294 tristate "Freescale UPM NAND controller" 295 depends on PPC_83xx || PPC_85xx 296 select FSL_LBC 297 help 298 Enables support for NAND Flash chips wired onto Freescale PowerPC 299 processor localbus with User-Programmable Machine support. 300 301config MTD_NAND_VF610_NFC 302 tristate "Freescale VF610/MPC5125 NAND controller" 303 depends on (SOC_VF610 || COMPILE_TEST) 304 depends on HAS_IOMEM 305 help 306 Enables support for NAND Flash Controller on some Freescale 307 processors like the VF610, MPC5125, MCF54418 or Kinetis K70. 308 The driver supports a maximum 2k page size. With 2k pages and 309 64 bytes or more of OOB, hardware ECC with up to 32-bit error 310 correction is supported. Hardware ECC is only enabled through 311 device tree. 312 313config MTD_NAND_MXC 314 tristate "Freescale MXC NAND controller" 315 depends on ARCH_MXC || COMPILE_TEST 316 depends on HAS_IOMEM 317 help 318 This enables the driver for the NAND flash controller on the 319 MXC processors. 320 321config MTD_NAND_SH_FLCTL 322 tristate "Renesas SuperH FLCTL NAND controller" 323 depends on SUPERH || COMPILE_TEST 324 depends on HAS_IOMEM 325 help 326 Several Renesas SuperH CPU has FLCTL. This option enables support 327 for NAND Flash using FLCTL. 328 329config MTD_NAND_DAVINCI 330 tristate "DaVinci/Keystone NAND controller" 331 depends on ARCH_DAVINCI || (ARCH_KEYSTONE && TI_AEMIF) || COMPILE_TEST 332 depends on HAS_IOMEM 333 help 334 Enable the driver for NAND flash chips on Texas Instruments 335 DaVinci/Keystone processors. 336 337config MTD_NAND_TXX9NDFMC 338 tristate "TXx9 NAND controller" 339 depends on SOC_TX4938 || SOC_TX4939 || COMPILE_TEST 340 depends on HAS_IOMEM 341 help 342 This enables the NAND flash controller on the TXx9 SoCs. 343 344config MTD_NAND_SOCRATES 345 tristate "Socrates NAND controller" 346 depends on SOCRATES 347 help 348 Enables support for NAND Flash chips wired onto Socrates board. 349 350source "drivers/mtd/nand/raw/ingenic/Kconfig" 351 352config MTD_NAND_FSMC 353 tristate "ST Micros FSMC NAND controller" 354 depends on OF && HAS_IOMEM 355 depends on PLAT_SPEAR || ARCH_NOMADIK || ARCH_U8500 || MACH_U300 || \ 356 COMPILE_TEST 357 help 358 Enables support for NAND Flash chips on the ST Microelectronics 359 Flexible Static Memory Controller (FSMC) 360 361config MTD_NAND_XWAY 362 bool "Lantiq XWAY NAND controller" 363 depends on LANTIQ && SOC_TYPE_XWAY 364 help 365 Enables support for NAND Flash chips on Lantiq XWAY SoCs. NAND is attached 366 to the External Bus Unit (EBU). 367 368config MTD_NAND_SUNXI 369 tristate "Allwinner NAND controller" 370 depends on ARCH_SUNXI || COMPILE_TEST 371 depends on HAS_IOMEM 372 help 373 Enables support for NAND Flash chips on Allwinner SoCs. 374 375config MTD_NAND_HISI504 376 tristate "Hisilicon Hip04 NAND controller" 377 depends on ARCH_HISI || COMPILE_TEST 378 depends on HAS_IOMEM 379 help 380 Enables support for NAND controller on Hisilicon SoC Hip04. 381 382config MTD_NAND_QCOM 383 tristate "QCOM NAND controller" 384 depends on ARCH_QCOM || COMPILE_TEST 385 depends on HAS_IOMEM 386 help 387 Enables support for NAND flash chips on SoCs containing the EBI2 NAND 388 controller. This controller is found on IPQ806x SoC. 389 390config MTD_NAND_MTK 391 tristate "MTK NAND controller" 392 depends on ARCH_MEDIATEK || COMPILE_TEST 393 depends on HAS_IOMEM 394 help 395 Enables support for NAND controller on MTK SoCs. 396 This controller is found on mt27xx, mt81xx, mt65xx SoCs. 397 398config MTD_NAND_MXIC 399 tristate "Macronix raw NAND controller" 400 depends on HAS_IOMEM || COMPILE_TEST 401 help 402 This selects the Macronix raw NAND controller driver. 403 404config MTD_NAND_TEGRA 405 tristate "NVIDIA Tegra NAND controller" 406 depends on ARCH_TEGRA || COMPILE_TEST 407 depends on HAS_IOMEM 408 help 409 Enables support for NAND flash controller on NVIDIA Tegra SoC. 410 The driver has been developed and tested on a Tegra 2 SoC. DMA 411 support, raw read/write page as well as HW ECC read/write page 412 is supported. Extra OOB bytes when using HW ECC are currently 413 not supported. 414 415config MTD_NAND_STM32_FMC2 416 tristate "Support for NAND controller on STM32MP SoCs" 417 depends on MACH_STM32MP157 || COMPILE_TEST 418 select MFD_SYSCON 419 help 420 Enables support for NAND Flash chips on SoCs containing the FMC2 421 NAND controller. This controller is found on STM32MP SoCs. 422 The controller supports a maximum 8k page size and supports 423 a maximum 8-bit correction error per sector of 512 bytes. 424 425config MTD_NAND_MESON 426 tristate "Support for NAND controller on Amlogic's Meson SoCs" 427 depends on ARCH_MESON || COMPILE_TEST 428 select MFD_SYSCON 429 help 430 Enables support for NAND controller on Amlogic's Meson SoCs. 431 This controller is found on Meson SoCs. 432 433config MTD_NAND_GPIO 434 tristate "GPIO assisted NAND controller" 435 depends on GPIOLIB || COMPILE_TEST 436 depends on HAS_IOMEM 437 help 438 This enables a NAND flash driver where control signals are 439 connected to GPIO pins, and commands and data are communicated 440 via a memory mapped interface. 441 442config MTD_NAND_PLATFORM 443 tristate "Generic NAND controller" 444 depends on HAS_IOMEM 445 help 446 This implements a generic NAND driver for on-SOC platform 447 devices. You will need to provide platform-specific functions 448 via platform_data. 449 450config MTD_NAND_CADENCE 451 tristate "Support Cadence NAND (HPNFC) controller" 452 depends on (OF || COMPILE_TEST) && HAS_IOMEM 453 help 454 Enable the driver for NAND flash on platforms using a Cadence NAND 455 controller. 456 457config MTD_NAND_ARASAN 458 tristate "Support for Arasan NAND flash controller" 459 depends on HAS_IOMEM && HAS_DMA 460 select BCH 461 help 462 Enables the driver for the Arasan NAND flash controller on 463 Zynq Ultrascale+ MPSoC. 464 465comment "Misc" 466 467config MTD_SM_COMMON 468 tristate 469 default n 470 471config MTD_NAND_NANDSIM 472 tristate "Support for NAND Flash Simulator" 473 help 474 The simulator may simulate various NAND flash chips for the 475 MTD nand layer. 476 477config MTD_NAND_RICOH 478 tristate "Ricoh xD card reader" 479 default n 480 depends on PCI 481 select MTD_SM_COMMON 482 help 483 Enable support for Ricoh R5C852 xD card reader 484 You also need to enable ether 485 NAND SSFDC (SmartMedia) read only translation layer' or new 486 expermental, readwrite 487 'SmartMedia/xD new translation layer' 488 489config MTD_NAND_DISKONCHIP 490 tristate "DiskOnChip 2000, Millennium and Millennium Plus (NAND reimplementation)" 491 depends on HAS_IOMEM 492 select REED_SOLOMON 493 select REED_SOLOMON_DEC16 494 help 495 This is a reimplementation of M-Systems DiskOnChip 2000, 496 Millennium and Millennium Plus as a standard NAND device driver, 497 as opposed to the earlier self-contained MTD device drivers. 498 This should enable, among other things, proper JFFS2 operation on 499 these devices. 500 501config MTD_NAND_DISKONCHIP_PROBE_ADVANCED 502 bool "Advanced detection options for DiskOnChip" 503 depends on MTD_NAND_DISKONCHIP 504 help 505 This option allows you to specify nonstandard address at which to 506 probe for a DiskOnChip, or to change the detection options. You 507 are unlikely to need any of this unless you are using LinuxBIOS. 508 Say 'N'. 509 510config MTD_NAND_DISKONCHIP_PROBE_ADDRESS 511 hex "Physical address of DiskOnChip" if MTD_NAND_DISKONCHIP_PROBE_ADVANCED 512 depends on MTD_NAND_DISKONCHIP 513 default "0" 514 help 515 By default, the probe for DiskOnChip devices will look for a 516 DiskOnChip at every multiple of 0x2000 between 0xC8000 and 0xEE000. 517 This option allows you to specify a single address at which to probe 518 for the device, which is useful if you have other devices in that 519 range which get upset when they are probed. 520 521 (Note that on PowerPC, the normal probe will only check at 522 0xE4000000.) 523 524 Normally, you should leave this set to zero, to allow the probe at 525 the normal addresses. 526 527config MTD_NAND_DISKONCHIP_PROBE_HIGH 528 bool "Probe high addresses" 529 depends on MTD_NAND_DISKONCHIP_PROBE_ADVANCED 530 help 531 By default, the probe for DiskOnChip devices will look for a 532 DiskOnChip at every multiple of 0x2000 between 0xC8000 and 0xEE000. 533 This option changes to make it probe between 0xFFFC8000 and 534 0xFFFEE000. Unless you are using LinuxBIOS, this is unlikely to be 535 useful to you. Say 'N'. 536 537config MTD_NAND_DISKONCHIP_BBTWRITE 538 bool "Allow BBT writes on DiskOnChip Millennium and 2000TSOP" 539 depends on MTD_NAND_DISKONCHIP 540 help 541 On DiskOnChip devices shipped with the INFTL filesystem (Millennium 542 and 2000 TSOP/Alon), Linux reserves some space at the end of the 543 device for the Bad Block Table (BBT). If you have existing INFTL 544 data on your device (created by non-Linux tools such as M-Systems' 545 DOS drivers), your data might overlap the area Linux wants to use for 546 the BBT. If this is a concern for you, leave this option disabled and 547 Linux will not write BBT data into this area. 548 The downside of leaving this option disabled is that if bad blocks 549 are detected by Linux, they will not be recorded in the BBT, which 550 could cause future problems. 551 Once you enable this option, new filesystems (INFTL or others, created 552 in Linux or other operating systems) will not use the reserved area. 553 The only reason not to enable this option is to prevent damage to 554 preexisting filesystems. 555 Even if you leave this disabled, you can enable BBT writes at module 556 load time (assuming you build diskonchip as a module) with the module 557 parameter "inftl_bbt_write=1". 558 559endif # MTD_RAW_NAND 560
