1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3  * drivers/scsi/ufs/unipro.h
4  *
5  * Copyright (C) 2013 Samsung Electronics Co., Ltd.
6  */
7 
8 #ifndef _UNIPRO_H_
9 #define _UNIPRO_H_
10 
11 /*
12  * M-TX Configuration Attributes
13  */
14 #define TX_HIBERN8TIME_CAPABILITY		0x000F
15 #define TX_MODE					0x0021
16 #define TX_HSRATE_SERIES			0x0022
17 #define TX_HSGEAR				0x0023
18 #define TX_PWMGEAR				0x0024
19 #define TX_AMPLITUDE				0x0025
20 #define TX_HS_SLEWRATE				0x0026
21 #define TX_SYNC_SOURCE				0x0027
22 #define TX_HS_SYNC_LENGTH			0x0028
23 #define TX_HS_PREPARE_LENGTH			0x0029
24 #define TX_LS_PREPARE_LENGTH			0x002A
25 #define TX_HIBERN8_CONTROL			0x002B
26 #define TX_LCC_ENABLE				0x002C
27 #define TX_PWM_BURST_CLOSURE_EXTENSION		0x002D
28 #define TX_BYPASS_8B10B_ENABLE			0x002E
29 #define TX_DRIVER_POLARITY			0x002F
30 #define TX_HS_UNTERMINATED_LINE_DRIVE_ENABLE	0x0030
31 #define TX_LS_TERMINATED_LINE_DRIVE_ENABLE	0x0031
32 #define TX_LCC_SEQUENCER			0x0032
33 #define TX_MIN_ACTIVATETIME			0x0033
34 #define TX_PWM_G6_G7_SYNC_LENGTH		0x0034
35 #define TX_REFCLKFREQ				0x00EB
36 #define TX_CFGCLKFREQVAL			0x00EC
37 #define	CFGEXTRATTR				0x00F0
38 #define DITHERCTRL2				0x00F1
39 
40 /*
41  * M-RX Configuration Attributes
42  */
43 #define RX_MODE					0x00A1
44 #define RX_HSRATE_SERIES			0x00A2
45 #define RX_HSGEAR				0x00A3
46 #define RX_PWMGEAR				0x00A4
47 #define RX_LS_TERMINATED_ENABLE			0x00A5
48 #define RX_HS_UNTERMINATED_ENABLE		0x00A6
49 #define RX_ENTER_HIBERN8			0x00A7
50 #define RX_BYPASS_8B10B_ENABLE			0x00A8
51 #define RX_TERMINATION_FORCE_ENABLE		0x00A9
52 #define RX_MIN_ACTIVATETIME_CAPABILITY		0x008F
53 #define RX_HIBERN8TIME_CAPABILITY		0x0092
54 #define RX_REFCLKFREQ				0x00EB
55 #define	RX_CFGCLKFREQVAL			0x00EC
56 #define CFGWIDEINLN				0x00F0
57 #define CFGRXCDR8				0x00BA
58 #define ENARXDIRECTCFG4				0x00F2
59 #define CFGRXOVR8				0x00BD
60 #define RXDIRECTCTRL2				0x00C7
61 #define ENARXDIRECTCFG3				0x00F3
62 #define RXCALCTRL				0x00B4
63 #define ENARXDIRECTCFG2				0x00F4
64 #define CFGRXOVR4				0x00E9
65 #define RXSQCTRL				0x00B5
66 #define CFGRXOVR6				0x00BF
67 
68 #define is_mphy_tx_attr(attr)			(attr < RX_MODE)
69 #define RX_MIN_ACTIVATETIME_UNIT_US		100
70 #define HIBERN8TIME_UNIT_US			100
71 
72 /*
73  * Common Block Attributes
74  */
75 #define TX_GLOBALHIBERNATE			UNIPRO_CB_OFFSET(0x002B)
76 #define REFCLKMODE				UNIPRO_CB_OFFSET(0x00BF)
77 #define DIRECTCTRL19				UNIPRO_CB_OFFSET(0x00CD)
78 #define DIRECTCTRL10				UNIPRO_CB_OFFSET(0x00E6)
79 #define CDIRECTCTRL6				UNIPRO_CB_OFFSET(0x00EA)
80 #define RTOBSERVESELECT				UNIPRO_CB_OFFSET(0x00F0)
81 #define CBDIVFACTOR				UNIPRO_CB_OFFSET(0x00F1)
82 #define CBDCOCTRL5				UNIPRO_CB_OFFSET(0x00F3)
83 #define CBPRGPLL2				UNIPRO_CB_OFFSET(0x00F8)
84 #define CBPRGTUNING				UNIPRO_CB_OFFSET(0x00FB)
85 
86 #define UNIPRO_CB_OFFSET(x)			(0x8000 | x)
87 
88 /*
89  * PHY Adpater attributes
90  */
91 #define PA_ACTIVETXDATALANES	0x1560
92 #define PA_ACTIVERXDATALANES	0x1580
93 #define PA_TXTRAILINGCLOCKS	0x1564
94 #define PA_PHY_TYPE		0x1500
95 #define PA_AVAILTXDATALANES	0x1520
96 #define PA_AVAILRXDATALANES	0x1540
97 #define PA_MINRXTRAILINGCLOCKS	0x1543
98 #define PA_TXPWRSTATUS		0x1567
99 #define PA_RXPWRSTATUS		0x1582
100 #define PA_TXFORCECLOCK		0x1562
101 #define PA_TXPWRMODE		0x1563
102 #define PA_LEGACYDPHYESCDL	0x1570
103 #define PA_MAXTXSPEEDFAST	0x1521
104 #define PA_MAXTXSPEEDSLOW	0x1522
105 #define PA_MAXRXSPEEDFAST	0x1541
106 #define PA_MAXRXSPEEDSLOW	0x1542
107 #define PA_TXLINKSTARTUPHS	0x1544
108 #define PA_LOCAL_TX_LCC_ENABLE	0x155E
109 #define PA_TXSPEEDFAST		0x1565
110 #define PA_TXSPEEDSLOW		0x1566
111 #define PA_REMOTEVERINFO	0x15A0
112 #define PA_TXGEAR		0x1568
113 #define PA_TXTERMINATION	0x1569
114 #define PA_HSSERIES		0x156A
115 #define PA_PWRMODE		0x1571
116 #define PA_RXGEAR		0x1583
117 #define PA_RXTERMINATION	0x1584
118 #define PA_MAXRXPWMGEAR		0x1586
119 #define PA_MAXRXHSGEAR		0x1587
120 #define PA_RXHSUNTERMCAP	0x15A5
121 #define PA_RXLSTERMCAP		0x15A6
122 #define PA_GRANULARITY		0x15AA
123 #define PA_PACPREQTIMEOUT	0x1590
124 #define PA_PACPREQEOBTIMEOUT	0x1591
125 #define PA_HIBERN8TIME		0x15A7
126 #define PA_LOCALVERINFO		0x15A9
127 #define PA_TACTIVATE		0x15A8
128 #define PA_PACPFRAMECOUNT	0x15C0
129 #define PA_PACPERRORCOUNT	0x15C1
130 #define PA_PHYTESTCONTROL	0x15C2
131 #define PA_PWRMODEUSERDATA0	0x15B0
132 #define PA_PWRMODEUSERDATA1	0x15B1
133 #define PA_PWRMODEUSERDATA2	0x15B2
134 #define PA_PWRMODEUSERDATA3	0x15B3
135 #define PA_PWRMODEUSERDATA4	0x15B4
136 #define PA_PWRMODEUSERDATA5	0x15B5
137 #define PA_PWRMODEUSERDATA6	0x15B6
138 #define PA_PWRMODEUSERDATA7	0x15B7
139 #define PA_PWRMODEUSERDATA8	0x15B8
140 #define PA_PWRMODEUSERDATA9	0x15B9
141 #define PA_PWRMODEUSERDATA10	0x15BA
142 #define PA_PWRMODEUSERDATA11	0x15BB
143 #define PA_CONNECTEDTXDATALANES	0x1561
144 #define PA_CONNECTEDRXDATALANES	0x1581
145 #define PA_LOGICALLANEMAP	0x15A1
146 #define PA_SLEEPNOCONFIGTIME	0x15A2
147 #define PA_STALLNOCONFIGTIME	0x15A3
148 #define PA_SAVECONFIGTIME	0x15A4
149 
150 #define PA_TACTIVATE_TIME_UNIT_US	10
151 #define PA_HIBERN8_TIME_UNIT_US		100
152 
153 /*Other attributes*/
154 #define VS_MPHYCFGUPDT		0xD085
155 #define VS_DEBUGOMC		0xD09E
156 #define VS_POWERSTATE		0xD083
157 
158 #define PA_GRANULARITY_MIN_VAL	1
159 #define PA_GRANULARITY_MAX_VAL	6
160 
161 /* PHY Adapter Protocol Constants */
162 #define PA_MAXDATALANES	4
163 
164 /* PA power modes */
165 enum {
166 	FAST_MODE	= 1,
167 	SLOW_MODE	= 2,
168 	FASTAUTO_MODE	= 4,
169 	SLOWAUTO_MODE	= 5,
170 	UNCHANGED	= 7,
171 };
172 
173 /* PA TX/RX Frequency Series */
174 enum {
175 	PA_HS_MODE_A	= 1,
176 	PA_HS_MODE_B	= 2,
177 };
178 
179 enum ufs_pwm_gear_tag {
180 	UFS_PWM_DONT_CHANGE,	/* Don't change Gear */
181 	UFS_PWM_G1,		/* PWM Gear 1 (default for reset) */
182 	UFS_PWM_G2,		/* PWM Gear 2 */
183 	UFS_PWM_G3,		/* PWM Gear 3 */
184 	UFS_PWM_G4,		/* PWM Gear 4 */
185 	UFS_PWM_G5,		/* PWM Gear 5 */
186 	UFS_PWM_G6,		/* PWM Gear 6 */
187 	UFS_PWM_G7,		/* PWM Gear 7 */
188 };
189 
190 enum ufs_hs_gear_tag {
191 	UFS_HS_DONT_CHANGE,	/* Don't change Gear */
192 	UFS_HS_G1,		/* HS Gear 1 (default for reset) */
193 	UFS_HS_G2,		/* HS Gear 2 */
194 	UFS_HS_G3,		/* HS Gear 3 */
195 };
196 
197 enum ufs_unipro_ver {
198 	UFS_UNIPRO_VER_RESERVED = 0,
199 	UFS_UNIPRO_VER_1_40 = 1, /* UniPro version 1.40 */
200 	UFS_UNIPRO_VER_1_41 = 2, /* UniPro version 1.41 */
201 	UFS_UNIPRO_VER_1_6 = 3,  /* UniPro version 1.6 */
202 	UFS_UNIPRO_VER_MAX = 4,  /* UniPro unsupported version */
203 	/* UniPro version field mask in PA_LOCALVERINFO */
204 	UFS_UNIPRO_VER_MASK = 0xF,
205 };
206 
207 /*
208  * Data Link Layer Attributes
209  */
210 #define DL_TC0TXFCTHRESHOLD	0x2040
211 #define DL_FC0PROTTIMEOUTVAL	0x2041
212 #define DL_TC0REPLAYTIMEOUTVAL	0x2042
213 #define DL_AFC0REQTIMEOUTVAL	0x2043
214 #define DL_AFC0CREDITTHRESHOLD	0x2044
215 #define DL_TC0OUTACKTHRESHOLD	0x2045
216 #define DL_TC1TXFCTHRESHOLD	0x2060
217 #define DL_FC1PROTTIMEOUTVAL	0x2061
218 #define DL_TC1REPLAYTIMEOUTVAL	0x2062
219 #define DL_AFC1REQTIMEOUTVAL	0x2063
220 #define DL_AFC1CREDITTHRESHOLD	0x2064
221 #define DL_TC1OUTACKTHRESHOLD	0x2065
222 #define DL_TXPREEMPTIONCAP	0x2000
223 #define DL_TC0TXMAXSDUSIZE	0x2001
224 #define DL_TC0RXINITCREDITVAL	0x2002
225 #define DL_TC0TXBUFFERSIZE	0x2005
226 #define DL_PEERTC0PRESENT	0x2046
227 #define DL_PEERTC0RXINITCREVAL	0x2047
228 #define DL_TC1TXMAXSDUSIZE	0x2003
229 #define DL_TC1RXINITCREDITVAL	0x2004
230 #define DL_TC1TXBUFFERSIZE	0x2006
231 #define DL_PEERTC1PRESENT	0x2066
232 #define DL_PEERTC1RXINITCREVAL	0x2067
233 
234 /*
235  * Network Layer Attributes
236  */
237 #define N_DEVICEID		0x3000
238 #define N_DEVICEID_VALID	0x3001
239 #define N_TC0TXMAXSDUSIZE	0x3020
240 #define N_TC1TXMAXSDUSIZE	0x3021
241 
242 /*
243  * Transport Layer Attributes
244  */
245 #define T_NUMCPORTS		0x4000
246 #define T_NUMTESTFEATURES	0x4001
247 #define T_CONNECTIONSTATE	0x4020
248 #define T_PEERDEVICEID		0x4021
249 #define T_PEERCPORTID		0x4022
250 #define T_TRAFFICCLASS		0x4023
251 #define T_PROTOCOLID		0x4024
252 #define T_CPORTFLAGS		0x4025
253 #define T_TXTOKENVALUE		0x4026
254 #define T_RXTOKENVALUE		0x4027
255 #define T_LOCALBUFFERSPACE	0x4028
256 #define T_PEERBUFFERSPACE	0x4029
257 #define T_CREDITSTOSEND		0x402A
258 #define T_CPORTMODE		0x402B
259 #define T_TC0TXMAXSDUSIZE	0x4060
260 #define T_TC1TXMAXSDUSIZE	0x4061
261 
262 #ifdef FALSE
263 #undef FALSE
264 #endif
265 
266 #ifdef TRUE
267 #undef TRUE
268 #endif
269 
270 /* Boolean attribute values */
271 enum {
272 	FALSE = 0,
273 	TRUE,
274 };
275 
276 #endif /* _UNIPRO_H_ */
277