1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __BCMASP_H
3 #define __BCMASP_H
4
5 #include <linux/netdevice.h>
6 #include <linux/phy.h>
7 #include <linux/io-64-nonatomic-hi-lo.h>
8 #include <uapi/linux/ethtool.h>
9
10 #define ASP_INTR2_OFFSET 0x1000
11 #define ASP_INTR2_STATUS 0x0
12 #define ASP_INTR2_SET 0x4
13 #define ASP_INTR2_CLEAR 0x8
14 #define ASP_INTR2_MASK_STATUS 0xc
15 #define ASP_INTR2_MASK_SET 0x10
16 #define ASP_INTR2_MASK_CLEAR 0x14
17
18 #define ASP_INTR2_RX_ECH(intr) BIT(intr)
19 #define ASP_INTR2_TX_DESC(intr) BIT((intr) + 14)
20 #define ASP_INTR2_UMC0_WAKE BIT(22)
21 #define ASP_INTR2_UMC1_WAKE BIT(28)
22
23 #define ASP_WAKEUP_INTR2_OFFSET 0x1200
24 #define ASP_WAKEUP_INTR2_STATUS 0x0
25 #define ASP_WAKEUP_INTR2_SET 0x4
26 #define ASP_WAKEUP_INTR2_CLEAR 0x8
27 #define ASP_WAKEUP_INTR2_MASK_STATUS 0xc
28 #define ASP_WAKEUP_INTR2_MASK_SET 0x10
29 #define ASP_WAKEUP_INTR2_MASK_CLEAR 0x14
30 #define ASP_WAKEUP_INTR2_MPD_0 BIT(0)
31 #define ASP_WAKEUP_INTR2_MPD_1 BIT(1)
32 #define ASP_WAKEUP_INTR2_FILT_0 BIT(2)
33 #define ASP_WAKEUP_INTR2_FILT_1 BIT(3)
34 #define ASP_WAKEUP_INTR2_FW BIT(4)
35
36 #define ASP_TX_ANALYTICS_OFFSET 0x4c000
37 #define ASP_TX_ANALYTICS_CTRL 0x0
38
39 #define ASP_RX_ANALYTICS_OFFSET 0x98000
40 #define ASP_RX_ANALYTICS_CTRL 0x0
41
42 #define ASP_RX_CTRL_OFFSET 0x9f000
43 #define ASP_RX_CTRL_UMAC_0_FRAME_COUNT 0x8
44 #define ASP_RX_CTRL_UMAC_1_FRAME_COUNT 0xc
45 #define ASP_RX_CTRL_FB_0_FRAME_COUNT 0x14
46 #define ASP_RX_CTRL_FB_1_FRAME_COUNT 0x18
47 #define ASP_RX_CTRL_FB_8_FRAME_COUNT 0x1c
48 /* asp2.1 diverges offsets here */
49 /* ASP2.0 */
50 #define ASP_RX_CTRL_FB_OUT_FRAME_COUNT 0x20
51 #define ASP_RX_CTRL_FB_FILT_OUT_FRAME_COUNT 0x24
52 #define ASP_RX_CTRL_FLUSH 0x28
53 #define ASP_CTRL_UMAC0_FLUSH_MASK (BIT(0) | BIT(12))
54 #define ASP_CTRL_UMAC1_FLUSH_MASK (BIT(1) | BIT(13))
55 #define ASP_CTRL_SPB_FLUSH_MASK (BIT(8) | BIT(20))
56 #define ASP_RX_CTRL_FB_RX_FIFO_DEPTH 0x30
57 /* ASP2.1 */
58 #define ASP_RX_CTRL_FB_9_FRAME_COUNT_2_1 0x20
59 #define ASP_RX_CTRL_FB_10_FRAME_COUNT_2_1 0x24
60 #define ASP_RX_CTRL_FB_OUT_FRAME_COUNT_2_1 0x28
61 #define ASP_RX_CTRL_FB_FILT_OUT_FRAME_COUNT_2_1 0x2c
62 #define ASP_RX_CTRL_FLUSH_2_1 0x30
63 #define ASP_RX_CTRL_FB_RX_FIFO_DEPTH_2_1 0x38
64
65 #define ASP_RX_FILTER_OFFSET 0x80000
66 #define ASP_RX_FILTER_BLK_CTRL 0x0
67 #define ASP_RX_FILTER_OPUT_EN BIT(0)
68 #define ASP_RX_FILTER_MDA_EN BIT(1)
69 #define ASP_RX_FILTER_LNR_MD BIT(2)
70 #define ASP_RX_FILTER_GEN_WK_EN BIT(3)
71 #define ASP_RX_FILTER_GEN_WK_CLR BIT(4)
72 #define ASP_RX_FILTER_NT_FLT_EN BIT(5)
73 #define ASP_RX_FILTER_MDA_CFG(sel) (((sel) * 0x14) + 0x100)
74 #define ASP_RX_FILTER_MDA_CFG_EN_SHIFT 8
75 #define ASP_RX_FILTER_MDA_CFG_UMC_SEL(sel) ((sel) > 1 ? BIT(17) : \
76 BIT((sel) + 9))
77 #define ASP_RX_FILTER_MDA_PAT_H(sel) (((sel) * 0x14) + 0x104)
78 #define ASP_RX_FILTER_MDA_PAT_L(sel) (((sel) * 0x14) + 0x108)
79 #define ASP_RX_FILTER_MDA_MSK_H(sel) (((sel) * 0x14) + 0x10c)
80 #define ASP_RX_FILTER_MDA_MSK_L(sel) (((sel) * 0x14) + 0x110)
81 #define ASP_RX_FILTER_MDA_CFG(sel) (((sel) * 0x14) + 0x100)
82 #define ASP_RX_FILTER_MDA_PAT_H(sel) (((sel) * 0x14) + 0x104)
83 #define ASP_RX_FILTER_MDA_PAT_L(sel) (((sel) * 0x14) + 0x108)
84 #define ASP_RX_FILTER_MDA_MSK_H(sel) (((sel) * 0x14) + 0x10c)
85 #define ASP_RX_FILTER_MDA_MSK_L(sel) (((sel) * 0x14) + 0x110)
86 #define ASP_RX_FILTER_NET_CFG(sel) (((sel) * 0xa04) + 0x400)
87 #define ASP_RX_FILTER_NET_CFG_CH(sel) ((sel) << 0)
88 #define ASP_RX_FILTER_NET_CFG_EN BIT(9)
89 #define ASP_RX_FILTER_NET_CFG_L2_EN BIT(10)
90 #define ASP_RX_FILTER_NET_CFG_L3_EN BIT(11)
91 #define ASP_RX_FILTER_NET_CFG_L4_EN BIT(12)
92 #define ASP_RX_FILTER_NET_CFG_L3_FRM(sel) ((sel) << 13)
93 #define ASP_RX_FILTER_NET_CFG_L4_FRM(sel) ((sel) << 15)
94 #define ASP_RX_FILTER_NET_CFG_UMC(sel) BIT((sel) + 19)
95 #define ASP_RX_FILTER_NET_CFG_DMA_EN BIT(27)
96
97 #define ASP_RX_FILTER_NET_OFFSET_MAX 32
98 #define ASP_RX_FILTER_NET_PAT(sel, block, off) \
99 (((sel) * 0xa04) + ((block) * 0x200) + (off) + 0x600)
100 #define ASP_RX_FILTER_NET_MASK(sel, block, off) \
101 (((sel) * 0xa04) + ((block) * 0x200) + (off) + 0x700)
102
103 #define ASP_RX_FILTER_NET_OFFSET(sel) (((sel) * 0xa04) + 0xe00)
104 #define ASP_RX_FILTER_NET_OFFSET_L2(val) ((val) << 0)
105 #define ASP_RX_FILTER_NET_OFFSET_L3_0(val) ((val) << 8)
106 #define ASP_RX_FILTER_NET_OFFSET_L3_1(val) ((val) << 16)
107 #define ASP_RX_FILTER_NET_OFFSET_L4(val) ((val) << 24)
108
109 enum asp_rx_net_filter_block {
110 ASP_RX_FILTER_NET_L2 = 0,
111 ASP_RX_FILTER_NET_L3_0,
112 ASP_RX_FILTER_NET_L3_1,
113 ASP_RX_FILTER_NET_L4,
114 ASP_RX_FILTER_NET_BLOCK_MAX
115 };
116
117 #define ASP_EDPKT_OFFSET 0x9c000
118 #define ASP_EDPKT_ENABLE 0x4
119 #define ASP_EDPKT_ENABLE_EN BIT(0)
120 #define ASP_EDPKT_HDR_CFG 0xc
121 #define ASP_EDPKT_HDR_SZ_SHIFT 2
122 #define ASP_EDPKT_HDR_SZ_32 0
123 #define ASP_EDPKT_HDR_SZ_64 1
124 #define ASP_EDPKT_HDR_SZ_96 2
125 #define ASP_EDPKT_HDR_SZ_128 3
126 #define ASP_EDPKT_BURST_BUF_PSCAL_TOUT 0x10
127 #define ASP_EDPKT_BURST_BUF_WRITE_TOUT 0x14
128 #define ASP_EDPKT_BURST_BUF_READ_TOUT 0x18
129 #define ASP_EDPKT_RX_TS_COUNTER 0x38
130 #define ASP_EDPKT_ENDI 0x48
131 #define ASP_EDPKT_ENDI_DESC_SHIFT 8
132 #define ASP_EDPKT_ENDI_NO_BT_SWP 0
133 #define ASP_EDPKT_ENDI_BT_SWP_WD 1
134 #define ASP_EDPKT_RX_PKT_CNT 0x138
135 #define ASP_EDPKT_HDR_EXTR_CNT 0x13c
136 #define ASP_EDPKT_HDR_OUT_CNT 0x140
137
138 #define ASP_CTRL 0x101000
139 #define ASP_CTRL_ASP_SW_INIT 0x04
140 #define ASP_CTRL_ASP_SW_INIT_ACPUSS_CORE BIT(0)
141 #define ASP_CTRL_ASP_SW_INIT_ASP_TX BIT(1)
142 #define ASP_CTRL_ASP_SW_INIT_AS_RX BIT(2)
143 #define ASP_CTRL_ASP_SW_INIT_ASP_RGMII_UMAC0 BIT(3)
144 #define ASP_CTRL_ASP_SW_INIT_ASP_RGMII_UMAC1 BIT(4)
145 #define ASP_CTRL_ASP_SW_INIT_ASP_XMEMIF BIT(5)
146 #define ASP_CTRL_CLOCK_CTRL 0x04
147 #define ASP_CTRL_CLOCK_CTRL_ASP_TX_DISABLE BIT(0)
148 #define ASP_CTRL_CLOCK_CTRL_ASP_RX_DISABLE BIT(1)
149 #define ASP_CTRL_CLOCK_CTRL_ASP_RGMII_SHIFT 2
150 #define ASP_CTRL_CLOCK_CTRL_ASP_RGMII_MASK (0x7 << ASP_CTRL_CLOCK_CTRL_ASP_RGMII_SHIFT)
151 #define ASP_CTRL_CLOCK_CTRL_ASP_RGMII_DIS(x) BIT(ASP_CTRL_CLOCK_CTRL_ASP_RGMII_SHIFT + (x))
152 #define ASP_CTRL_CLOCK_CTRL_ASP_ALL_DISABLE GENMASK(4, 0)
153 #define ASP_CTRL_CORE_CLOCK_SELECT 0x08
154 #define ASP_CTRL_CORE_CLOCK_SELECT_MAIN BIT(0)
155 #define ASP_CTRL_SCRATCH_0 0x0c
156
157 struct bcmasp_tx_cb {
158 struct sk_buff *skb;
159 unsigned int bytes_sent;
160 bool last;
161
162 DEFINE_DMA_UNMAP_ADDR(dma_addr);
163 DEFINE_DMA_UNMAP_LEN(dma_len);
164 };
165
166 struct bcmasp_res {
167 /* Per interface resources */
168 /* Port */
169 void __iomem *umac;
170 void __iomem *umac2fb;
171 void __iomem *rgmii;
172
173 /* TX slowpath/configuration */
174 void __iomem *tx_spb_ctrl;
175 void __iomem *tx_spb_top;
176 void __iomem *tx_epkt_core;
177 void __iomem *tx_pause_ctrl;
178 };
179
180 #define DESC_ADDR(x) ((x) & GENMASK_ULL(39, 0))
181 #define DESC_FLAGS(x) ((x) & GENMASK_ULL(63, 40))
182
183 struct bcmasp_desc {
184 u64 buf;
185 #define DESC_CHKSUM BIT_ULL(40)
186 #define DESC_CRC_ERR BIT_ULL(41)
187 #define DESC_RX_SYM_ERR BIT_ULL(42)
188 #define DESC_NO_OCT_ALN BIT_ULL(43)
189 #define DESC_PKT_TRUC BIT_ULL(44)
190 /* 39:0 (TX/RX) bits 0-39 of buf addr
191 * 40 (RX) checksum
192 * 41 (RX) crc_error
193 * 42 (RX) rx_symbol_error
194 * 43 (RX) non_octet_aligned
195 * 44 (RX) pkt_truncated
196 * 45 Reserved
197 * 56:46 (RX) mac_filter_id
198 * 60:57 (RX) rx_port_num (0-unicmac0, 1-unimac1)
199 * 61 Reserved
200 * 63:62 (TX) forward CRC, overwrite CRC
201 */
202 u32 size;
203 u32 flags;
204 #define DESC_INT_EN BIT(0)
205 #define DESC_SOF BIT(1)
206 #define DESC_EOF BIT(2)
207 #define DESC_EPKT_CMD BIT(3)
208 #define DESC_SCRAM_ST BIT(8)
209 #define DESC_SCRAM_END BIT(9)
210 #define DESC_PCPP BIT(10)
211 #define DESC_PPPP BIT(11)
212 /* 0 (TX) tx_int_en
213 * 1 (TX/RX) SOF
214 * 2 (TX/RX) EOF
215 * 3 (TX) epkt_command
216 * 6:4 (TX) PA
217 * 7 (TX) pause at desc end
218 * 8 (TX) scram_start
219 * 9 (TX) scram_end
220 * 10 (TX) PCPP
221 * 11 (TX) PPPP
222 * 14:12 Reserved
223 * 15 (TX) pid ch Valid
224 * 19:16 (TX) data_pkt_type
225 * 32:20 (TX) pid_channel (RX) nw_filter_id
226 */
227 };
228
229 struct bcmasp_intf;
230
231 struct bcmasp_intf_stats64 {
232 /* Rx Stats */
233 u64_stats_t rx_packets;
234 u64_stats_t rx_bytes;
235 u64_stats_t rx_errors;
236 u64_stats_t rx_dropped;
237 u64_stats_t rx_crc_errs;
238 u64_stats_t rx_sym_errs;
239
240 /* Tx Stats*/
241 u64_stats_t tx_packets;
242 u64_stats_t tx_bytes;
243
244 struct u64_stats_sync syncp;
245 };
246
247 struct bcmasp_mib_counters {
248 u32 edpkt_ts;
249 u32 edpkt_rx_pkt_cnt;
250 u32 edpkt_hdr_ext_cnt;
251 u32 edpkt_hdr_out_cnt;
252 u32 umac_frm_cnt;
253 u32 fb_frm_cnt;
254 u32 fb_rx_fifo_depth;
255 u32 fb_out_frm_cnt;
256 u32 fb_filt_out_frm_cnt;
257 u32 alloc_rx_skb_failed;
258 u32 tx_dma_failed;
259 u32 mc_filters_full_cnt;
260 u32 uc_filters_full_cnt;
261 u32 filters_combine_cnt;
262 u32 promisc_filters_cnt;
263 u32 tx_realloc_offload_failed;
264 u32 tx_timeout_cnt;
265 };
266
267 struct bcmasp_intf_ops {
268 unsigned long (*rx_desc_read)(struct bcmasp_intf *intf);
269 void (*rx_buffer_write)(struct bcmasp_intf *intf, dma_addr_t addr);
270 void (*rx_desc_write)(struct bcmasp_intf *intf, dma_addr_t addr);
271 unsigned long (*tx_read)(struct bcmasp_intf *intf);
272 void (*tx_write)(struct bcmasp_intf *intf, dma_addr_t addr);
273 };
274
275 struct bcmasp_priv;
276
277 struct bcmasp_intf {
278 struct list_head list;
279 struct net_device *ndev;
280 struct bcmasp_priv *parent;
281
282 /* ASP Ch */
283 int channel;
284 int port;
285 const struct bcmasp_intf_ops *ops;
286
287 /* Used for splitting shared resources */
288 int index;
289
290 struct napi_struct tx_napi;
291 /* TX ring, starts on a new cacheline boundary */
292 void __iomem *tx_spb_dma;
293 int tx_spb_index;
294 int tx_spb_clean_index;
295 struct bcmasp_desc *tx_spb_cpu;
296 dma_addr_t tx_spb_dma_addr;
297 dma_addr_t tx_spb_dma_valid;
298 dma_addr_t tx_spb_dma_read;
299 struct bcmasp_tx_cb *tx_cbs;
300
301 /* RX ring, starts on a new cacheline boundary */
302 void __iomem *rx_edpkt_cfg;
303 void __iomem *rx_edpkt_dma;
304 int rx_edpkt_index;
305 int rx_buf_order;
306 struct bcmasp_desc *rx_edpkt_cpu;
307 dma_addr_t rx_edpkt_dma_addr;
308 dma_addr_t rx_edpkt_dma_read;
309
310 /* RX buffer prefetcher ring*/
311 void *rx_ring_cpu;
312 dma_addr_t rx_ring_dma;
313 dma_addr_t rx_ring_dma_valid;
314 struct napi_struct rx_napi;
315
316 struct bcmasp_res res;
317 unsigned int crc_fwd;
318
319 /* PHY device */
320 struct device_node *phy_dn;
321 struct device_node *ndev_dn;
322 phy_interface_t phy_interface;
323 bool internal_phy;
324 int old_pause;
325 int old_link;
326 int old_duplex;
327
328 u32 msg_enable;
329
330 /* Statistics */
331 struct bcmasp_intf_stats64 stats64;
332 struct bcmasp_mib_counters mib;
333
334 u32 wolopts;
335 u8 sopass[SOPASS_MAX];
336 /* Used if per intf wol irq */
337 int wol_irq;
338 unsigned int wol_irq_enabled:1;
339
340 struct ethtool_eee eee;
341 };
342
343 #define NUM_NET_FILTERS 32
344 struct bcmasp_net_filter {
345 struct ethtool_rx_flow_spec fs;
346
347 bool claimed;
348 bool wake_filter;
349
350 int port;
351 unsigned int hw_index;
352 };
353
354 #define NUM_MDA_FILTERS 32
355 struct bcmasp_mda_filter {
356 /* Current owner of this filter */
357 int port;
358 bool en;
359 u8 addr[ETH_ALEN];
360 u8 mask[ETH_ALEN];
361 };
362
363 struct bcmasp_hw_info {
364 u32 rx_ctrl_flush;
365 u32 umac2fb;
366 u32 rx_ctrl_fb_out_frame_count;
367 u32 rx_ctrl_fb_filt_out_frame_count;
368 u32 rx_ctrl_fb_rx_fifo_depth;
369 };
370
371 struct bcmasp_plat_data {
372 void (*init_wol)(struct bcmasp_priv *priv);
373 void (*enable_wol)(struct bcmasp_intf *intf, bool en);
374 void (*destroy_wol)(struct bcmasp_priv *priv);
375 struct bcmasp_hw_info *hw_info;
376 };
377
378 struct bcmasp_priv {
379 struct platform_device *pdev;
380 struct clk *clk;
381
382 int irq;
383 u32 irq_mask;
384
385 /* Used if shared wol irq */
386 struct mutex wol_lock;
387 int wol_irq;
388 unsigned long wol_irq_enabled_mask;
389
390 void (*init_wol)(struct bcmasp_priv *priv);
391 void (*enable_wol)(struct bcmasp_intf *intf, bool en);
392 void (*destroy_wol)(struct bcmasp_priv *priv);
393
394 void __iomem *base;
395 struct bcmasp_hw_info *hw_info;
396
397 struct list_head intfs;
398
399 struct bcmasp_mda_filter mda_filters[NUM_MDA_FILTERS];
400
401 /* MAC destination address filters lock */
402 spinlock_t mda_lock;
403
404 /* Protects accesses to ASP_CTRL_CLOCK_CTRL */
405 spinlock_t clk_lock;
406
407 struct bcmasp_net_filter net_filters[NUM_NET_FILTERS];
408
409 /* Network filter lock */
410 struct mutex net_lock;
411 };
412
bcmasp_intf_rx_desc_read(struct bcmasp_intf * intf)413 static inline unsigned long bcmasp_intf_rx_desc_read(struct bcmasp_intf *intf)
414 {
415 return intf->ops->rx_desc_read(intf);
416 }
417
bcmasp_intf_rx_buffer_write(struct bcmasp_intf * intf,dma_addr_t addr)418 static inline void bcmasp_intf_rx_buffer_write(struct bcmasp_intf *intf,
419 dma_addr_t addr)
420 {
421 intf->ops->rx_buffer_write(intf, addr);
422 }
423
bcmasp_intf_rx_desc_write(struct bcmasp_intf * intf,dma_addr_t addr)424 static inline void bcmasp_intf_rx_desc_write(struct bcmasp_intf *intf,
425 dma_addr_t addr)
426 {
427 intf->ops->rx_desc_write(intf, addr);
428 }
429
bcmasp_intf_tx_read(struct bcmasp_intf * intf)430 static inline unsigned long bcmasp_intf_tx_read(struct bcmasp_intf *intf)
431 {
432 return intf->ops->tx_read(intf);
433 }
434
bcmasp_intf_tx_write(struct bcmasp_intf * intf,dma_addr_t addr)435 static inline void bcmasp_intf_tx_write(struct bcmasp_intf *intf,
436 dma_addr_t addr)
437 {
438 intf->ops->tx_write(intf, addr);
439 }
440
441 #define __BCMASP_IO_MACRO(name, m) \
442 static inline u32 name##_rl(struct bcmasp_intf *intf, u32 off) \
443 { \
444 u32 reg = readl_relaxed(intf->m + off); \
445 return reg; \
446 } \
447 static inline void name##_wl(struct bcmasp_intf *intf, u32 val, u32 off)\
448 { \
449 writel_relaxed(val, intf->m + off); \
450 }
451
452 #define BCMASP_IO_MACRO(name) __BCMASP_IO_MACRO(name, res.name)
453 #define BCMASP_FP_IO_MACRO(name) __BCMASP_IO_MACRO(name, name)
454
455 BCMASP_IO_MACRO(umac);
456 BCMASP_IO_MACRO(umac2fb);
457 BCMASP_IO_MACRO(rgmii);
458 BCMASP_FP_IO_MACRO(tx_spb_dma);
459 BCMASP_IO_MACRO(tx_spb_ctrl);
460 BCMASP_IO_MACRO(tx_spb_top);
461 BCMASP_IO_MACRO(tx_epkt_core);
462 BCMASP_IO_MACRO(tx_pause_ctrl);
463 BCMASP_FP_IO_MACRO(rx_edpkt_dma);
464 BCMASP_FP_IO_MACRO(rx_edpkt_cfg);
465
466 #define __BCMASP_FP_IO_MACRO_Q(name, m) \
467 static inline u64 name##_rq(struct bcmasp_intf *intf, u32 off) \
468 { \
469 u64 reg = readq_relaxed(intf->m + off); \
470 return reg; \
471 } \
472 static inline void name##_wq(struct bcmasp_intf *intf, u64 val, u32 off)\
473 { \
474 writeq_relaxed(val, intf->m + off); \
475 }
476
477 #define BCMASP_FP_IO_MACRO_Q(name) __BCMASP_FP_IO_MACRO_Q(name, name)
478
479 BCMASP_FP_IO_MACRO_Q(tx_spb_dma);
480 BCMASP_FP_IO_MACRO_Q(rx_edpkt_dma);
481 BCMASP_FP_IO_MACRO_Q(rx_edpkt_cfg);
482
483 #define PKT_OFFLOAD_NOP (0 << 28)
484 #define PKT_OFFLOAD_HDR_OP (1 << 28)
485 #define PKT_OFFLOAD_HDR_WRBACK BIT(19)
486 #define PKT_OFFLOAD_HDR_COUNT(x) ((x) << 16)
487 #define PKT_OFFLOAD_HDR_SIZE_1(x) ((x) << 4)
488 #define PKT_OFFLOAD_HDR_SIZE_2(x) (x)
489 #define PKT_OFFLOAD_HDR2_SIZE_2(x) ((x) << 24)
490 #define PKT_OFFLOAD_HDR2_SIZE_3(x) ((x) << 12)
491 #define PKT_OFFLOAD_HDR2_SIZE_4(x) (x)
492 #define PKT_OFFLOAD_EPKT_OP (2 << 28)
493 #define PKT_OFFLOAD_EPKT_WRBACK BIT(23)
494 #define PKT_OFFLOAD_EPKT_IP(x) ((x) << 21)
495 #define PKT_OFFLOAD_EPKT_TP(x) ((x) << 19)
496 #define PKT_OFFLOAD_EPKT_LEN(x) ((x) << 16)
497 #define PKT_OFFLOAD_EPKT_CSUM_L3 BIT(15)
498 #define PKT_OFFLOAD_EPKT_CSUM_L2 BIT(14)
499 #define PKT_OFFLOAD_EPKT_ID(x) ((x) << 12)
500 #define PKT_OFFLOAD_EPKT_SEQ(x) ((x) << 10)
501 #define PKT_OFFLOAD_EPKT_TS(x) ((x) << 8)
502 #define PKT_OFFLOAD_EPKT_BLOC(x) (x)
503 #define PKT_OFFLOAD_END_OP (7 << 28)
504
505 struct bcmasp_pkt_offload {
506 __be32 nop;
507 __be32 header;
508 __be32 header2;
509 __be32 epkt;
510 __be32 end;
511 };
512
513 #define BCMASP_CORE_IO_MACRO(name, offset) \
514 static inline u32 name##_core_rl(struct bcmasp_priv *priv, \
515 u32 off) \
516 { \
517 u32 reg = readl_relaxed(priv->base + (offset) + off); \
518 return reg; \
519 } \
520 static inline void name##_core_wl(struct bcmasp_priv *priv, \
521 u32 val, u32 off) \
522 { \
523 writel_relaxed(val, priv->base + (offset) + off); \
524 }
525
526 BCMASP_CORE_IO_MACRO(intr2, ASP_INTR2_OFFSET);
527 BCMASP_CORE_IO_MACRO(wakeup_intr2, ASP_WAKEUP_INTR2_OFFSET);
528 BCMASP_CORE_IO_MACRO(tx_analytics, ASP_TX_ANALYTICS_OFFSET);
529 BCMASP_CORE_IO_MACRO(rx_analytics, ASP_RX_ANALYTICS_OFFSET);
530 BCMASP_CORE_IO_MACRO(rx_ctrl, ASP_RX_CTRL_OFFSET);
531 BCMASP_CORE_IO_MACRO(rx_filter, ASP_RX_FILTER_OFFSET);
532 BCMASP_CORE_IO_MACRO(rx_edpkt, ASP_EDPKT_OFFSET);
533 BCMASP_CORE_IO_MACRO(ctrl, ASP_CTRL);
534
535 struct bcmasp_intf *bcmasp_interface_create(struct bcmasp_priv *priv,
536 struct device_node *ndev_dn, int i);
537
538 void bcmasp_interface_destroy(struct bcmasp_intf *intf);
539
540 void bcmasp_enable_tx_irq(struct bcmasp_intf *intf, int en);
541
542 void bcmasp_enable_rx_irq(struct bcmasp_intf *intf, int en);
543
544 void bcmasp_flush_rx_port(struct bcmasp_intf *intf);
545
546 extern const struct ethtool_ops bcmasp_ethtool_ops;
547
548 int bcmasp_interface_suspend(struct bcmasp_intf *intf);
549
550 int bcmasp_interface_resume(struct bcmasp_intf *intf);
551
552 void bcmasp_set_promisc(struct bcmasp_intf *intf, bool en);
553
554 void bcmasp_set_allmulti(struct bcmasp_intf *intf, bool en);
555
556 void bcmasp_set_broad(struct bcmasp_intf *intf, bool en);
557
558 void bcmasp_set_oaddr(struct bcmasp_intf *intf, const unsigned char *addr,
559 bool en);
560
561 int bcmasp_set_en_mda_filter(struct bcmasp_intf *intf, unsigned char *addr,
562 unsigned char *mask);
563
564 void bcmasp_disable_all_filters(struct bcmasp_intf *intf);
565
566 void bcmasp_core_clock_set_intf(struct bcmasp_intf *intf, bool en);
567
568 struct bcmasp_net_filter *bcmasp_netfilt_get_init(struct bcmasp_intf *intf,
569 u32 loc, bool wake_filter,
570 bool init);
571
572 bool bcmasp_netfilt_check_dup(struct bcmasp_intf *intf,
573 struct ethtool_rx_flow_spec *fs);
574
575 void bcmasp_netfilt_release(struct bcmasp_intf *intf,
576 struct bcmasp_net_filter *nfilt);
577
578 int bcmasp_netfilt_get_active(struct bcmasp_intf *intf);
579
580 int bcmasp_netfilt_get_all_active(struct bcmasp_intf *intf, u32 *rule_locs,
581 u32 *rule_cnt);
582
583 void bcmasp_netfilt_suspend(struct bcmasp_intf *intf);
584
585 void bcmasp_eee_enable_set(struct bcmasp_intf *intf, bool enable);
586 #endif
587
