Lines Matching +full:0 +full:xcb
4 "EventCode": "0x86",
11 "EventCode": "0x86",
15 "UMask": "0x1"
19 "EventCode": "0xCB",
21 …ts are masked (disabled). Increments by 1 each core cycle that EFLAGS.IF is 0, regardless of wheth…
23 "UMask": "0x2"
27 "EventCode": "0xCB",
29 …core cycles during which there are pending interrupts, but interrupts are masked (EFLAGS.IF = 0).",
31 "UMask": "0x4"
35 "EventCode": "0xCB",
39 "UMask": "0x1"