Lines Matching +full:floating +full:- +full:point

3-bit packed double precision floating-point instructions retired; some instructions will count twi…
6-bit packed double precision floating-point instructions retired; some instructions will count twi…
11-bit packed single precision floating-point instructions retired; some instructions will count twi…
14-bit packed single precision floating-point instructions retired; some instructions will count twi…
19-bit packed double precision floating-point instructions retired; some instructions will count twi…
22-bit packed double precision floating-point instructions retired; some instructions will count twi…
27-bit packed single precision floating-point instructions retired; some instructions will count twi…
30-bit packed single precision floating-point instructions retired; some instructions will count twi…
35 …"BriefDescription": "Number of SSE/AVX computational 128-bit packed single and 256-bit packed doub…
38-bit packed single precision and 256-bit packed double precision floating-point instructions reti…
43floating-point instructions retired; some instructions will count twice as noted below. Applies to…
50floating-point instructions retired; some instructions will count twice as noted below. Applies to…
57floating-point instructions retired; some instructions will count twice as noted below. Each count…
60floating-point instructions retired; some instructions will count twice as noted below. Each coun…
65floating-point instructions retired; some instructions will count twice as noted below. Each coun…
68floating-point instructions retired; some instructions will count twice as noted below. Each coun…
73floating-point instructions retired; some instructions will count twice as noted below. Each coun…
76floating-point instructions retired; some instructions will count twice as noted below. Each coun…
81floating-point instructions retired; some instructions will count twice as noted below. Applies to…
107 …ssist - invalid operation, denormal operand, dividing by zero, SNaN operand. Counting includes onl…
115floating point (FP) micro-code assist (numeric overflow/underflow) when the output value (destinat…
123 …"PublicDescription": "This event counts x87 floating point (FP) micro-code assist (invalid operati…
131 …"PublicDescription": "This event counts the number of x87 floating point (FP) micro-code assist (n…
150 … "BriefDescription": "Number of transitions from AVX-256 to legacy SSE when penalty applicable.",
154 …"PublicDescription": "This event counts the number of transitions from AVX-256 to legacy SSE when …
159 "BriefDescription": "Number of transitions from SSE to AVX-256 when penalty applicable.",
163 …"PublicDescription": "This event counts the number of transitions from legacy SSE to AVX-256 when …
168 …"BriefDescription": "Micro-op dispatches cancelled due to insufficient SIMD physical register file…
171 …"PublicDescription": "This event counts the number of micro-operations cancelled after they were d…