Lines Matching +full:double +full:- +full:precision

3 …-bit packed double precision floating-point instructions retired; some instructions will count twi…
6 …-bit packed double precision floating-point instructions retired; some instructions will count twi…
11 …-bit packed single precision floating-point instructions retired; some instructions will count twi…
14 …-bit packed single precision floating-point instructions retired; some instructions will count twi…
19 …-bit packed double precision floating-point instructions retired; some instructions will count twi…
22 …-bit packed double precision floating-point instructions retired; some instructions will count twi…
27 …-bit packed single precision floating-point instructions retired; some instructions will count twi…
30 …-bit packed single precision floating-point instructions retired; some instructions will count twi…
35 …-bit packed single and 256-bit packed double precision FP instructions retired; some instructions …
38 …-bit packed single precision and 256-bit packed double precision  floating-point instructions reti…
43 …double precision floating-point instructions retired; some instructions will count twice as noted …
45         "EventName": "FP_ARITH_INST_RETIRED.DOUBLE",
50 …ng-point instructions retired; some instructions will count twice as noted below. Applies to SSE* …
57 …-point instructions retired; some instructions will count twice as noted below. Each count represe…
60 …precision and double precision floating-point instructions retired; some instructions will count t…
65 …double precision floating-point instructions retired; some instructions will count twice as noted …
68 …double precision floating-point instructions retired; some instructions will count twice as noted …
73 …precision floating-point instructions retired; some instructions will count twice as noted below. …
76 …precision floating-point instructions retired; some instructions will count twice as noted below. …
81 …precision floating-point instructions retired; some instructions will count twice as noted below. …
107 …ssist - invalid operation, denormal operand, dividing by zero, SNaN operand. Counting includes onl…
115 …-code assist (numeric overflow/underflow) when the output value (destination register) is invalid.…
123 …"PublicDescription": "This event counts x87 floating point (FP) micro-code assist (invalid operati…
131 …"PublicDescription": "This event counts the number of x87 floating point (FP) micro-code assist (n…
150 …   "BriefDescription": "Number of transitions from AVX-256 to legacy SSE when penalty applicable.",
154 …"PublicDescription": "This event counts the number of transitions from AVX-256 to legacy SSE when …
159         "BriefDescription": "Number of transitions from SSE to AVX-256 when penalty applicable.",
163 …"PublicDescription": "This event counts the number of transitions from legacy SSE to AVX-256 when …
168 …"BriefDescription": "Micro-op dispatches cancelled due to insufficient SIMD physical register file…
171 …"PublicDescription": "This event counts the number of micro-operations cancelled after they were d…