Lines Matching full:instruction

5 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline suffered a TLB miss or…
10 …"BriefDescription": "Cycles in which the next-to-complete (NTC) instruction is held at dispatch fo…
20     "BriefDescription": "MMA instruction issued."
35     "BriefDescription": "Cycles in which an instruction reload is pending to satisfy a demand miss."
40     "BriefDescription": "The instruction was flushed after becoming next-to-complete (NTC)."
50 …"BriefDescription": "Cycles when dispatch was stalled while the instruction was fetched from the l…
55 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was waiting for a load…
60 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline finished at dispatch a…
75 …"BriefDescription": "Cycles in which the next-to-complete (NTC) instruction is held at dispatch be…
80 …"BriefDescription": "Cycles in which the next-to-complete (NTC) instruction is held at dispatch be…
85 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was waiting for a load…
90 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was executing in the s…
95 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was a lwsync waiting t…
105 …"BriefDescription": "Cycles when dispatch was stalled while the instruction was fetched from the l…
110 …"BriefDescription": "A branch instruction finished. Includes predicted/mispredicted/unconditional."
115 …"BriefDescription": "Simple fixed point instruction issued to the store unit. Measured at finish t…
125 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was dispatched but not…
130 …"BriefDescription": "Cycles in which the next-to-complete (NTC) instruction is held at dispatch du…
140 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was executing in the L…
145 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline required special handl…
150 …"BriefDescription": "Cycles when dispatch was stalled while waiting to resolve an instruction ERAT…
155 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was waiting for a load…
160 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was waiting for a load…
165 …"BriefDescription": "Cycles when dispatch was stalled while the instruction was fetched from the l…
175     "BriefDescription": "VSU instruction issued to VSU pipe 0."
180     "BriefDescription": "VSU instruction issued to VSU pipe 1."
185 …"BriefDescription": "At least one VSU instruction was issued to one of the VSU pipes. Up to 4 per …
190     "BriefDescription": "VSU instruction finished."
195 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was executing in the V…
200 …"BriefDescription": "Cycles when dispatch was stalled for this thread due to an instruction cache …
205 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was a stcx waiting for…
215 …"BriefDescription": "Cycles in which the next-to-complete (NTC) instruction is held at dispatch be…
220 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was a TLBIE instructio…
225 …instruction in the pipeline was executing in any unit before it was flushed. Note that if the flus…
230 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline (NTC) finishes. Note t…
245 …ycles when dispatch was stalled because of a flush that happened to an instruction(s) that was not…
250 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was waiting to finish …
255 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was a store instructio…
260 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline suffered a TLB miss an…
265 …"BriefDescription": "Cycles in which the next-to-complete (NTC) instruction is held at dispatch wh…
275 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was a store whose cach…
280 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was waiting for the no…
285 …efDescription": "Cycles in which the oldest instruction in the pipeline was a simple fixed point i…
290 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was waiting for a load…
295 …t instruction in the pipeline was not allowed to complete because it was interrupted by ANY except…
300     "BriefDescription": "VSU instruction issued to VSU pipe 2."
305 …"BriefDescription": "TLBIE instruction finished in the LSU. Two TLBIEs can finish each cycle. All …
310 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was waiting for a load…
315 …instruction in the pipeline was finishing a load after its data was reloaded from a data source be…
320 …ycles when dispatch was stalled after a mispredicted branch resulted in an instruction cache miss."
325 …"BriefDescription": "Cycles in which the next-to-complete (NTC) instruction is held at dispatch be…
330 …"BriefDescription": "Cycles when dispatch was stalled while the instruction was fetched from the l…
345     "BriefDescription": "A fixed point instruction was issued to the VSU."
355 …"BriefDescription": "Cycles when dispatch was stalled while the instruction was fetched from sourc…
360 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline suffered an ERAT miss …
365 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was waiting for a load…
370 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline cannot complete becaus…
375 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was waiting for a load…
385 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was a load instruction…
390 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was a PTESYNC instruct…
395 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was executing in the B…
400 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was a hwsync waiting f…
405 …"BriefDescription": "Cycles in which the oldest instruction in the pipeline was a TLBIEL instructi…
415 …"BriefDescription": "Cycles when dispatch was stalled while the instruction was fetched from any s…
420 …est instruction in the pipeline completed without an ntf_type pulse. The ntf_pulse was missed by t…
425 …"BriefDescription": "Cycles in which the next-to-complete (NTC) instruction is held at dispatch fo…
430     "BriefDescription": "VSU instruction was issued to VSU pipe 3."
435 …cles in which the next-to-complete (NTC) instruction is held at dispatch because of a synchronizin…
440     "BriefDescription": "Non-speculative instruction cache miss, counted at completion."