Lines Matching +full:counter +full:- +full:1
3 ------------------------------
7 as instructions executed, cachemisses suffered, or branches mis-predicted -
9 trigger interrupts when a threshold number of events have passed - and can
12 The Linux Performance Counter subsystem provides an abstraction of these
13 hardware capabilities. It provides per task and per CPU counters, counter
15 provides "virtual" 64-bit counters, regardless of the width of the
19 There's one file descriptor per virtual counter used.
29 VFS system calls: read() can be used to read the counter, fcntl()
35 When creating a new counter fd, 'perf_event_attr' is:
40 * specific (raw) counter configuration data, if unset, the next
50 __u64 disabled : 1, /* off by default */
51 inherit : 1, /* children inherit it */
52 pinned : 1, /* must always be on PMU */
53 exclusive : 1, /* only group on PMU */
54 exclude_user : 1, /* don't count user */
55 exclude_kernel : 1, /* ditto kernel */
56 exclude_hv : 1, /* ditto hypervisor */
57 exclude_idle : 1, /* don't count when idle */
58 mmap : 1, /* include mmap data */
59 munmap : 1, /* include munmap data */
60 comm : 1, /* include comm data */
71 The 'config' field specifies what the counter should count. It
72 is divided into 3 bit-fields:
74 raw_type: 1 bit (most significant bit) 0x8000_0000_0000_0000
78 If 'raw_type' is 1, then the counter will count a hardware event
80 machine-specific.
82 If 'raw_type' is 0, then the 'type' field says what kind of counter
87 PERF_TYPE_SOFTWARE = 1,
91 A counter of PERF_TYPE_HARDWARE will count the hardware event
95 * Generalized performance counter event types, used by the hw_event.event_id
103 PERF_COUNT_HW_INSTRUCTIONS = 1,
119 will return -EINVAL.
121 More hw_event_types are supported as well, but they are CPU-specific
124 in a 0x4064 event_id value and set hw_event.raw_type to 1.
126 A counter of type PERF_TYPE_SOFTWARE will count one of the available
137 PERF_COUNT_SW_TASK_CLOCK = 1,
153 counters. A "counting" counter is one that is used for counting the
158 A read() on a counter returns the current value of the counter and possible
164 * reads on the counter should return the indicated quantities,
165 * in increasing order of bit value, after the counter value.
168 PERF_FORMAT_TOTAL_TIME_ENABLED = 1,
173 particular counter allowing one to take the round-robin scheduling effect
177 A "sampling" counter is one that is set up to generate an interrupt
178 every N events, where N is given by 'irq_period'. A sampling counter
187 PERF_RECORD_IP = 1U << 0,
188 PERF_RECORD_TID = 1U << 1,
189 PERF_RECORD_TIME = 1U << 2,
190 PERF_RECORD_ADDR = 1U << 3,
191 PERF_RECORD_GROUP = 1U << 4,
192 PERF_RECORD_CALLCHAIN = 1U << 5,
195 Such (and other) events will be recorded in a ring-buffer, which is
196 available to user-space using mmap() (see below).
198 The 'disabled' bit specifies whether the counter starts out disabled
202 The 'inherit' bit, if set, specifies that this counter should count
205 time the counter is created (nor to any new descendents of existing
208 The 'pinned' bit, if set, specifies that the counter should always be
210 and only to group leaders. If a pinned counter cannot be put onto the
212 a conflict with some other event), then the counter goes into an
213 'error' state, where reads return end-of-file (i.e. read() returns 0)
214 until the counter is subsequently enabled or disabled.
216 The 'exclusive' bit, if set, specifies that when this counter's group
235 these events are recorded in the ring-buffer (see below).
238 This too is recorded in the ring-buffer (see below).
241 counter to be specific to a task:
243 pid == 0: if the pid parameter is zero, the counter is attached to the
246 pid > 0: the counter is attached to a specific task (if the current task
251 The 'cpu' parameter allows a counter to be made specific to a CPU:
253 cpu >= 0: the counter is restricted to a specific CPU
254 cpu == -1: the counter counts on all CPUs
256 (Note: the combination of 'pid == -1' and 'cpu == -1' is not valid.)
258 A 'pid > 0' and 'cpu == -1' counter is a per task counter that counts
263 A 'pid == -1' and 'cpu == x' counter is a per CPU counter that counts
264 all events on CPU-x. Per CPU counters need CAP_PERFMON or CAP_SYS_ADMIN
269 The 'group_fd' parameter allows counter "groups" to be set up. A
270 counter group has one counter which is the group "leader". The leader
271 is created first, with group_fd = -1 in the sys_perf_event_open call
274 (A single counter on its own is created with group_fd = -1 and is
275 considered to be a group with only 1 member.)
277 A counter group is scheduled onto the CPU as a unit, that is, it will
285 Like stated, asynchronous events, like counter overflow or PROT_EXEC mmap
286 tracking are logged into a ring-buffer. This ring-buffer is created and
289 The mmap size should be 1+2^n pages, where the first page is a meta-data page
291 as where the ring-buffer head is.
301 * Bits needed to read the hw counters in user-space.
307 * seq = pc->lock;
310 * if (pc->index) {
311 * count = pmc_read(pc->index - 1);
312 * count += pc->offset;
317 * } while (pc->lock != seq);
319 * NOTE: for obvious reason this only works on self-monitoring
323 __u32 index; /* hardware counter identifier */
324 __s64 offset; /* add to hardware counter value */
329 * User-space reading this value should issue an rmb(), on SMP capable
330 * platforms, after reading this value -- see perf_event_wakeup().
335 NOTE: the hw-counter userspace bits are arch specific and are currently only
338 The following 2^n pages are the ring-buffer which contains events of the form:
340 #define PERF_RECORD_MISC_KERNEL (1 << 0)
341 #define PERF_RECORD_MISC_USER (1 << 1)
342 #define PERF_RECORD_MISC_OVERFLOW (1 << 2)
366 PERF_RECORD_MMAP = 1,
411 so many counter overflow events.
413 Future work will include a splice() interface to the ring-buffer.
417 prctl. When a counter is disabled, it doesn't count or generate
420 An individual counter can be enabled with
428 For a counter group, pass PERF_IOC_FLAG_GROUP as the third argument.
432 group other than the leader only affects that counter - disabling an
433 non-leader stops that counter from counting but doesn't affect any
434 other counter.
436 Additionally, non-inherited overflow counters can use
440 to enable a counter for 'nr' events, after which it gets disabled again.
442 A process can enable or disable all the counter groups that are
456 -----------------
463 - asm/perf_event.h - a basic stub will suffice at first
464 - support for atomic64 types (and associated helper functions)
469 Architectures that have d-cache aliassing issues, such as Sparc and ARM,