Lines Matching refs:mcasp_set_reg

154 static inline void mcasp_set_reg(struct davinci_mcasp *mcasp, u32 offset,  in mcasp_set_reg()  function
238 mcasp_set_reg(mcasp, DAVINCI_MCASP_RXSTAT_REG, 0xFFFFFFFF); in mcasp_start_rx()
269 mcasp_set_reg(mcasp, DAVINCI_MCASP_TXSTAT_REG, 0xFFFFFFFF); in mcasp_start_tx()
312 mcasp_set_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, 0); in mcasp_stop_rx()
315 mcasp_set_reg(mcasp, DAVINCI_MCASP_GBLCTLR_REG, 0); in mcasp_stop_rx()
316 mcasp_set_reg(mcasp, DAVINCI_MCASP_RXSTAT_REG, 0xFFFFFFFF); in mcasp_stop_rx()
343 mcasp_set_reg(mcasp, DAVINCI_MCASP_GBLCTLX_REG, val); in mcasp_stop_tx()
344 mcasp_set_reg(mcasp, DAVINCI_MCASP_TXSTAT_REG, 0xFFFFFFFF); in mcasp_stop_tx()
391 mcasp_set_reg(mcasp, DAVINCI_MCASP_TXSTAT_REG, handled_mask); in davinci_mcasp_tx_irq_handler()
422 mcasp_set_reg(mcasp, DAVINCI_MCASP_RXSTAT_REG, handled_mask); in davinci_mcasp_rx_irq_handler()
834 mcasp_set_reg(mcasp, DAVINCI_MCASP_RXMASK_REG, mask); in davinci_config_channel_size()
851 mcasp_set_reg(mcasp, DAVINCI_MCASP_TXMASK_REG, mask); in davinci_config_channel_size()
879 mcasp_set_reg(mcasp, DAVINCI_MCASP_TXSTAT_REG, 0xFFFFFFFF); in mcasp_common_hw_param()
885 mcasp_set_reg(mcasp, DAVINCI_MCASP_RXSTAT_REG, 0xFFFFFFFF); in mcasp_common_hw_param()
1032 mcasp_set_reg(mcasp, DAVINCI_MCASP_TXTDM_REG, mask); in mcasp_i2s_hw_param()
1037 mcasp_set_reg(mcasp, DAVINCI_MCASP_RXTDM_REG, mask); in mcasp_i2s_hw_param()
1066 mcasp_set_reg(mcasp, DAVINCI_MCASP_TXFMCTL_REG, AFSXE | FSXMOD(0x180)); in mcasp_dit_hw_param()
1068 mcasp_set_reg(mcasp, DAVINCI_MCASP_TXMASK_REG, 0xFFFF); in mcasp_dit_hw_param()
1071 mcasp_set_reg(mcasp, DAVINCI_MCASP_TXTDM_REG, 0xFFFFFFFF); in mcasp_dit_hw_param()
1113 mcasp_set_reg(mcasp, DAVINCI_MCASP_DITCSRA_REG, mcasp->iec958_status); in mcasp_dit_hw_param()
1114 mcasp_set_reg(mcasp, DAVINCI_MCASP_DITCSRB_REG, mcasp->iec958_status); in mcasp_dit_hw_param()
2286 mcasp_set_reg(mcasp, DAVINCI_MCASP_PFUNC_REG, 0x00000000); in davinci_mcasp_probe()
2506 mcasp_set_reg(mcasp, context_regs[i], context->config_regs[i]); in davinci_mcasp_runtime_resume()
2510 mcasp_set_reg(mcasp, reg, context->afifo_regs[0]); in davinci_mcasp_runtime_resume()
2514 mcasp_set_reg(mcasp, reg, context->afifo_regs[1]); in davinci_mcasp_runtime_resume()
2518 mcasp_set_reg(mcasp, DAVINCI_MCASP_XRSRCTL_REG(i), in davinci_mcasp_runtime_resume()