Lines Matching +full:tdm +full:- +full:slots
1 // SPDX-License-Identifier: GPL-2.0-only
5 * Multi-channel Audio Serial Port Driver
7 * Author: Nirmal Pandey <n-pandey@ti.com>,
39 #include "edma-pcm.h"
40 #include "sdma-pcm.h"
41 #include "udma-pcm.h"
42 #include "davinci-mcasp.h"
136 void __iomem *reg = mcasp->base + offset; in mcasp_set_bits()
143 void __iomem *reg = mcasp->base + offset; in mcasp_clr_bits()
150 void __iomem *reg = mcasp->base + offset; in mcasp_mod_bits()
157 __raw_writel(val, mcasp->base + offset); in mcasp_set_reg()
162 return (u32)__raw_readl(mcasp->base + offset); in mcasp_get_reg()
172 /* loop count is to avoid the lock-up */ in mcasp_set_ctl_reg()
194 for_each_set_bit_from(bit, &mcasp->pdir, PIN_BIT_AFSR + 1) { in mcasp_set_clk_pdir()
206 for_each_set_bit(bit, &mcasp->pdir, PIN_BIT_AMUTE) { in mcasp_set_axr_pdir()
216 if (mcasp->rxnumevt) { /* enable FIFO */ in mcasp_start_rx()
217 u32 reg = mcasp->fifo_base + MCASP_RFIFOCTL_OFFSET; in mcasp_start_rx()
249 mcasp->irq_request[SNDRV_PCM_STREAM_CAPTURE]); in mcasp_start_rx()
256 if (mcasp->txnumevt) { /* enable FIFO */ in mcasp_start_tx()
257 u32 reg = mcasp->fifo_base + MCASP_WFIFOCTL_OFFSET; in mcasp_start_tx()
287 mcasp->irq_request[SNDRV_PCM_STREAM_PLAYBACK]); in mcasp_start_tx()
292 mcasp->streams++; in davinci_mcasp_start()
304 mcasp->irq_request[SNDRV_PCM_STREAM_CAPTURE]); in mcasp_stop_rx()
310 if (mcasp_is_synchronous(mcasp) && !mcasp->streams) { in mcasp_stop_rx()
318 if (mcasp->rxnumevt) { /* disable FIFO */ in mcasp_stop_rx()
319 u32 reg = mcasp->fifo_base + MCASP_RFIFOCTL_OFFSET; in mcasp_stop_rx()
331 mcasp->irq_request[SNDRV_PCM_STREAM_PLAYBACK]); in mcasp_stop_tx()
337 if (mcasp_is_synchronous(mcasp) && mcasp->streams) in mcasp_stop_tx()
346 if (mcasp->txnumevt) { /* disable FIFO */ in mcasp_stop_tx()
347 u32 reg = mcasp->fifo_base + MCASP_WFIFOCTL_OFFSET; in mcasp_stop_tx()
357 mcasp->streams--; in davinci_mcasp_stop()
369 u32 irq_mask = mcasp->irq_request[SNDRV_PCM_STREAM_PLAYBACK]; in davinci_mcasp_tx_irq_handler()
375 dev_warn(mcasp->dev, "Transmit buffer underflow\n"); in davinci_mcasp_tx_irq_handler()
378 substream = mcasp->substreams[SNDRV_PCM_STREAM_PLAYBACK]; in davinci_mcasp_tx_irq_handler()
384 dev_warn(mcasp->dev, "unhandled tx event. txstat: 0x%08x\n", in davinci_mcasp_tx_irq_handler()
400 u32 irq_mask = mcasp->irq_request[SNDRV_PCM_STREAM_CAPTURE]; in davinci_mcasp_rx_irq_handler()
406 dev_warn(mcasp->dev, "Receive buffer overflow\n"); in davinci_mcasp_rx_irq_handler()
409 substream = mcasp->substreams[SNDRV_PCM_STREAM_CAPTURE]; in davinci_mcasp_rx_irq_handler()
415 dev_warn(mcasp->dev, "unhandled rx event. rxstat: 0x%08x\n", in davinci_mcasp_rx_irq_handler()
432 if (mcasp->substreams[SNDRV_PCM_STREAM_PLAYBACK]) in davinci_mcasp_common_irq_handler()
435 if (mcasp->substreams[SNDRV_PCM_STREAM_CAPTURE]) in davinci_mcasp_common_irq_handler()
453 pm_runtime_get_sync(mcasp->dev); in davinci_mcasp_set_dai_fmt()
469 /* configure a full-word SYNC pulse (LRCLK) */ in davinci_mcasp_set_dai_fmt()
479 /* configure a full-word SYNC pulse (LRCLK) */ in davinci_mcasp_set_dai_fmt()
486 ret = -EINVAL; in davinci_mcasp_set_dai_fmt()
505 set_bit(PIN_BIT_ACLKX, &mcasp->pdir); in davinci_mcasp_set_dai_fmt()
506 set_bit(PIN_BIT_ACLKR, &mcasp->pdir); in davinci_mcasp_set_dai_fmt()
508 set_bit(PIN_BIT_AFSX, &mcasp->pdir); in davinci_mcasp_set_dai_fmt()
509 set_bit(PIN_BIT_AFSR, &mcasp->pdir); in davinci_mcasp_set_dai_fmt()
511 mcasp->bclk_master = 1; in davinci_mcasp_set_dai_fmt()
522 set_bit(PIN_BIT_ACLKX, &mcasp->pdir); in davinci_mcasp_set_dai_fmt()
523 set_bit(PIN_BIT_ACLKR, &mcasp->pdir); in davinci_mcasp_set_dai_fmt()
525 clear_bit(PIN_BIT_AFSX, &mcasp->pdir); in davinci_mcasp_set_dai_fmt()
526 clear_bit(PIN_BIT_AFSR, &mcasp->pdir); in davinci_mcasp_set_dai_fmt()
528 mcasp->bclk_master = 1; in davinci_mcasp_set_dai_fmt()
539 clear_bit(PIN_BIT_ACLKX, &mcasp->pdir); in davinci_mcasp_set_dai_fmt()
540 clear_bit(PIN_BIT_ACLKR, &mcasp->pdir); in davinci_mcasp_set_dai_fmt()
542 set_bit(PIN_BIT_AFSX, &mcasp->pdir); in davinci_mcasp_set_dai_fmt()
543 set_bit(PIN_BIT_AFSR, &mcasp->pdir); in davinci_mcasp_set_dai_fmt()
545 mcasp->bclk_master = 0; in davinci_mcasp_set_dai_fmt()
556 clear_bit(PIN_BIT_ACLKX, &mcasp->pdir); in davinci_mcasp_set_dai_fmt()
557 clear_bit(PIN_BIT_ACLKR, &mcasp->pdir); in davinci_mcasp_set_dai_fmt()
559 clear_bit(PIN_BIT_AFSX, &mcasp->pdir); in davinci_mcasp_set_dai_fmt()
560 clear_bit(PIN_BIT_AFSR, &mcasp->pdir); in davinci_mcasp_set_dai_fmt()
562 mcasp->bclk_master = 0; in davinci_mcasp_set_dai_fmt()
565 ret = -EINVAL; in davinci_mcasp_set_dai_fmt()
591 ret = -EINVAL; in davinci_mcasp_set_dai_fmt()
606 mcasp->dai_fmt = fmt; in davinci_mcasp_set_dai_fmt()
608 pm_runtime_put(mcasp->dev); in davinci_mcasp_set_dai_fmt()
615 pm_runtime_get_sync(mcasp->dev); in __davinci_mcasp_set_clkdiv()
619 AHCLKXDIV(div - 1), AHCLKXDIV_MASK); in __davinci_mcasp_set_clkdiv()
621 AHCLKRDIV(div - 1), AHCLKRDIV_MASK); in __davinci_mcasp_set_clkdiv()
626 ACLKXDIV(div - 1), ACLKXDIV_MASK); in __davinci_mcasp_set_clkdiv()
628 ACLKRDIV(div - 1), ACLKRDIV_MASK); in __davinci_mcasp_set_clkdiv()
630 mcasp->bclk_div = div; in __davinci_mcasp_set_clkdiv()
635 * BCLK/LRCLK ratio descries how many bit-clock cycles in __davinci_mcasp_set_clkdiv()
639 * of tdm-slots (for I2S - divided by 2). in __davinci_mcasp_set_clkdiv()
642 * number of configured tdm slots. in __davinci_mcasp_set_clkdiv()
644 mcasp->slot_width = div / mcasp->tdm_slots; in __davinci_mcasp_set_clkdiv()
645 if (div % mcasp->tdm_slots) in __davinci_mcasp_set_clkdiv()
646 dev_warn(mcasp->dev, in __davinci_mcasp_set_clkdiv()
647 "%s(): BCLK/LRCLK %d is not divisible by %d tdm slots", in __davinci_mcasp_set_clkdiv()
648 __func__, div, mcasp->tdm_slots); in __davinci_mcasp_set_clkdiv()
652 return -EINVAL; in __davinci_mcasp_set_clkdiv()
655 pm_runtime_put(mcasp->dev); in __davinci_mcasp_set_clkdiv()
672 pm_runtime_get_sync(mcasp->dev); in davinci_mcasp_set_sysclk()
681 clear_bit(PIN_BIT_AHCLKX, &mcasp->pdir); in davinci_mcasp_set_sysclk()
688 set_bit(PIN_BIT_AHCLKX, &mcasp->pdir); in davinci_mcasp_set_sysclk()
691 dev_err(mcasp->dev, "Invalid clk id: %d\n", clk_id); in davinci_mcasp_set_sysclk()
698 set_bit(PIN_BIT_AHCLKX, &mcasp->pdir); in davinci_mcasp_set_sysclk()
702 * the same clock - coming via AUXCLK. in davinci_mcasp_set_sysclk()
704 mcasp->sysclk_freq = freq; in davinci_mcasp_set_sysclk()
706 pm_runtime_put(mcasp->dev); in davinci_mcasp_set_sysclk()
714 struct snd_pcm_hw_constraint_list *cl = &mcasp->chconstr[stream]; in davinci_mcasp_ch_constraint()
715 unsigned int *list = (unsigned int *) cl->list; in davinci_mcasp_ch_constraint()
716 int slots = mcasp->tdm_slots; in davinci_mcasp_ch_constraint() local
719 if (mcasp->tdm_mask[stream]) in davinci_mcasp_ch_constraint()
720 slots = hweight32(mcasp->tdm_mask[stream]); in davinci_mcasp_ch_constraint()
722 for (i = 1; i <= slots; i++) in davinci_mcasp_ch_constraint()
726 list[count++] = i*slots; in davinci_mcasp_ch_constraint()
728 cl->count = count; in davinci_mcasp_ch_constraint()
737 for (i = 0; i < mcasp->num_serializer; i++) in davinci_mcasp_set_ch_constraints()
738 if (mcasp->serial_dir[i] == TX_MODE) in davinci_mcasp_set_ch_constraints()
740 else if (mcasp->serial_dir[i] == RX_MODE) in davinci_mcasp_set_ch_constraints()
758 int slots, int slot_width) in davinci_mcasp_set_tdm_slot() argument
762 if (mcasp->op_mode == DAVINCI_MCASP_DIT_MODE) in davinci_mcasp_set_tdm_slot()
765 dev_dbg(mcasp->dev, in davinci_mcasp_set_tdm_slot()
766 "%s() tx_mask 0x%08x rx_mask 0x%08x slots %d width %d\n", in davinci_mcasp_set_tdm_slot()
767 __func__, tx_mask, rx_mask, slots, slot_width); in davinci_mcasp_set_tdm_slot()
769 if (tx_mask >= (1<<slots) || rx_mask >= (1<<slots)) { in davinci_mcasp_set_tdm_slot()
770 dev_err(mcasp->dev, in davinci_mcasp_set_tdm_slot()
771 "Bad tdm mask tx: 0x%08x rx: 0x%08x slots %d\n", in davinci_mcasp_set_tdm_slot()
772 tx_mask, rx_mask, slots); in davinci_mcasp_set_tdm_slot()
773 return -EINVAL; in davinci_mcasp_set_tdm_slot()
778 dev_err(mcasp->dev, "%s: Unsupported slot_width %d\n", in davinci_mcasp_set_tdm_slot()
780 return -EINVAL; in davinci_mcasp_set_tdm_slot()
783 mcasp->tdm_slots = slots; in davinci_mcasp_set_tdm_slot()
784 mcasp->tdm_mask[SNDRV_PCM_STREAM_PLAYBACK] = tx_mask; in davinci_mcasp_set_tdm_slot()
785 mcasp->tdm_mask[SNDRV_PCM_STREAM_CAPTURE] = rx_mask; in davinci_mcasp_set_tdm_slot()
786 mcasp->slot_width = slot_width; in davinci_mcasp_set_tdm_slot()
796 u32 mask = (1ULL << sample_width) - 1; in davinci_config_channel_size()
798 if (mcasp->slot_width) in davinci_config_channel_size()
799 slot_width = mcasp->slot_width; in davinci_config_channel_size()
800 else if (mcasp->max_format_width) in davinci_config_channel_size()
801 slot_width = mcasp->max_format_width; in davinci_config_channel_size()
811 * left aligned formats: rotate w/ (slot_width - sample_width) in davinci_config_channel_size()
813 if ((mcasp->dai_fmt & SND_SOC_DAIFMT_FORMAT_MASK) == in davinci_config_channel_size()
819 rx_rotate = (slot_width - sample_width) / 4; in davinci_config_channel_size()
822 /* mapping of the XSSZ bit-field as described in the datasheet */ in davinci_config_channel_size()
823 fmt = (slot_width >> 1) - 1; in davinci_config_channel_size()
825 if (mcasp->op_mode != DAVINCI_MCASP_DIT_MODE) { in davinci_config_channel_size()
838 * 16 bit to 23-8 (TXROT=6, rotate 24 bits) in davinci_config_channel_size()
839 * 24 bit to 23-0 (TXROT=0, rotate 0 bits) in davinci_config_channel_size()
859 struct snd_dmaengine_dai_dma_data *dma_data = &mcasp->dma_data[stream]; in mcasp_common_hw_param()
863 u8 slots = mcasp->tdm_slots; in mcasp_common_hw_param() local
869 if (mcasp->op_mode == DAVINCI_MCASP_DIT_MODE) in mcasp_common_hw_param()
872 max_active_serializers = DIV_ROUND_UP(channels, slots); in mcasp_common_hw_param()
875 if (mcasp->version < MCASP_VERSION_3) in mcasp_common_hw_param()
883 mcasp->active_serializers[SNDRV_PCM_STREAM_CAPTURE]; in mcasp_common_hw_param()
888 mcasp->active_serializers[SNDRV_PCM_STREAM_PLAYBACK]; in mcasp_common_hw_param()
892 for (i = 0; i < mcasp->num_serializer; i++) { in mcasp_common_hw_param()
894 mcasp->serial_dir[i]); in mcasp_common_hw_param()
895 if (mcasp->serial_dir[i] == TX_MODE && in mcasp_common_hw_param()
898 mcasp->dismod, DISMOD_MASK); in mcasp_common_hw_param()
899 set_bit(PIN_BIT_AXR(i), &mcasp->pdir); in mcasp_common_hw_param()
901 } else if (mcasp->serial_dir[i] == RX_MODE && in mcasp_common_hw_param()
903 clear_bit(PIN_BIT_AXR(i), &mcasp->pdir); in mcasp_common_hw_param()
910 if (mcasp->serial_dir[i] != INACTIVE_MODE) in mcasp_common_hw_param()
913 mcasp->dismod, DISMOD_MASK); in mcasp_common_hw_param()
914 clear_bit(PIN_BIT_AXR(i), &mcasp->pdir); in mcasp_common_hw_param()
920 numevt = mcasp->txnumevt; in mcasp_common_hw_param()
921 reg = mcasp->fifo_base + MCASP_WFIFOCTL_OFFSET; in mcasp_common_hw_param()
924 numevt = mcasp->rxnumevt; in mcasp_common_hw_param()
925 reg = mcasp->fifo_base + MCASP_RFIFOCTL_OFFSET; in mcasp_common_hw_param()
929 dev_warn(mcasp->dev, "stream has more channels (%d) than are " in mcasp_common_hw_param()
931 active_serializers * slots); in mcasp_common_hw_param()
932 return -EINVAL; in mcasp_common_hw_param()
945 dma_data->maxburst = active_serializers; in mcasp_common_hw_param()
947 dma_data->maxburst = 0; in mcasp_common_hw_param()
954 dev_err(mcasp->dev, "Invalid combination of period words and " in mcasp_common_hw_param()
957 return -EINVAL; in mcasp_common_hw_param()
968 numevt -= active_serializers; in mcasp_common_hw_param()
978 dma_data->maxburst = numevt; in mcasp_common_hw_param()
981 mcasp->active_serializers[stream] = active_serializers; in mcasp_common_hw_param()
995 total_slots = mcasp->tdm_slots; in mcasp_i2s_hw_param()
1000 * cope with the transaction using just as many slots as there in mcasp_i2s_hw_param()
1003 if (mcasp->tdm_mask[stream]) { in mcasp_i2s_hw_param()
1004 active_slots = hweight32(mcasp->tdm_mask[stream]); in mcasp_i2s_hw_param()
1009 if ((1 << i) & mcasp->tdm_mask[stream]) { in mcasp_i2s_hw_param()
1011 if (--active_slots <= 0) in mcasp_i2s_hw_param()
1028 if (!mcasp->dat_port) in mcasp_i2s_hw_param()
1043 * not running already we need to configure the TX slots in in mcasp_i2s_hw_param()
1046 if (mcasp_is_synchronous(mcasp) && !mcasp->channels) in mcasp_i2s_hw_param()
1058 u8 *cs_bytes = (u8 *)&mcasp->iec958_status; in mcasp_dit_hw_param()
1060 if (!mcasp->dat_port) in mcasp_dit_hw_param()
1070 /* Set the TX tdm : for all the slots */ in mcasp_dit_hw_param()
1109 dev_err(mcasp->dev, "unsupported sampling rate: %d\n", rate); in mcasp_dit_hw_param()
1110 return -EINVAL; in mcasp_dit_hw_param()
1113 mcasp_set_reg(mcasp, DAVINCI_MCASP_DITCSRA_REG, mcasp->iec958_status); in mcasp_dit_hw_param()
1114 mcasp_set_reg(mcasp, DAVINCI_MCASP_DITCSRB_REG, mcasp->iec958_status); in mcasp_dit_hw_param()
1142 dev_warn(mcasp->dev, "Too fast reference clock (%u)\n", in davinci_mcasp_calc_clk_div()
1149 ((sysclk_freq / div) - bclk_freq) > in davinci_mcasp_calc_clk_div()
1150 (bclk_freq - (sysclk_freq / (div+1)))) { in davinci_mcasp_calc_clk_div()
1152 rem = rem - bclk_freq; in davinci_mcasp_calc_clk_div()
1156 (int)bclk_freq)) / div - 1000000; in davinci_mcasp_calc_clk_div()
1160 dev_info(mcasp->dev, "Sample-rate is off by %d PPM\n", in davinci_mcasp_calc_clk_div()
1174 if (!mcasp->txnumevt) in davinci_mcasp_tx_delay()
1177 return mcasp_get_reg(mcasp, mcasp->fifo_base + MCASP_WFIFOSTS_OFFSET); in davinci_mcasp_tx_delay()
1182 if (!mcasp->rxnumevt) in davinci_mcasp_rx_delay()
1185 return mcasp_get_reg(mcasp, mcasp->fifo_base + MCASP_RFIFOSTS_OFFSET); in davinci_mcasp_rx_delay()
1195 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) in davinci_mcasp_delay()
1205 return fifo_use / substream->runtime->channels; in davinci_mcasp_delay()
1245 printk(KERN_WARNING "davinci-mcasp: unsupported PCM format"); in davinci_mcasp_hw_params()
1246 return -EINVAL; in davinci_mcasp_hw_params()
1249 ret = davinci_mcasp_set_dai_fmt(cpu_dai, mcasp->dai_fmt); in davinci_mcasp_hw_params()
1257 if (mcasp->bclk_master && mcasp->bclk_div == 0 && mcasp->sysclk_freq) { in davinci_mcasp_hw_params()
1258 int slots = mcasp->tdm_slots; in davinci_mcasp_hw_params() local
1263 if (mcasp->slot_width) in davinci_mcasp_hw_params()
1264 sbits = mcasp->slot_width; in davinci_mcasp_hw_params()
1266 if (mcasp->op_mode == DAVINCI_MCASP_IIS_MODE) in davinci_mcasp_hw_params()
1267 bclk_target = rate * sbits * slots; in davinci_mcasp_hw_params()
1271 davinci_mcasp_calc_clk_div(mcasp, mcasp->sysclk_freq, in davinci_mcasp_hw_params()
1275 ret = mcasp_common_hw_param(mcasp, substream->stream, in davinci_mcasp_hw_params()
1280 if (mcasp->op_mode == DAVINCI_MCASP_DIT_MODE) in davinci_mcasp_hw_params()
1283 ret = mcasp_i2s_hw_param(mcasp, substream->stream, in davinci_mcasp_hw_params()
1291 if (mcasp->op_mode == DAVINCI_MCASP_IIS_MODE) { in davinci_mcasp_hw_params()
1292 mcasp->channels = channels; in davinci_mcasp_hw_params()
1293 if (!mcasp->max_format_width) in davinci_mcasp_hw_params()
1294 mcasp->max_format_width = word_length; in davinci_mcasp_hw_params()
1310 davinci_mcasp_start(mcasp, substream->stream); in davinci_mcasp_trigger()
1315 davinci_mcasp_stop(mcasp, substream->stream); in davinci_mcasp_trigger()
1319 ret = -EINVAL; in davinci_mcasp_trigger()
1328 struct davinci_mcasp_ruledata *rd = rule->private; in davinci_mcasp_hw_rule_slot_width()
1335 slot_width = rd->mcasp->slot_width; in davinci_mcasp_hw_rule_slot_width()
1351 struct davinci_mcasp_ruledata *rd = rule->private; in davinci_mcasp_hw_rule_format_width()
1358 format_width = rd->mcasp->max_format_width; in davinci_mcasp_hw_rule_format_width()
1381 struct davinci_mcasp_ruledata *rd = rule->private; in davinci_mcasp_hw_rule_rate()
1385 int slots = rd->mcasp->tdm_slots; in davinci_mcasp_hw_rule_rate() local
1389 if (rd->mcasp->slot_width) in davinci_mcasp_hw_rule_rate()
1390 sbits = rd->mcasp->slot_width; in davinci_mcasp_hw_rule_rate()
1397 uint bclk_freq = sbits * slots * in davinci_mcasp_hw_rule_rate()
1402 if (rd->mcasp->auxclk_fs_ratio) in davinci_mcasp_hw_rule_rate()
1404 rd->mcasp->auxclk_fs_ratio; in davinci_mcasp_hw_rule_rate()
1406 sysclk_freq = rd->mcasp->sysclk_freq; in davinci_mcasp_hw_rule_rate()
1408 ppm = davinci_mcasp_calc_clk_div(rd->mcasp, sysclk_freq, in davinci_mcasp_hw_rule_rate()
1420 dev_dbg(rd->mcasp->dev, in davinci_mcasp_hw_rule_rate()
1421 "Frequencies %d-%d -> %d-%d for %d sbits and %d tdm slots\n", in davinci_mcasp_hw_rule_rate()
1422 ri->min, ri->max, range.min, range.max, sbits, slots); in davinci_mcasp_hw_rule_rate()
1424 return snd_interval_refine(hw_param_interval(params, rule->var), in davinci_mcasp_hw_rule_rate()
1431 struct davinci_mcasp_ruledata *rd = rule->private; in davinci_mcasp_hw_rule_format()
1435 int slots = rd->mcasp->tdm_slots; in davinci_mcasp_hw_rule_format() local
1447 if (rd->mcasp->auxclk_fs_ratio) in davinci_mcasp_hw_rule_format()
1449 rd->mcasp->auxclk_fs_ratio; in davinci_mcasp_hw_rule_format()
1451 sysclk_freq = rd->mcasp->sysclk_freq; in davinci_mcasp_hw_rule_format()
1453 if (rd->mcasp->slot_width) in davinci_mcasp_hw_rule_format()
1454 sbits = rd->mcasp->slot_width; in davinci_mcasp_hw_rule_format()
1456 ppm = davinci_mcasp_calc_clk_div(rd->mcasp, sysclk_freq, in davinci_mcasp_hw_rule_format()
1457 sbits * slots * rate, in davinci_mcasp_hw_rule_format()
1465 dev_dbg(rd->mcasp->dev, in davinci_mcasp_hw_rule_format()
1466 "%d possible sample format for %d Hz and %d tdm slots\n", in davinci_mcasp_hw_rule_format()
1467 count, rate, slots); in davinci_mcasp_hw_rule_format()
1491 &mcasp->ruledata[substream->stream]; in davinci_mcasp_startup()
1494 int tdm_slots = mcasp->tdm_slots; in davinci_mcasp_startup()
1497 if (mcasp->substreams[substream->stream]) in davinci_mcasp_startup()
1498 return -EBUSY; in davinci_mcasp_startup()
1500 mcasp->substreams[substream->stream] = substream; in davinci_mcasp_startup()
1502 if (mcasp->tdm_mask[substream->stream]) in davinci_mcasp_startup()
1503 tdm_slots = hweight32(mcasp->tdm_mask[substream->stream]); in davinci_mcasp_startup()
1505 if (mcasp->op_mode == DAVINCI_MCASP_DIT_MODE) in davinci_mcasp_startup()
1510 * number of serializers for the direction * tdm slots per serializer in davinci_mcasp_startup()
1512 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) in davinci_mcasp_startup()
1517 for (i = 0; i < mcasp->num_serializer; i++) { in davinci_mcasp_startup()
1518 if (mcasp->serial_dir[i] == dir) in davinci_mcasp_startup()
1521 ruledata->serializers = max_channels; in davinci_mcasp_startup()
1522 ruledata->mcasp = mcasp; in davinci_mcasp_startup()
1531 if (mcasp->channels && mcasp->channels < max_channels && in davinci_mcasp_startup()
1532 ruledata->serializers == 1) in davinci_mcasp_startup()
1533 max_channels = mcasp->channels; in davinci_mcasp_startup()
1541 snd_pcm_hw_constraint_minmax(substream->runtime, in davinci_mcasp_startup()
1545 snd_pcm_hw_constraint_list(substream->runtime, in davinci_mcasp_startup()
1547 &mcasp->chconstr[substream->stream]); in davinci_mcasp_startup()
1549 if (mcasp->max_format_width) { in davinci_mcasp_startup()
1554 ret = snd_pcm_hw_rule_add(substream->runtime, 0, in davinci_mcasp_startup()
1558 SNDRV_PCM_HW_PARAM_FORMAT, -1); in davinci_mcasp_startup()
1562 else if (mcasp->slot_width) { in davinci_mcasp_startup()
1564 ret = snd_pcm_hw_rule_add(substream->runtime, 0, in davinci_mcasp_startup()
1568 SNDRV_PCM_HW_PARAM_FORMAT, -1); in davinci_mcasp_startup()
1577 if (mcasp->bclk_master && mcasp->bclk_div == 0 && mcasp->sysclk_freq) { in davinci_mcasp_startup()
1578 ret = snd_pcm_hw_rule_add(substream->runtime, 0, in davinci_mcasp_startup()
1582 SNDRV_PCM_HW_PARAM_FORMAT, -1); in davinci_mcasp_startup()
1585 ret = snd_pcm_hw_rule_add(substream->runtime, 0, in davinci_mcasp_startup()
1589 SNDRV_PCM_HW_PARAM_RATE, -1); in davinci_mcasp_startup()
1594 snd_pcm_hw_rule_add(substream->runtime, 0, in davinci_mcasp_startup()
1597 SNDRV_PCM_HW_PARAM_PERIOD_SIZE, -1); in davinci_mcasp_startup()
1607 mcasp->substreams[substream->stream] = NULL; in davinci_mcasp_shutdown()
1608 mcasp->active_serializers[substream->stream] = 0; in davinci_mcasp_shutdown()
1610 if (mcasp->op_mode == DAVINCI_MCASP_DIT_MODE) in davinci_mcasp_shutdown()
1614 mcasp->channels = 0; in davinci_mcasp_shutdown()
1615 mcasp->max_format_width = 0; in davinci_mcasp_shutdown()
1622 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; in davinci_mcasp_iec958_info()
1623 uinfo->count = 1; in davinci_mcasp_iec958_info()
1634 memcpy(uctl->value.iec958.status, &mcasp->iec958_status, in davinci_mcasp_iec958_get()
1635 sizeof(mcasp->iec958_status)); in davinci_mcasp_iec958_get()
1646 memcpy(&mcasp->iec958_status, uctl->value.iec958.status, in davinci_mcasp_iec958_put()
1647 sizeof(mcasp->iec958_status)); in davinci_mcasp_iec958_put()
1658 memset(ucontrol->value.iec958.status, 0xff, sizeof(mcasp->iec958_status)); in davinci_mcasp_iec958_con_mask_get()
1682 unsigned char *cs = (u8 *)&mcasp->iec958_status; in davinci_mcasp_init_iec958_status()
1696 snd_soc_dai_dma_data_set(dai, stream, &mcasp->dma_data[stream]); in davinci_mcasp_dai_probe()
1698 if (mcasp->op_mode == DAVINCI_MCASP_DIT_MODE) { in davinci_mcasp_dai_probe()
1735 .name = "davinci-mcasp.0",
1755 .name = "davinci-mcasp.1",
1770 .name = "davinci-mcasp",
1808 .compatible = "ti,dm646x-mcasp-audio",
1812 .compatible = "ti,da830-mcasp-audio",
1816 .compatible = "ti,am33xx-mcasp-audio",
1820 .compatible = "ti,dra7-mcasp-audio",
1824 .compatible = "ti,omap4-mcasp-audio",
1833 struct device_node *node = pdev->dev.of_node; in mcasp_reparent_fck()
1845 dev_warn(&pdev->dev, "Update the bindings to use assigned-clocks!\n"); in mcasp_reparent_fck()
1847 gfclk = clk_get(&pdev->dev, "fck"); in mcasp_reparent_fck()
1849 dev_err(&pdev->dev, "failed to get fck\n"); in mcasp_reparent_fck()
1855 dev_err(&pdev->dev, "failed to get parent clock\n"); in mcasp_reparent_fck()
1862 dev_err(&pdev->dev, "failed to reparent fck\n"); in mcasp_reparent_fck()
1876 return of_property_read_bool(mcasp->dev->of_node, "gpio-controller"); in davinci_mcasp_have_gpiochip()
1885 const struct of_device_id *match = of_match_device(mcasp_dt_ids, &pdev->dev); in davinci_mcasp_get_config()
1886 struct device_node *np = pdev->dev.of_node; in davinci_mcasp_get_config()
1892 if (pdev->dev.platform_data) { in davinci_mcasp_get_config()
1893 pdata = pdev->dev.platform_data; in davinci_mcasp_get_config()
1894 pdata->dismod = DISMOD_LOW; in davinci_mcasp_get_config()
1897 pdata = devm_kmemdup(&pdev->dev, match->data, sizeof(*pdata), in davinci_mcasp_get_config()
1900 return -ENOMEM; in davinci_mcasp_get_config()
1902 dev_err(&pdev->dev, "No compatible match found\n"); in davinci_mcasp_get_config()
1903 return -EINVAL; in davinci_mcasp_get_config()
1906 if (of_property_read_u32(np, "op-mode", &val) == 0) { in davinci_mcasp_get_config()
1907 pdata->op_mode = val; in davinci_mcasp_get_config()
1909 mcasp->missing_audio_param = true; in davinci_mcasp_get_config()
1913 if (of_property_read_u32(np, "tdm-slots", &val) == 0) { in davinci_mcasp_get_config()
1915 dev_err(&pdev->dev, "tdm-slots must be in rage [2-32]\n"); in davinci_mcasp_get_config()
1916 return -EINVAL; in davinci_mcasp_get_config()
1919 pdata->tdm_slots = val; in davinci_mcasp_get_config()
1920 } else if (pdata->op_mode == DAVINCI_MCASP_IIS_MODE) { in davinci_mcasp_get_config()
1921 mcasp->missing_audio_param = true; in davinci_mcasp_get_config()
1925 of_serial_dir32 = of_get_property(np, "serial-dir", &val); in davinci_mcasp_get_config()
1928 u8 *of_serial_dir = devm_kzalloc(&pdev->dev, in davinci_mcasp_get_config()
1932 return -ENOMEM; in davinci_mcasp_get_config()
1937 pdata->num_serializer = val; in davinci_mcasp_get_config()
1938 pdata->serial_dir = of_serial_dir; in davinci_mcasp_get_config()
1940 mcasp->missing_audio_param = true; in davinci_mcasp_get_config()
1944 if (of_property_read_u32(np, "tx-num-evt", &val) == 0) in davinci_mcasp_get_config()
1945 pdata->txnumevt = val; in davinci_mcasp_get_config()
1947 if (of_property_read_u32(np, "rx-num-evt", &val) == 0) in davinci_mcasp_get_config()
1948 pdata->rxnumevt = val; in davinci_mcasp_get_config()
1950 if (of_property_read_u32(np, "auxclk-fs-ratio", &val) == 0) in davinci_mcasp_get_config()
1951 mcasp->auxclk_fs_ratio = val; in davinci_mcasp_get_config()
1955 pdata->dismod = DISMOD_VAL(val); in davinci_mcasp_get_config()
1957 dev_warn(&pdev->dev, "Invalid dismod value: %u\n", val); in davinci_mcasp_get_config()
1958 pdata->dismod = DISMOD_LOW; in davinci_mcasp_get_config()
1961 pdata->dismod = DISMOD_LOW; in davinci_mcasp_get_config()
1965 mcasp->pdata = pdata; in davinci_mcasp_get_config()
1967 if (mcasp->missing_audio_param) { in davinci_mcasp_get_config()
1969 dev_dbg(&pdev->dev, "Missing DT parameter(s) for audio\n"); in davinci_mcasp_get_config()
1973 dev_err(&pdev->dev, "Insufficient DT parameter(s)\n"); in davinci_mcasp_get_config()
1974 return -ENODEV; in davinci_mcasp_get_config()
1977 mcasp->op_mode = pdata->op_mode; in davinci_mcasp_get_config()
1978 /* sanity check for tdm slots parameter */ in davinci_mcasp_get_config()
1979 if (mcasp->op_mode == DAVINCI_MCASP_IIS_MODE) { in davinci_mcasp_get_config()
1980 if (pdata->tdm_slots < 2) { in davinci_mcasp_get_config()
1981 dev_warn(&pdev->dev, "invalid tdm slots: %d\n", in davinci_mcasp_get_config()
1982 pdata->tdm_slots); in davinci_mcasp_get_config()
1983 mcasp->tdm_slots = 2; in davinci_mcasp_get_config()
1984 } else if (pdata->tdm_slots > 32) { in davinci_mcasp_get_config()
1985 dev_warn(&pdev->dev, "invalid tdm slots: %d\n", in davinci_mcasp_get_config()
1986 pdata->tdm_slots); in davinci_mcasp_get_config()
1987 mcasp->tdm_slots = 32; in davinci_mcasp_get_config()
1989 mcasp->tdm_slots = pdata->tdm_slots; in davinci_mcasp_get_config()
1992 mcasp->tdm_slots = 32; in davinci_mcasp_get_config()
1995 mcasp->num_serializer = pdata->num_serializer; in davinci_mcasp_get_config()
1997 mcasp->context.xrsr_regs = devm_kcalloc(&pdev->dev, in davinci_mcasp_get_config()
1998 mcasp->num_serializer, sizeof(u32), in davinci_mcasp_get_config()
2000 if (!mcasp->context.xrsr_regs) in davinci_mcasp_get_config()
2001 return -ENOMEM; in davinci_mcasp_get_config()
2003 mcasp->serial_dir = pdata->serial_dir; in davinci_mcasp_get_config()
2004 mcasp->version = pdata->version; in davinci_mcasp_get_config()
2005 mcasp->txnumevt = pdata->txnumevt; in davinci_mcasp_get_config()
2006 mcasp->rxnumevt = pdata->rxnumevt; in davinci_mcasp_get_config()
2007 mcasp->dismod = pdata->dismod; in davinci_mcasp_get_config()
2025 if (!mcasp->dev->of_node) in davinci_mcasp_get_dma_type()
2028 tmp = mcasp->dma_data[SNDRV_PCM_STREAM_PLAYBACK].filter_data; in davinci_mcasp_get_dma_type()
2029 chan = dma_request_chan(mcasp->dev, tmp); in davinci_mcasp_get_dma_type()
2031 return dev_err_probe(mcasp->dev, PTR_ERR(chan), in davinci_mcasp_get_dma_type()
2033 if (WARN_ON(!chan->device || !chan->device->dev)) { in davinci_mcasp_get_dma_type()
2035 return -EINVAL; in davinci_mcasp_get_dma_type()
2038 if (chan->device->dev->of_node) in davinci_mcasp_get_dma_type()
2039 ret = of_property_read_string(chan->device->dev->of_node, in davinci_mcasp_get_dma_type()
2042 dev_dbg(mcasp->dev, "DMA controller has no of-node\n"); in davinci_mcasp_get_dma_type()
2048 dev_dbg(mcasp->dev, "DMA controller compatible = \"%s\"\n", tmp); in davinci_mcasp_get_dma_type()
2064 if (pdata->version != MCASP_VERSION_4) in davinci_mcasp_txdma_offset()
2065 return pdata->tx_dma_offset; in davinci_mcasp_txdma_offset()
2067 for (i = 0; i < pdata->num_serializer; i++) { in davinci_mcasp_txdma_offset()
2068 if (pdata->serial_dir[i] == TX_MODE) { in davinci_mcasp_txdma_offset()
2087 if (pdata->version != MCASP_VERSION_4) in davinci_mcasp_rxdma_offset()
2088 return pdata->rx_dma_offset; in davinci_mcasp_rxdma_offset()
2090 for (i = 0; i < pdata->num_serializer; i++) { in davinci_mcasp_rxdma_offset()
2091 if (pdata->serial_dir[i] == RX_MODE) { in davinci_mcasp_rxdma_offset()
2110 if (mcasp->num_serializer && offset < mcasp->num_serializer && in davinci_mcasp_gpio_request()
2111 mcasp->serial_dir[offset] != INACTIVE_MODE) { in davinci_mcasp_gpio_request()
2112 dev_err(mcasp->dev, "AXR%u pin is used for audio\n", offset); in davinci_mcasp_gpio_request()
2113 return -EBUSY; in davinci_mcasp_gpio_request()
2117 return pm_runtime_resume_and_get(mcasp->dev); in davinci_mcasp_gpio_request()
2130 pm_runtime_put_sync(mcasp->dev); in davinci_mcasp_gpio_free()
2219 .base = -1,
2228 mcasp->gpio_chip = davinci_mcasp_template_chip; in davinci_mcasp_init_gpiochip()
2229 mcasp->gpio_chip.label = dev_name(mcasp->dev); in davinci_mcasp_init_gpiochip()
2230 mcasp->gpio_chip.parent = mcasp->dev; in davinci_mcasp_init_gpiochip()
2232 return devm_gpiochip_add_data(mcasp->dev, &mcasp->gpio_chip, mcasp); in davinci_mcasp_init_gpiochip()
2251 if (!pdev->dev.platform_data && !pdev->dev.of_node) { in davinci_mcasp_probe()
2252 dev_err(&pdev->dev, "No platform data supplied\n"); in davinci_mcasp_probe()
2253 return -EINVAL; in davinci_mcasp_probe()
2256 mcasp = devm_kzalloc(&pdev->dev, sizeof(struct davinci_mcasp), in davinci_mcasp_probe()
2259 return -ENOMEM; in davinci_mcasp_probe()
2263 dev_warn(&pdev->dev, in davinci_mcasp_probe()
2267 dev_err(&pdev->dev, "no mem resource?\n"); in davinci_mcasp_probe()
2268 return -ENODEV; in davinci_mcasp_probe()
2272 mcasp->base = devm_ioremap_resource(&pdev->dev, mem); in davinci_mcasp_probe()
2273 if (IS_ERR(mcasp->base)) in davinci_mcasp_probe()
2274 return PTR_ERR(mcasp->base); in davinci_mcasp_probe()
2276 dev_set_drvdata(&pdev->dev, mcasp); in davinci_mcasp_probe()
2277 pm_runtime_enable(&pdev->dev); in davinci_mcasp_probe()
2279 mcasp->dev = &pdev->dev; in davinci_mcasp_probe()
2285 pm_runtime_get_sync(mcasp->dev); in davinci_mcasp_probe()
2287 pm_runtime_put(mcasp->dev); in davinci_mcasp_probe()
2290 if (mcasp->missing_audio_param) in davinci_mcasp_probe()
2295 irq_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s_common", in davinci_mcasp_probe()
2296 dev_name(&pdev->dev)); in davinci_mcasp_probe()
2298 ret = -ENOMEM; in davinci_mcasp_probe()
2301 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, in davinci_mcasp_probe()
2306 dev_err(&pdev->dev, "common IRQ request failed\n"); in davinci_mcasp_probe()
2310 mcasp->irq_request[SNDRV_PCM_STREAM_PLAYBACK] = XUNDRN; in davinci_mcasp_probe()
2311 mcasp->irq_request[SNDRV_PCM_STREAM_CAPTURE] = ROVRN; in davinci_mcasp_probe()
2316 irq_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s_rx", in davinci_mcasp_probe()
2317 dev_name(&pdev->dev)); in davinci_mcasp_probe()
2319 ret = -ENOMEM; in davinci_mcasp_probe()
2322 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, in davinci_mcasp_probe()
2326 dev_err(&pdev->dev, "RX IRQ request failed\n"); in davinci_mcasp_probe()
2330 mcasp->irq_request[SNDRV_PCM_STREAM_CAPTURE] = ROVRN; in davinci_mcasp_probe()
2335 irq_name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%s_tx", in davinci_mcasp_probe()
2336 dev_name(&pdev->dev)); in davinci_mcasp_probe()
2338 ret = -ENOMEM; in davinci_mcasp_probe()
2341 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, in davinci_mcasp_probe()
2345 dev_err(&pdev->dev, "TX IRQ request failed\n"); in davinci_mcasp_probe()
2349 mcasp->irq_request[SNDRV_PCM_STREAM_PLAYBACK] = XUNDRN; in davinci_mcasp_probe()
2354 mcasp->dat_port = true; in davinci_mcasp_probe()
2356 dma_data = &mcasp->dma_data[SNDRV_PCM_STREAM_PLAYBACK]; in davinci_mcasp_probe()
2357 dma_data->filter_data = "tx"; in davinci_mcasp_probe()
2359 dma_data->addr = dat->start; in davinci_mcasp_probe()
2364 if (mcasp->version == MCASP_VERSION_OMAP) in davinci_mcasp_probe()
2365 dma_data->addr += davinci_mcasp_txdma_offset(mcasp->pdata); in davinci_mcasp_probe()
2367 dma_data->addr = mem->start + davinci_mcasp_txdma_offset(mcasp->pdata); in davinci_mcasp_probe()
2372 if (mcasp->op_mode != DAVINCI_MCASP_DIT_MODE) { in davinci_mcasp_probe()
2373 dma_data = &mcasp->dma_data[SNDRV_PCM_STREAM_CAPTURE]; in davinci_mcasp_probe()
2374 dma_data->filter_data = "rx"; in davinci_mcasp_probe()
2376 dma_data->addr = dat->start; in davinci_mcasp_probe()
2378 dma_data->addr = in davinci_mcasp_probe()
2379 mem->start + davinci_mcasp_rxdma_offset(mcasp->pdata); in davinci_mcasp_probe()
2382 if (mcasp->version < MCASP_VERSION_3) { in davinci_mcasp_probe()
2383 mcasp->fifo_base = DAVINCI_MCASP_V2_AFIFO_BASE; in davinci_mcasp_probe()
2384 /* dma_params->dma_addr is pointing to the data port address */ in davinci_mcasp_probe()
2385 mcasp->dat_port = true; in davinci_mcasp_probe()
2387 mcasp->fifo_base = DAVINCI_MCASP_V3_AFIFO_BASE; in davinci_mcasp_probe()
2391 * scenarios. Maximum number tdm slots is 32 and there cannot in davinci_mcasp_probe()
2397 mcasp->chconstr[SNDRV_PCM_STREAM_PLAYBACK].list = in davinci_mcasp_probe()
2398 devm_kcalloc(mcasp->dev, in davinci_mcasp_probe()
2399 32 + mcasp->num_serializer - 1, in davinci_mcasp_probe()
2403 mcasp->chconstr[SNDRV_PCM_STREAM_CAPTURE].list = in davinci_mcasp_probe()
2404 devm_kcalloc(mcasp->dev, in davinci_mcasp_probe()
2405 32 + mcasp->num_serializer - 1, in davinci_mcasp_probe()
2409 if (!mcasp->chconstr[SNDRV_PCM_STREAM_PLAYBACK].list || in davinci_mcasp_probe()
2410 !mcasp->chconstr[SNDRV_PCM_STREAM_CAPTURE].list) { in davinci_mcasp_probe()
2411 ret = -ENOMEM; in davinci_mcasp_probe()
2421 ret = devm_snd_soc_register_component(&pdev->dev, &davinci_mcasp_component, in davinci_mcasp_probe()
2422 &davinci_mcasp_dai[mcasp->op_mode], 1); in davinci_mcasp_probe()
2430 ret = edma_pcm_platform_register(&pdev->dev); in davinci_mcasp_probe()
2433 if (mcasp->op_mode == DAVINCI_MCASP_IIS_MODE) in davinci_mcasp_probe()
2434 ret = sdma_pcm_platform_register(&pdev->dev, "tx", "rx"); in davinci_mcasp_probe()
2436 ret = sdma_pcm_platform_register(&pdev->dev, "tx", NULL); in davinci_mcasp_probe()
2439 ret = udma_pcm_platform_register(&pdev->dev); in davinci_mcasp_probe()
2442 dev_err(&pdev->dev, "No DMA controller found (%d)\n", ret); in davinci_mcasp_probe()
2444 case -EPROBE_DEFER: in davinci_mcasp_probe()
2449 dev_err(&pdev->dev, "register PCM failed: %d\n", ret); in davinci_mcasp_probe()
2456 dev_err(&pdev->dev, "gpiochip registration failed: %d\n", ret); in davinci_mcasp_probe()
2462 pm_runtime_disable(&pdev->dev); in davinci_mcasp_probe()
2468 pm_runtime_disable(&pdev->dev); in davinci_mcasp_remove()
2475 struct davinci_mcasp_context *context = &mcasp->context; in davinci_mcasp_runtime_suspend()
2480 context->config_regs[i] = mcasp_get_reg(mcasp, context_regs[i]); in davinci_mcasp_runtime_suspend()
2482 if (mcasp->txnumevt) { in davinci_mcasp_runtime_suspend()
2483 reg = mcasp->fifo_base + MCASP_WFIFOCTL_OFFSET; in davinci_mcasp_runtime_suspend()
2484 context->afifo_regs[0] = mcasp_get_reg(mcasp, reg); in davinci_mcasp_runtime_suspend()
2486 if (mcasp->rxnumevt) { in davinci_mcasp_runtime_suspend()
2487 reg = mcasp->fifo_base + MCASP_RFIFOCTL_OFFSET; in davinci_mcasp_runtime_suspend()
2488 context->afifo_regs[1] = mcasp_get_reg(mcasp, reg); in davinci_mcasp_runtime_suspend()
2491 for (i = 0; i < mcasp->num_serializer; i++) in davinci_mcasp_runtime_suspend()
2492 context->xrsr_regs[i] = mcasp_get_reg(mcasp, in davinci_mcasp_runtime_suspend()
2501 struct davinci_mcasp_context *context = &mcasp->context; in davinci_mcasp_runtime_resume()
2506 mcasp_set_reg(mcasp, context_regs[i], context->config_regs[i]); in davinci_mcasp_runtime_resume()
2508 if (mcasp->txnumevt) { in davinci_mcasp_runtime_resume()
2509 reg = mcasp->fifo_base + MCASP_WFIFOCTL_OFFSET; in davinci_mcasp_runtime_resume()
2510 mcasp_set_reg(mcasp, reg, context->afifo_regs[0]); in davinci_mcasp_runtime_resume()
2512 if (mcasp->rxnumevt) { in davinci_mcasp_runtime_resume()
2513 reg = mcasp->fifo_base + MCASP_RFIFOCTL_OFFSET; in davinci_mcasp_runtime_resume()
2514 mcasp_set_reg(mcasp, reg, context->afifo_regs[1]); in davinci_mcasp_runtime_resume()
2517 for (i = 0; i < mcasp->num_serializer; i++) in davinci_mcasp_runtime_resume()
2519 context->xrsr_regs[i]); in davinci_mcasp_runtime_resume()
2536 .name = "davinci-mcasp",