28 static void mtl_ipc_host_done(struct snd_sof_dev *sdev)  in mtl_ipc_host_done()  argument
34 	snd_sof_dsp_update_bits_forced(sdev, HDA_DSP_BAR, MTL_DSP_REG_HFIPCXTDR,  in mtl_ipc_host_done()
39 	snd_sof_dsp_update_bits_forced(sdev, HDA_DSP_BAR, MTL_DSP_REG_HFIPCXTDA,  in mtl_ipc_host_done()
43 static void mtl_ipc_dsp_done(struct snd_sof_dev *sdev)  in mtl_ipc_dsp_done()  argument
49 	snd_sof_dsp_update_bits_forced(sdev, HDA_DSP_BAR, MTL_DSP_REG_HFIPCXIDA,  in mtl_ipc_dsp_done()
53 	snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, MTL_DSP_REG_HFIPCXCTL,  in mtl_ipc_dsp_done()
58 bool mtl_dsp_check_ipc_irq(struct snd_sof_dev *sdev)  in mtl_dsp_check_ipc_irq()  argument
63 	if (sdev->dspless_mode_selected)  in mtl_dsp_check_ipc_irq()
67 	hfintipptr = snd_sof_dsp_read(sdev, HDA_DSP_BAR, MTL_HFINTIPPTR) & MTL_HFINTIPPTR_PTR_MASK;  in mtl_dsp_check_ipc_irq()
68 	irq_status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, hfintipptr + MTL_DSP_IRQSTS);  in mtl_dsp_check_ipc_irq()
70 	trace_sof_intel_hda_irq_ipc_check(sdev, irq_status);  in mtl_dsp_check_ipc_irq()
79 static bool mtl_dsp_check_sdw_irq(struct snd_sof_dev *sdev)  in mtl_dsp_check_sdw_irq()  argument
85 	hfintipptr = snd_sof_dsp_read(sdev, HDA_DSP_BAR, MTL_HFINTIPPTR) & MTL_HFINTIPPTR_PTR_MASK;  in mtl_dsp_check_sdw_irq()
86 	irq_status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, hfintipptr + MTL_DSP_IRQSTS);  in mtl_dsp_check_sdw_irq()
94 int mtl_ipc_send_msg(struct snd_sof_dev *sdev, struct snd_sof_ipc_msg *msg)  in mtl_ipc_send_msg()  argument
96 	struct sof_intel_hda_dev *hdev = sdev->pdata->hw_pdata;  in mtl_ipc_send_msg()
99 	if (hda_ipc4_tx_is_busy(sdev)) {  in mtl_ipc_send_msg()
108 		sof_mailbox_write(sdev, sdev->host_box.offset, msg_data->data_ptr,  in mtl_ipc_send_msg()
111 	snd_sof_dsp_write(sdev, HDA_DSP_BAR, MTL_DSP_REG_HFIPCXIDDY,  in mtl_ipc_send_msg()
113 	snd_sof_dsp_write(sdev, HDA_DSP_BAR, MTL_DSP_REG_HFIPCXIDR,  in mtl_ipc_send_msg()
121 void mtl_enable_ipc_interrupts(struct snd_sof_dev *sdev)  in mtl_enable_ipc_interrupts()  argument
123 	struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;  in mtl_enable_ipc_interrupts()
126 	if (sdev->dspless_mode_selected)  in mtl_enable_ipc_interrupts()
130 	snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, chip->ipc_ctl,  in mtl_enable_ipc_interrupts()
135 void mtl_disable_ipc_interrupts(struct snd_sof_dev *sdev)  in mtl_disable_ipc_interrupts()  argument
137 	struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;  in mtl_disable_ipc_interrupts()
140 	if (sdev->dspless_mode_selected)  in mtl_disable_ipc_interrupts()
144 	snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, chip->ipc_ctl,  in mtl_disable_ipc_interrupts()
148 static void mtl_enable_sdw_irq(struct snd_sof_dev *sdev, bool enable)  in mtl_enable_sdw_irq()  argument
155 	if (sdev->dspless_mode_selected)  in mtl_enable_sdw_irq()
165 	snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, MTL_DSP_REG_HfSNDWIE, mask, val);  in mtl_enable_sdw_irq()
168 	ret = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_BAR, MTL_DSP_REG_HfSNDWIE, hipcie,  in mtl_enable_sdw_irq()
172 		dev_err(sdev->dev, "failed to set SoundWire IPC interrupt %s\n",  in mtl_enable_sdw_irq()
176 int mtl_enable_interrupts(struct snd_sof_dev *sdev, bool enable)  in mtl_enable_interrupts()  argument
185 	if (sdev->dspless_mode_selected)  in mtl_enable_interrupts()
189 	hfintipptr = snd_sof_dsp_read(sdev, HDA_DSP_BAR, MTL_HFINTIPPTR) & MTL_HFINTIPPTR_PTR_MASK;  in mtl_enable_interrupts()
198 	snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, hfintipptr, mask, val);  in mtl_enable_interrupts()
201 	ret = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_BAR, hfintipptr, irqinten,  in mtl_enable_interrupts()
205 		dev_err(sdev->dev, "failed to %s Host IPC and/or SOUNDWIRE\n",  in mtl_enable_interrupts()
217 	snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, MTL_DSP_REG_HfHIPCIE, mask, val);  in mtl_enable_interrupts()
220 	ret = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_BAR, MTL_DSP_REG_HfHIPCIE, hipcie,  in mtl_enable_interrupts()
224 		dev_err(sdev->dev, "failed to set Host IPC interrupt %s\n",  in mtl_enable_interrupts()
233 int mtl_dsp_pre_fw_run(struct snd_sof_dev *sdev)  in mtl_dsp_pre_fw_run()  argument
235 	struct sof_intel_hda_dev *hdev = sdev->pdata->hw_pdata;  in mtl_dsp_pre_fw_run()
243 	snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, MTL_HFDSSCS,  in mtl_dsp_pre_fw_run()
251 	ret = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_BAR, MTL_HFDSSCS, dsphfdsscs,  in mtl_dsp_pre_fw_run()
255 		dev_err(sdev->dev, "failed to enable DSP subsystem\n");  in mtl_dsp_pre_fw_run()
260 	snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, MTL_HFPWRCTL,  in mtl_dsp_pre_fw_run()
267 	ret = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_BAR, MTL_HFPWRSTS, dsphfpwrsts,  in mtl_dsp_pre_fw_run()
272 		dev_err(sdev->dev, "failed to power up gated DSP domain\n");  in mtl_dsp_pre_fw_run()
276 		snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, MTL_HFPWRCTL,  in mtl_dsp_pre_fw_run()
282 int mtl_dsp_post_fw_run(struct snd_sof_dev *sdev)  in mtl_dsp_post_fw_run()  argument
286 	if (sdev->first_boot) {  in mtl_dsp_post_fw_run()
287 		struct sof_intel_hda_dev *hdev = sdev->pdata->hw_pdata;  in mtl_dsp_post_fw_run()
289 		ret = hda_sdw_startup(sdev);  in mtl_dsp_post_fw_run()
291 			dev_err(sdev->dev, "could not startup SoundWire links\n");  in mtl_dsp_post_fw_run()
300 	hda_sdw_int_enable(sdev, true);  in mtl_dsp_post_fw_run()
304 void mtl_dsp_dump(struct snd_sof_dev *sdev, u32 flags)  in mtl_dsp_dump()  argument
312 	fwsts = snd_sof_dsp_read(sdev, HDA_DSP_BAR, MTL_DSP_ROM_STS);  in mtl_dsp_dump()
313 	fwlec = snd_sof_dsp_read(sdev, HDA_DSP_BAR, MTL_DSP_ROM_ERROR);  in mtl_dsp_dump()
314 	romdbgsts = snd_sof_dsp_read(sdev, HDA_DSP_BAR, MTL_DSP_REG_HFFLGPXQWY);  in mtl_dsp_dump()
315 	romdbgerr = snd_sof_dsp_read(sdev, HDA_DSP_BAR, MTL_DSP_REG_HFFLGPXQWY_ERROR);  in mtl_dsp_dump()
317 	dev_err(sdev->dev, "ROM status: %#x, ROM error: %#x\n", fwsts, fwlec);  in mtl_dsp_dump()
318 	dev_err(sdev->dev, "ROM debug status: %#x, ROM debug error: %#x\n", romdbgsts,  in mtl_dsp_dump()
320 	romdbgsts = snd_sof_dsp_read(sdev, HDA_DSP_BAR, MTL_DSP_REG_HFFLGPXQWY + 0x8 * 3);  in mtl_dsp_dump()
321 	dev_printk(level, sdev->dev, "ROM feature bit%s enabled\n",  in mtl_dsp_dump()
325 static bool mtl_dsp_primary_core_is_enabled(struct snd_sof_dev *sdev)  in mtl_dsp_primary_core_is_enabled()  argument
329 	val = snd_sof_dsp_read(sdev, HDA_DSP_BAR, MTL_DSP2CXCTL_PRIMARY_CORE);  in mtl_dsp_primary_core_is_enabled()
336 static int mtl_dsp_core_power_up(struct snd_sof_dev *sdev, int core)  in mtl_dsp_core_power_up()  argument
343 	if (core != SOF_DSP_PRIMARY_CORE || mtl_dsp_primary_core_is_enabled(sdev))  in mtl_dsp_core_power_up()
347 	snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, MTL_DSP2CXCTL_PRIMARY_CORE,  in mtl_dsp_core_power_up()
352 	snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, MTL_DSP2CXCTL_PRIMARY_CORE,  in mtl_dsp_core_power_up()
361 	ret = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_BAR, MTL_DSP2CXCTL_PRIMARY_CORE, dspcxctl,  in mtl_dsp_core_power_up()
365 		dev_err(sdev->dev, "%s: timeout on MTL_DSP2CXCTL_PRIMARY_CORE read\n",  in mtl_dsp_core_power_up()
371 	sdev->enabled_cores_mask = BIT(SOF_DSP_PRIMARY_CORE);  in mtl_dsp_core_power_up()
372 	sdev->dsp_core_ref_count[SOF_DSP_PRIMARY_CORE] = 1;  in mtl_dsp_core_power_up()
377 static int mtl_dsp_core_power_down(struct snd_sof_dev *sdev, int core)  in mtl_dsp_core_power_down()  argument
383 	if (core != SOF_DSP_PRIMARY_CORE || !mtl_dsp_primary_core_is_enabled(sdev))  in mtl_dsp_core_power_down()
387 	snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, MTL_DSP2CXCTL_PRIMARY_CORE,  in mtl_dsp_core_power_down()
393 	ret = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_BAR, MTL_DSP2CXCTL_PRIMARY_CORE, dspcxctl,  in mtl_dsp_core_power_down()
398 		dev_err(sdev->dev, "failed to power down primary core\n");  in mtl_dsp_core_power_down()
402 	sdev->enabled_cores_mask = 0;  in mtl_dsp_core_power_down()
403 	sdev->dsp_core_ref_count[SOF_DSP_PRIMARY_CORE] = 0;  in mtl_dsp_core_power_down()
408 int mtl_power_down_dsp(struct snd_sof_dev *sdev)  in mtl_power_down_dsp()  argument
414 	ret = mtl_dsp_core_power_down(sdev, SOF_DSP_PRIMARY_CORE);  in mtl_power_down_dsp()
416 		dev_err(sdev->dev, "mtl dsp power down error, %d\n", ret);  in mtl_power_down_dsp()
421 	snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, MTL_HFDSSCS,  in mtl_power_down_dsp()
429 	dsphfdsscs = snd_sof_dsp_read(sdev, HDA_DSP_BAR, MTL_HFDSSCS);  in mtl_power_down_dsp()
430 	return snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_BAR, MTL_HFDSSCS, dsphfdsscs,  in mtl_power_down_dsp()
435 int mtl_dsp_cl_init(struct snd_sof_dev *sdev, int stream_tag, bool imr_boot)  in mtl_dsp_cl_init()  argument
437 	struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;  in mtl_dsp_cl_init()
448 	snd_sof_dsp_write(sdev, HDA_DSP_BAR, chip->ipc_req, ipc_hdr);  in mtl_dsp_cl_init()
451 	ret = mtl_dsp_core_power_up(sdev, SOF_DSP_PRIMARY_CORE);  in mtl_dsp_cl_init()
454 			dev_err(sdev->dev, "dsp core 0/1 power up failed\n");  in mtl_dsp_cl_init()
458 	dev_dbg(sdev->dev, "Primary core power up successful\n");  in mtl_dsp_cl_init()
461 	ret = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_BAR, chip->ipc_ack, status,  in mtl_dsp_cl_init()
466 			dev_err(sdev->dev, "timeout waiting for purge IPC done\n");  in mtl_dsp_cl_init()
471 	snd_sof_dsp_update_bits_forced(sdev, HDA_DSP_BAR, chip->ipc_ack, chip->ipc_ack_mask,  in mtl_dsp_cl_init()
475 	ret = mtl_enable_interrupts(sdev, true);  in mtl_dsp_cl_init()
478 			dev_err(sdev->dev, "%s: failed to enable interrupts\n", __func__);  in mtl_dsp_cl_init()
482 	mtl_enable_ipc_interrupts(sdev);  in mtl_dsp_cl_init()
493 	snd_sof_dsp_dbg_dump(sdev, "MTL DSP init fail", 0);  in mtl_dsp_cl_init()
494 	mtl_dsp_core_power_down(sdev, SOF_DSP_PRIMARY_CORE);  in mtl_dsp_cl_init()
501 	struct snd_sof_dev *sdev = context;  in mtl_ipc_irq_thread()  local
507 	hipcida = snd_sof_dsp_read(sdev, HDA_DSP_BAR, MTL_DSP_REG_HFIPCXIDA);  in mtl_ipc_irq_thread()
508 	hipctdr = snd_sof_dsp_read(sdev, HDA_DSP_BAR, MTL_DSP_REG_HFIPCXTDR);  in mtl_ipc_irq_thread()
513 		snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, MTL_DSP_REG_HFIPCXCTL,  in mtl_ipc_irq_thread()
516 		mtl_ipc_dsp_done(sdev);  in mtl_ipc_irq_thread()
524 		u32 extension = snd_sof_dsp_read(sdev, HDA_DSP_BAR, MTL_DSP_REG_HFIPCXTDDY);  in mtl_ipc_irq_thread()
533 			if (likely(sdev->fw_state == SOF_FW_BOOT_COMPLETE)) {  in mtl_ipc_irq_thread()
534 				struct sof_ipc4_msg *data = sdev->ipc->msg.reply_data;  in mtl_ipc_irq_thread()
539 				spin_lock_irq(&sdev->ipc_lock);  in mtl_ipc_irq_thread()
541 				snd_sof_ipc_get_reply(sdev);  in mtl_ipc_irq_thread()
542 				mtl_ipc_host_done(sdev);  in mtl_ipc_irq_thread()
543 				snd_sof_ipc_reply(sdev, data->primary);  in mtl_ipc_irq_thread()
545 				spin_unlock_irq(&sdev->ipc_lock);  in mtl_ipc_irq_thread()
547 				dev_dbg_ratelimited(sdev->dev,  in mtl_ipc_irq_thread()
556 			sdev->ipc->msg.rx_data = &notification_data;  in mtl_ipc_irq_thread()
557 			snd_sof_ipc_msgs_rx(sdev);  in mtl_ipc_irq_thread()
558 			sdev->ipc->msg.rx_data = NULL;  in mtl_ipc_irq_thread()
560 			mtl_ipc_host_done(sdev);  in mtl_ipc_irq_thread()
568 		dev_dbg_ratelimited(sdev->dev, "nothing to do in IPC IRQ thread\n");  in mtl_ipc_irq_thread()
572 		struct sof_intel_hda_dev *hdev = sdev->pdata->hw_pdata;  in mtl_ipc_irq_thread()
575 			mtl_ipc_send_msg(sdev, hdev->delayed_ipc_tx_msg);  in mtl_ipc_irq_thread()
581 int mtl_dsp_ipc_get_mailbox_offset(struct snd_sof_dev *sdev)  in mtl_dsp_ipc_get_mailbox_offset()  argument
586 int mtl_dsp_ipc_get_window_offset(struct snd_sof_dev *sdev, u32 id)  in mtl_dsp_ipc_get_window_offset()  argument
591 void mtl_ipc_dump(struct snd_sof_dev *sdev)  in mtl_ipc_dump()  argument
595 	hipcidr = snd_sof_dsp_read(sdev, HDA_DSP_BAR, MTL_DSP_REG_HFIPCXIDR);  in mtl_ipc_dump()
596 	hipcidd = snd_sof_dsp_read(sdev, HDA_DSP_BAR, MTL_DSP_REG_HFIPCXIDDY);  in mtl_ipc_dump()
597 	hipcida = snd_sof_dsp_read(sdev, HDA_DSP_BAR, MTL_DSP_REG_HFIPCXIDA);  in mtl_ipc_dump()
598 	hipctdr = snd_sof_dsp_read(sdev, HDA_DSP_BAR, MTL_DSP_REG_HFIPCXTDR);  in mtl_ipc_dump()
599 	hipctdd = snd_sof_dsp_read(sdev, HDA_DSP_BAR, MTL_DSP_REG_HFIPCXTDDY);  in mtl_ipc_dump()
600 	hipctda = snd_sof_dsp_read(sdev, HDA_DSP_BAR, MTL_DSP_REG_HFIPCXTDA);  in mtl_ipc_dump()
601 	hipcctl = snd_sof_dsp_read(sdev, HDA_DSP_BAR, MTL_DSP_REG_HFIPCXCTL);  in mtl_ipc_dump()
603 	dev_err(sdev->dev,  in mtl_ipc_dump()
608 static int mtl_dsp_disable_interrupts(struct snd_sof_dev *sdev)  in mtl_dsp_disable_interrupts()  argument
610 	mtl_enable_sdw_irq(sdev, false);  in mtl_dsp_disable_interrupts()
611 	mtl_disable_ipc_interrupts(sdev);  in mtl_dsp_disable_interrupts()
612 	return mtl_enable_interrupts(sdev, false);  in mtl_dsp_disable_interrupts()
615 u64 mtl_dsp_get_stream_hda_link_position(struct snd_sof_dev *sdev,  in mtl_dsp_get_stream_hda_link_position()  argument
622 	llp_l = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, MTL_PPLCLLPL(hstream->index));  in mtl_dsp_get_stream_hda_link_position()
623 	llp_u = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, MTL_PPLCLLPU(hstream->index));  in mtl_dsp_get_stream_hda_link_position()
627 static int mtl_dsp_core_get(struct snd_sof_dev *sdev, int core)  in mtl_dsp_core_get()  argument
629 	const struct sof_ipc_pm_ops *pm_ops = sdev->ipc->ops->pm;  in mtl_dsp_core_get()
632 		return mtl_dsp_core_power_up(sdev, SOF_DSP_PRIMARY_CORE);  in mtl_dsp_core_get()
635 		return pm_ops->set_core_state(sdev, core, true);  in mtl_dsp_core_get()
640 static int mtl_dsp_core_put(struct snd_sof_dev *sdev, int core)  in mtl_dsp_core_put()  argument
642 	const struct sof_ipc_pm_ops *pm_ops = sdev->ipc->ops->pm;  in mtl_dsp_core_put()
646 		ret = pm_ops->set_core_state(sdev, core, false);  in mtl_dsp_core_put()
652 		return mtl_dsp_core_power_down(sdev, SOF_DSP_PRIMARY_CORE);  in mtl_dsp_core_put()
661 int sof_mtl_ops_init(struct snd_sof_dev *sdev)  in sof_mtl_ops_init()  argument
698 	sdev->private = devm_kzalloc(sdev->dev, sizeof(struct sof_ipc4_fw_data), GFP_KERNEL);  in sof_mtl_ops_init()
699 	if (!sdev->private)  in sof_mtl_ops_init()
702 	ipc4_data = sdev->private;  in sof_mtl_ops_init()
711 	hda_set_dai_drv_ops(sdev, &sof_mtl_ops);  in sof_mtl_ops_init()