Lines Matching refs:sdev

76 static void bdw_host_done(struct snd_sof_dev *sdev);
77 static void bdw_dsp_done(struct snd_sof_dev *sdev);
83 static int bdw_run(struct snd_sof_dev *sdev) in bdw_run() argument
86 snd_sof_dsp_update_bits(sdev, BDW_DSP_BAR, SHIM_HMDC, in bdw_run()
91 snd_sof_dsp_update_bits_unlocked(sdev, BDW_DSP_BAR, SHIM_CSR, in bdw_run()
98 static int bdw_reset(struct snd_sof_dev *sdev) in bdw_reset() argument
101 snd_sof_dsp_update_bits_unlocked(sdev, BDW_DSP_BAR, SHIM_CSR, in bdw_reset()
109 snd_sof_dsp_update_bits_unlocked(sdev, BDW_DSP_BAR, SHIM_CSR, in bdw_reset()
116 static int bdw_set_dsp_D0(struct snd_sof_dev *sdev) in bdw_set_dsp_D0() argument
122 snd_sof_dsp_update_bits_unlocked(sdev, BDW_PCI_BAR, PCI_VDRTCTL2, in bdw_set_dsp_D0()
127 snd_sof_dsp_update_bits_unlocked(sdev, BDW_PCI_BAR, PCI_VDRTCTL0, in bdw_set_dsp_D0()
131 snd_sof_dsp_update_bits_unlocked(sdev, BDW_PCI_BAR, PCI_PMCS, in bdw_set_dsp_D0()
136 reg = readl(sdev->bar[BDW_PCI_BAR] + PCI_PMCS) in bdw_set_dsp_D0()
151 snd_sof_dsp_update_bits_unlocked(sdev, BDW_DSP_BAR, SHIM_CSR, in bdw_set_dsp_D0()
156 snd_sof_dsp_update_bits_unlocked(sdev, BDW_DSP_BAR, in bdw_set_dsp_D0()
163 snd_sof_dsp_update_bits_unlocked(sdev, BDW_DSP_BAR, SHIM_CLKCTL, in bdw_set_dsp_D0()
172 bdw_reset(sdev); in bdw_set_dsp_D0()
175 snd_sof_dsp_update_bits_unlocked(sdev, BDW_PCI_BAR, PCI_VDRTCTL2, in bdw_set_dsp_D0()
184 snd_sof_dsp_update_bits_unlocked(sdev, BDW_PCI_BAR, PCI_VDRTCTL2, in bdw_set_dsp_D0()
192 snd_sof_dsp_update_bits_unlocked(sdev, BDW_PCI_BAR, PCI_VDRTCTL0, in bdw_set_dsp_D0()
196 snd_sof_dsp_update_bits_unlocked(sdev, BDW_DSP_BAR, SHIM_CSR2, in bdw_set_dsp_D0()
201 snd_sof_dsp_update_bits(sdev, BDW_DSP_BAR, SHIM_HMDC, in bdw_set_dsp_D0()
208 snd_sof_dsp_update_bits(sdev, BDW_DSP_BAR, SHIM_IMRX, in bdw_set_dsp_D0()
210 snd_sof_dsp_update_bits(sdev, BDW_DSP_BAR, SHIM_IMRD, in bdw_set_dsp_D0()
215 snd_sof_dsp_write(sdev, BDW_DSP_BAR, SHIM_IPCX, 0x0); in bdw_set_dsp_D0()
216 snd_sof_dsp_write(sdev, BDW_DSP_BAR, SHIM_IPCD, 0x0); in bdw_set_dsp_D0()
217 snd_sof_dsp_write(sdev, BDW_DSP_BAR, 0x80, 0x6); in bdw_set_dsp_D0()
218 snd_sof_dsp_write(sdev, BDW_DSP_BAR, 0xe0, 0x300a); in bdw_set_dsp_D0()
223 static void bdw_get_registers(struct snd_sof_dev *sdev, in bdw_get_registers() argument
228 u32 offset = sdev->dsp_oops_offset; in bdw_get_registers()
231 sof_mailbox_read(sdev, offset, xoops, sizeof(*xoops)); in bdw_get_registers()
237 dev_err(sdev->dev, "invalid header size 0x%x. FW oops is bogus\n", in bdw_get_registers()
242 sof_mailbox_read(sdev, offset, panic_info, sizeof(*panic_info)); in bdw_get_registers()
246 sof_mailbox_read(sdev, offset, stack, stack_words * sizeof(u32)); in bdw_get_registers()
249 static void bdw_dump(struct snd_sof_dev *sdev, u32 flags) in bdw_dump() argument
257 status = snd_sof_dsp_read(sdev, BDW_DSP_BAR, SHIM_IPCD); in bdw_dump()
258 panic = snd_sof_dsp_read(sdev, BDW_DSP_BAR, SHIM_IPCX); in bdw_dump()
259 bdw_get_registers(sdev, &xoops, &panic_info, stack, in bdw_dump()
261 sof_print_oops_and_stack(sdev, KERN_ERR, status, panic, &xoops, in bdw_dump()
265 imrx = snd_sof_dsp_read(sdev, BDW_DSP_BAR, SHIM_IMRX); in bdw_dump()
266 imrd = snd_sof_dsp_read(sdev, BDW_DSP_BAR, SHIM_IMRD); in bdw_dump()
267 dev_err(sdev->dev, in bdw_dump()
271 dev_err(sdev->dev, in bdw_dump()
275 dev_err(sdev->dev, in bdw_dump()
279 dev_err(sdev->dev, in bdw_dump()
291 struct snd_sof_dev *sdev = context; in bdw_irq_handler() local
296 isr = snd_sof_dsp_read(sdev, BDW_DSP_BAR, SHIM_ISRX); in bdw_irq_handler()
305 struct snd_sof_dev *sdev = context; in bdw_irq_thread() local
308 imrx = snd_sof_dsp_read64(sdev, BDW_DSP_BAR, SHIM_IMRX); in bdw_irq_thread()
309 ipcx = snd_sof_dsp_read(sdev, BDW_DSP_BAR, SHIM_IPCX); in bdw_irq_thread()
315 snd_sof_dsp_update_bits_unlocked(sdev, BDW_DSP_BAR, in bdw_irq_thread()
319 spin_lock_irq(&sdev->ipc_lock); in bdw_irq_thread()
328 snd_sof_ipc_process_reply(sdev, ipcx); in bdw_irq_thread()
330 bdw_dsp_done(sdev); in bdw_irq_thread()
332 spin_unlock_irq(&sdev->ipc_lock); in bdw_irq_thread()
335 ipcd = snd_sof_dsp_read(sdev, BDW_DSP_BAR, SHIM_IPCD); in bdw_irq_thread()
341 snd_sof_dsp_update_bits_unlocked(sdev, BDW_DSP_BAR, in bdw_irq_thread()
347 snd_sof_dsp_panic(sdev, BDW_PANIC_OFFSET(ipcx) + MBOX_OFFSET, in bdw_irq_thread()
350 snd_sof_ipc_msgs_rx(sdev); in bdw_irq_thread()
353 bdw_host_done(sdev); in bdw_irq_thread()
363 static int bdw_send_msg(struct snd_sof_dev *sdev, struct snd_sof_ipc_msg *msg) in bdw_send_msg() argument
366 sof_mailbox_write(sdev, sdev->host_box.offset, msg->msg_data, in bdw_send_msg()
368 snd_sof_dsp_write(sdev, BDW_DSP_BAR, SHIM_IPCX, SHIM_IPCX_BUSY); in bdw_send_msg()
373 static int bdw_get_mailbox_offset(struct snd_sof_dev *sdev) in bdw_get_mailbox_offset() argument
378 static int bdw_get_window_offset(struct snd_sof_dev *sdev, u32 id) in bdw_get_window_offset() argument
383 static void bdw_host_done(struct snd_sof_dev *sdev) in bdw_host_done() argument
386 snd_sof_dsp_update_bits_unlocked(sdev, BDW_DSP_BAR, SHIM_IPCD, in bdw_host_done()
391 snd_sof_dsp_update_bits_unlocked(sdev, BDW_DSP_BAR, SHIM_IMRX, in bdw_host_done()
395 static void bdw_dsp_done(struct snd_sof_dev *sdev) in bdw_dsp_done() argument
398 snd_sof_dsp_update_bits_unlocked(sdev, BDW_DSP_BAR, SHIM_IPCX, in bdw_dsp_done()
402 snd_sof_dsp_update_bits_unlocked(sdev, BDW_DSP_BAR, SHIM_IMRX, in bdw_dsp_done()
409 static int bdw_probe(struct snd_sof_dev *sdev) in bdw_probe() argument
411 struct snd_sof_pdata *pdata = sdev->pdata; in bdw_probe()
414 container_of(sdev->dev, struct platform_device, dev); in bdw_probe()
420 chip = get_chip_info(sdev->pdata); in bdw_probe()
422 dev_err(sdev->dev, "error: no such device supported\n"); in bdw_probe()
426 sdev->num_cores = chip->cores_num; in bdw_probe()
435 dev_err(sdev->dev, "error: failed to get LPE base at idx %d\n", in bdw_probe()
440 dev_dbg(sdev->dev, "LPE PHY base at 0x%x size 0x%x", base, size); in bdw_probe()
441 sdev->bar[BDW_DSP_BAR] = devm_ioremap(sdev->dev, base, size); in bdw_probe()
442 if (!sdev->bar[BDW_DSP_BAR]) { in bdw_probe()
443 dev_err(sdev->dev, in bdw_probe()
448 dev_dbg(sdev->dev, "LPE VADDR %p\n", sdev->bar[BDW_DSP_BAR]); in bdw_probe()
451 sdev->mmio_bar = BDW_DSP_BAR; in bdw_probe()
452 sdev->mailbox_bar = BDW_DSP_BAR; in bdw_probe()
453 sdev->dsp_oops_offset = MBOX_OFFSET; in bdw_probe()
462 dev_err(sdev->dev, "error: failed to get PCI base at idx %d\n", in bdw_probe()
467 dev_dbg(sdev->dev, "PCI base at 0x%x size 0x%x", base, size); in bdw_probe()
468 sdev->bar[BDW_PCI_BAR] = devm_ioremap(sdev->dev, base, size); in bdw_probe()
469 if (!sdev->bar[BDW_PCI_BAR]) { in bdw_probe()
470 dev_err(sdev->dev, in bdw_probe()
475 dev_dbg(sdev->dev, "PCI VADDR %p\n", sdev->bar[BDW_PCI_BAR]); in bdw_probe()
478 sdev->ipc_irq = platform_get_irq(pdev, desc->irqindex_host_ipc); in bdw_probe()
479 if (sdev->ipc_irq < 0) in bdw_probe()
480 return sdev->ipc_irq; in bdw_probe()
482 dev_dbg(sdev->dev, "using IRQ %d\n", sdev->ipc_irq); in bdw_probe()
483 ret = devm_request_threaded_irq(sdev->dev, sdev->ipc_irq, in bdw_probe()
485 IRQF_SHARED, "AudioDSP", sdev); in bdw_probe()
487 dev_err(sdev->dev, "error: failed to register IRQ %d\n", in bdw_probe()
488 sdev->ipc_irq); in bdw_probe()
493 ret = bdw_set_dsp_D0(sdev); in bdw_probe()
495 dev_err(sdev->dev, "error: failed to set DSP D0\n"); in bdw_probe()
500 ret = dma_coerce_mask_and_coherent(sdev->dev, DMA_BIT_MASK(31)); in bdw_probe()
502 dev_err(sdev->dev, "error: failed to set DMA mask %d\n", ret); in bdw_probe()
507 sdev->dsp_box.offset = MBOX_OFFSET; in bdw_probe()
512 static struct snd_soc_acpi_mach *bdw_machine_select(struct snd_sof_dev *sdev) in bdw_machine_select() argument
514 struct snd_sof_pdata *sof_pdata = sdev->pdata; in bdw_machine_select()
520 dev_warn(sdev->dev, "warning: No matching ASoC machine driver found\n"); in bdw_machine_select()
531 struct snd_sof_dev *sdev) in bdw_set_mach_params() argument
533 struct snd_sof_pdata *pdata = sdev->pdata; in bdw_set_mach_params()
538 mach_params->platform = dev_name(sdev->dev); in bdw_set_mach_params()