Lines Matching refs:ADG_HZ_441
28 #define ADG_HZ_441 0 macro
134 adg->brg_rate[ADG_HZ_441], /* 0011: BRGA */ in __rsnd_adg_get_timesel_ratio()
326 if (rate == adg->brg_rate[ADG_HZ_441]) in rsnd_adg_clk_query()
365 adg->brg_rate[ADG_HZ_441]); in rsnd_adg_ssi_clk_try_start()
528 req_Hz[ADG_HZ_441] = 0; in rsnd_adg_get_clkout()
531 req_Hz[ADG_HZ_441] = req_rate[i]; in rsnd_adg_get_clkout()
577 rate = (clk_get_rate(clk) / req_Hz[ADG_HZ_441]) * req_Hz[ADG_HZ_441]; in rsnd_adg_get_clkout()
578 if (!adg->brg_rate[ADG_HZ_441] && req_Hz[ADG_HZ_441] && (0 == rate % 44100)) { in rsnd_adg_get_clkout()
579 div = rate / req_Hz[ADG_HZ_441]; in rsnd_adg_get_clkout()
583 adg->brg_rate[ADG_HZ_441] = rate / div; in rsnd_adg_get_clkout()
585 if (req_Hz[ADG_HZ_441]) in rsnd_adg_get_clkout()
613 !(adg->brg_rate[ADG_HZ_441] && req_Hz[ADG_HZ_441])) in rsnd_adg_get_clkout()
709 dbg_msg(dev, m, "BRGA (for 44100 base) = %d\n", adg->brg_rate[ADG_HZ_441]); in rsnd_adg_clk_dbg_info()