Lines Matching defs:v
11 #define LPAIF_I2SCTL_REG_ADDR(v, addr, port) \ argument
14 #define LPAIF_I2SCTL_REG(v, port) LPAIF_I2SCTL_REG_ADDR(v, 0x0, (port)) argument
68 #define LPAIF_IRQ_REG_ADDR(v, addr, port) \ argument
73 #define LPAIF_IRQEN_REG(v, port) LPAIF_IRQ_REG_ADDR(v, 0x0, (port)) argument
74 #define LPAIF_IRQSTAT_REG(v, port) LPAIF_IRQ_REG_ADDR(v, 0x4, (port)) argument
75 #define LPAIF_IRQCLEAR_REG(v, port) LPAIF_IRQ_REG_ADDR(v, 0xC, (port)) argument
78 #define LPAIF_RXTX_IRQ_REG_ADDR(v, addr, port) \ argument
81 #define LPAIF_RXTX_IRQEN_REG(v, port) LPAIF_RXTX_IRQ_REG_ADDR(v, 0x0, port) argument
82 #define LPAIF_RXTX_IRQSTAT_REG(v, port) LPAIF_RXTX_IRQ_REG_ADDR(v, 0x4, port) argument
83 #define LPAIF_RXTX_IRQCLEAR_REG(v, port) LPAIF_RXTX_IRQ_REG_ADDR(v, 0xC, port) argument
86 #define LPAIF_VA_IRQ_REG_ADDR(v, addr, port) \ argument
89 #define LPAIF_VA_IRQEN_REG(v, port) LPAIF_VA_IRQ_REG_ADDR(v, 0x0, port) argument
90 #define LPAIF_VA_IRQSTAT_REG(v, port) LPAIF_VA_IRQ_REG_ADDR(v, 0x4, port) argument
91 #define LPAIF_VA_IRQCLEAR_REG(v, port) LPAIF_VA_IRQ_REG_ADDR(v, 0xC, port) argument
93 #define LPASS_HDMITX_APP_IRQ_REG_ADDR(v, addr) \ argument
96 #define LPASS_HDMITX_APP_IRQEN_REG(v) LPASS_HDMITX_APP_IRQ_REG_ADDR(v, 0x4) argument
97 #define LPASS_HDMITX_APP_IRQSTAT_REG(v) LPASS_HDMITX_APP_IRQ_REG_ADDR(v, 0x8) argument
98 #define LPASS_HDMITX_APP_IRQCLEAR_REG(v) LPASS_HDMITX_APP_IRQ_REG_ADDR(v, 0xC) argument
112 #define LPAIF_HDMI_RDMA_REG_ADDR(v, addr, chan) \ argument
117 #define LPAIF_HDMI_RDMACTL_REG(v, chan) LPAIF_HDMI_RDMA_REG_ADDR(v, 0x00, (chan)) argument
118 #define LPAIF_HDMI_RDMABASE_REG(v, chan) LPAIF_HDMI_RDMA_REG_ADDR(v, 0x04, (chan)) argument
119 #define LPAIF_HDMI_RDMABUFF_REG(v, chan) LPAIF_HDMI_RDMA_REG_ADDR(v, 0x08, (chan)) argument
120 #define LPAIF_HDMI_RDMACURR_REG(v, chan) LPAIF_HDMI_RDMA_REG_ADDR(v, 0x0C, (chan)) argument
121 #define LPAIF_HDMI_RDMAPER_REG(v, chan) LPAIF_HDMI_RDMA_REG_ADDR(v, 0x10, (chan)) argument
122 #define LPAIF_HDMI_RDMAPERCNT_REG(v, chan) LPAIF_HDMI_RDMA_REG_ADDR(v, 0x14, (chan)) argument
124 #define LPAIF_RDMA_REG_ADDR(v, addr, chan) \ argument
129 #define LPAIF_RDMACTL_REG(v, chan) LPAIF_RDMA_REG_ADDR(v, 0x00, (chan)) argument
130 #define LPAIF_RDMABASE_REG(v, chan) LPAIF_RDMA_REG_ADDR(v, 0x04, (chan)) argument
131 #define LPAIF_RDMABUFF_REG(v, chan) LPAIF_RDMA_REG_ADDR(v, 0x08, (chan)) argument
132 #define LPAIF_RDMACURR_REG(v, chan) LPAIF_RDMA_REG_ADDR(v, 0x0C, (chan)) argument
133 #define LPAIF_RDMAPER_REG(v, chan) LPAIF_RDMA_REG_ADDR(v, 0x10, (chan)) argument
134 #define LPAIF_RDMAPERCNT_REG(v, chan) LPAIF_RDMA_REG_ADDR(v, 0x14, (chan)) argument
136 #define LPAIF_WRDMA_REG_ADDR(v, addr, chan) \ argument
140 #define LPAIF_WRDMACTL_REG(v, chan) LPAIF_WRDMA_REG_ADDR(v, 0x00, (chan)) argument
141 #define LPAIF_WRDMABASE_REG(v, chan) LPAIF_WRDMA_REG_ADDR(v, 0x04, (chan)) argument
142 #define LPAIF_WRDMABUFF_REG(v, chan) LPAIF_WRDMA_REG_ADDR(v, 0x08, (chan)) argument
143 #define LPAIF_WRDMACURR_REG(v, chan) LPAIF_WRDMA_REG_ADDR(v, 0x0C, (chan)) argument
144 #define LPAIF_WRDMAPER_REG(v, chan) LPAIF_WRDMA_REG_ADDR(v, 0x10, (chan)) argument
145 #define LPAIF_WRDMAPERCNT_REG(v, chan) LPAIF_WRDMA_REG_ADDR(v, 0x14, (chan)) argument
147 #define LPAIF_INTFDMA_REG(v, chan, reg, dai_id) \ argument
152 #define __LPAIF_DMA_REG(v, chan, dir, reg, dai_id) \ argument
157 #define LPAIF_DMACTL_REG(v, chan, dir, dai_id) \ argument
161 #define LPAIF_DMABASE_REG(v, chan, dir, dai_id) \ argument
165 #define LPAIF_DMABUFF_REG(v, chan, dir, dai_id) \ argument
169 #define LPAIF_DMACURR_REG(v, chan, dir, dai_id) \ argument
173 #define LPAIF_DMAPER_REG(v, chan, dir, dai_id) \ argument
177 #define LPAIF_DMAPERCNT_REG(v, chan, dir, dai_id) \ argument
182 #define LPAIF_CDC_RDMA_REG_ADDR(v, addr, chan, dai_id) \ argument
187 #define LPAIF_CDC_RXTX_RDMACTL_REG(v, chan, dai_id) \ argument
189 #define LPAIF_CDC_RXTX_RDMABASE_REG(v, chan, dai_id) \ argument
191 #define LPAIF_CDC_RXTX_RDMABUFF_REG(v, chan, dai_id) \ argument
193 #define LPAIF_CDC_RXTX_RDMACURR_REG(v, chan, dai_id) \ argument
195 #define LPAIF_CDC_RXTX_RDMAPER_REG(v, chan, dai_id) \ argument
197 #define LPAIF_CDC_RXTX_RDMA_INTF_REG(v, chan, dai_id) \ argument
200 #define LPAIF_CDC_VA_RDMACTL_REG(v, chan, dai_id) LPAIF_CDC_RDMA_REG_ADDR(v, 0x00, (chan), dai_id) argument
201 #define LPAIF_CDC_VA_RDMABASE_REG(v, chan, dai_id) LPAIF_CDC_RDMA_REG_ADDR(v, 0x04, (chan), dai_id) argument
202 #define LPAIF_CDC_VA_RDMABUFF_REG(v, chan, dai_id) LPAIF_CDC_RDMA_REG_ADDR(v, 0x08, (chan), dai_id) argument
203 #define LPAIF_CDC_VA_RDMACURR_REG(v, chan, dai_id) LPAIF_CDC_RDMA_REG_ADDR(v, 0x0C, (chan), dai_id) argument
204 #define LPAIF_CDC_VA_RDMAPER_REG(v, chan, dai_id) LPAIF_CDC_RDMA_REG_ADDR(v, 0x10, (chan), dai_id) argument
205 #define LPAIF_CDC_VA_RDMA_INTF_REG(v, chan, dai_id) \ argument
208 #define LPAIF_CDC_WRDMA_REG_ADDR(v, addr, chan, dai_id) \ argument
215 #define LPAIF_CDC_RXTX_WRDMACTL_REG(v, chan, dai_id) \ argument
217 #define LPAIF_CDC_RXTX_WRDMABASE_REG(v, chan, dai_id) \ argument
219 #define LPAIF_CDC_RXTX_WRDMABUFF_REG(v, chan, dai_id) \ argument
221 #define LPAIF_CDC_RXTX_WRDMACURR_REG(v, chan, dai_id) \ argument
223 #define LPAIF_CDC_RXTX_WRDMAPER_REG(v, chan, dai_id) \ argument
225 #define LPAIF_CDC_RXTX_WRDMA_INTF_REG(v, chan, dai_id) \ argument
228 #define LPAIF_CDC_VA_WRDMACTL_REG(v, chan, dai_id) \ argument
230 #define LPAIF_CDC_VA_WRDMABASE_REG(v, chan, dai_id) \ argument
232 #define LPAIF_CDC_VA_WRDMABUFF_REG(v, chan, dai_id) \ argument
234 #define LPAIF_CDC_VA_WRDMACURR_REG(v, chan, dai_id) \ argument
236 #define LPAIF_CDC_VA_WRDMAPER_REG(v, chan, dai_id) \ argument
238 #define LPAIF_CDC_VA_WRDMA_INTF_REG(v, chan, dai_id) \ argument
241 #define __LPAIF_CDC_RDDMA_REG(v, chan, dir, reg, dai_id) \ argument
245 #define __LPAIF_CDC_WRDMA_REG(v, chan, dir, reg, dai_id) \ argument
249 #define __LPAIF_CDC_DMA_REG(v, chan, dir, reg, dai_id) \ argument
254 #define LPAIF_CDC_INTF_REG(v, chan, dir, dai_id) \ argument
259 #define LPAIF_INTF_REG(v, chan, dir, dai_id) \ argument