76 static struct pxa_i2s_port pxa_i2s;  variable
125 		pxa_i2s.fmt = 0;  in pxa2xx_i2s_set_dai_fmt()
128 		pxa_i2s.fmt = SACR1_AMSL;  in pxa2xx_i2s_set_dai_fmt()
134 		pxa_i2s.master = 1;  in pxa2xx_i2s_set_dai_fmt()
137 		pxa_i2s.master = 0;  in pxa2xx_i2s_set_dai_fmt()
176 		if (pxa_i2s.master)  in pxa2xx_i2s_hw_params()
180 		writel(readl(i2s_reg_base + SACR1) | (pxa_i2s.fmt), i2s_reg_base + SACR1);  in pxa2xx_i2s_hw_params()
265 	pxa_i2s.sacr0 = readl(i2s_reg_base + SACR0);  in pxa2xx_soc_pcm_suspend()
266 	pxa_i2s.sacr1 = readl(i2s_reg_base + SACR1);  in pxa2xx_soc_pcm_suspend()
267 	pxa_i2s.saimr = readl(i2s_reg_base + SAIMR);  in pxa2xx_soc_pcm_suspend()
268 	pxa_i2s.sadiv = readl(i2s_reg_base + SADIV);  in pxa2xx_soc_pcm_suspend()
280 	writel(pxa_i2s.sacr0 & ~SACR0_ENB, i2s_reg_base + SACR0);  in pxa2xx_soc_pcm_resume()
281 	writel(pxa_i2s.sacr1, i2s_reg_base + SACR1);  in pxa2xx_soc_pcm_resume()
282 	writel(pxa_i2s.saimr, i2s_reg_base + SAIMR);  in pxa2xx_soc_pcm_resume()
283 	writel(pxa_i2s.sadiv, i2s_reg_base + SADIV);  in pxa2xx_soc_pcm_resume()
285 	writel(pxa_i2s.sacr0, i2s_reg_base + SACR0);  in pxa2xx_soc_pcm_resume()