Lines Matching refs:SACR0
31 #define SACR0 (0x0000) /* Global Control Register */ macro
103 writel(0, i2s_reg_base + SACR0); in pxa2xx_i2s_startup()
174 if (!(SACR0 & SACR0_ENB)) { in pxa2xx_i2s_hw_params()
175 writel(0, i2s_reg_base + SACR0); in pxa2xx_i2s_hw_params()
177 writel(readl(i2s_reg_base + SACR0) | (SACR0_BCKD), i2s_reg_base + SACR0); in pxa2xx_i2s_hw_params()
179 writel(readl(i2s_reg_base + SACR0) | (SACR0_RFTH(14) | SACR0_TFTH(1)), i2s_reg_base + SACR0); in pxa2xx_i2s_hw_params()
225 writel(readl(i2s_reg_base + SACR0) | (SACR0_ENB), i2s_reg_base + SACR0); in pxa2xx_i2s_trigger()
252 writel(readl(i2s_reg_base + SACR0) & (~SACR0_ENB), i2s_reg_base + SACR0); in pxa2xx_i2s_shutdown()
265 pxa_i2s.sacr0 = readl(i2s_reg_base + SACR0); in pxa2xx_soc_pcm_suspend()
271 writel(readl(i2s_reg_base + SACR0) & (~SACR0_ENB), i2s_reg_base + SACR0); in pxa2xx_soc_pcm_suspend()
280 writel(pxa_i2s.sacr0 & ~SACR0_ENB, i2s_reg_base + SACR0); in pxa2xx_soc_pcm_resume()
285 writel(pxa_i2s.sacr0, i2s_reg_base + SACR0); in pxa2xx_soc_pcm_resume()
307 writel(SACR0_RST, i2s_reg_base + SACR0); in pxa2xx_i2s_probe()
308 writel(0, i2s_reg_base + SACR0); in pxa2xx_i2s_probe()