Lines Matching refs:afe_priv
66 struct mt8192_afe_private *afe_priv = afe->platform_priv; in mt8192_set_audio_int_bus_parent() local
69 ret = clk_set_parent(afe_priv->clk[CLK_MUX_AUDIOINTBUS], in mt8192_set_audio_int_bus_parent()
70 afe_priv->clk[clk_id]); in mt8192_set_audio_int_bus_parent()
82 struct mt8192_afe_private *afe_priv = afe->platform_priv; in apll1_mux_setting() local
86 ret = clk_prepare_enable(afe_priv->clk[CLK_TOP_MUX_AUD_1]); in apll1_mux_setting()
92 ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_1], in apll1_mux_setting()
93 afe_priv->clk[CLK_TOP_APLL1_CK]); in apll1_mux_setting()
102 ret = clk_prepare_enable(afe_priv->clk[CLK_TOP_MUX_AUD_ENG1]); in apll1_mux_setting()
108 ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_ENG1], in apll1_mux_setting()
109 afe_priv->clk[CLK_TOP_APLL1_D4]); in apll1_mux_setting()
117 ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_ENG1], in apll1_mux_setting()
118 afe_priv->clk[CLK_CLK26M]); in apll1_mux_setting()
125 clk_disable_unprepare(afe_priv->clk[CLK_TOP_MUX_AUD_ENG1]); in apll1_mux_setting()
127 ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_1], in apll1_mux_setting()
128 afe_priv->clk[CLK_CLK26M]); in apll1_mux_setting()
135 clk_disable_unprepare(afe_priv->clk[CLK_TOP_MUX_AUD_1]); in apll1_mux_setting()
144 struct mt8192_afe_private *afe_priv = afe->platform_priv; in apll2_mux_setting() local
148 ret = clk_prepare_enable(afe_priv->clk[CLK_TOP_MUX_AUD_2]); in apll2_mux_setting()
154 ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_2], in apll2_mux_setting()
155 afe_priv->clk[CLK_TOP_APLL2_CK]); in apll2_mux_setting()
164 ret = clk_prepare_enable(afe_priv->clk[CLK_TOP_MUX_AUD_ENG2]); in apll2_mux_setting()
170 ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_ENG2], in apll2_mux_setting()
171 afe_priv->clk[CLK_TOP_APLL2_D4]); in apll2_mux_setting()
179 ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_ENG2], in apll2_mux_setting()
180 afe_priv->clk[CLK_CLK26M]); in apll2_mux_setting()
187 clk_disable_unprepare(afe_priv->clk[CLK_TOP_MUX_AUD_ENG2]); in apll2_mux_setting()
189 ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_2], in apll2_mux_setting()
190 afe_priv->clk[CLK_CLK26M]); in apll2_mux_setting()
197 clk_disable_unprepare(afe_priv->clk[CLK_TOP_MUX_AUD_2]); in apll2_mux_setting()
206 struct mt8192_afe_private *afe_priv = afe->platform_priv; in mt8192_afe_enable_clock() local
209 ret = clk_prepare_enable(afe_priv->clk[CLK_INFRA_SYS_AUDIO]); in mt8192_afe_enable_clock()
216 ret = clk_prepare_enable(afe_priv->clk[CLK_INFRA_AUDIO_26M]); in mt8192_afe_enable_clock()
223 ret = clk_prepare_enable(afe_priv->clk[CLK_MUX_AUDIO]); in mt8192_afe_enable_clock()
229 ret = clk_set_parent(afe_priv->clk[CLK_MUX_AUDIO], in mt8192_afe_enable_clock()
230 afe_priv->clk[CLK_CLK26M]); in mt8192_afe_enable_clock()
238 ret = clk_prepare_enable(afe_priv->clk[CLK_MUX_AUDIOINTBUS]); in mt8192_afe_enable_clock()
253 ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUDIO_H], in mt8192_afe_enable_clock()
254 afe_priv->clk[CLK_TOP_APLL2_CK]); in mt8192_afe_enable_clock()
262 ret = clk_prepare_enable(afe_priv->clk[CLK_AFE]); in mt8192_afe_enable_clock()
275 struct mt8192_afe_private *afe_priv = afe->platform_priv; in mt8192_afe_disable_clock() local
277 clk_disable_unprepare(afe_priv->clk[CLK_AFE]); in mt8192_afe_disable_clock()
279 clk_disable_unprepare(afe_priv->clk[CLK_MUX_AUDIOINTBUS]); in mt8192_afe_disable_clock()
280 clk_disable_unprepare(afe_priv->clk[CLK_MUX_AUDIO]); in mt8192_afe_disable_clock()
281 clk_disable_unprepare(afe_priv->clk[CLK_INFRA_AUDIO_26M]); in mt8192_afe_disable_clock()
282 clk_disable_unprepare(afe_priv->clk[CLK_INFRA_SYS_AUDIO]); in mt8192_afe_disable_clock()
287 struct mt8192_afe_private *afe_priv = afe->platform_priv; in mt8192_apll1_enable() local
293 ret = clk_prepare_enable(afe_priv->clk[CLK_APLL22M]); in mt8192_apll1_enable()
300 ret = clk_prepare_enable(afe_priv->clk[CLK_APLL1_TUNER]); in mt8192_apll1_enable()
321 struct mt8192_afe_private *afe_priv = afe->platform_priv; in mt8192_apll1_disable() local
329 clk_disable_unprepare(afe_priv->clk[CLK_APLL1_TUNER]); in mt8192_apll1_disable()
330 clk_disable_unprepare(afe_priv->clk[CLK_APLL22M]); in mt8192_apll1_disable()
337 struct mt8192_afe_private *afe_priv = afe->platform_priv; in mt8192_apll2_enable() local
343 ret = clk_prepare_enable(afe_priv->clk[CLK_APLL24M]); in mt8192_apll2_enable()
350 ret = clk_prepare_enable(afe_priv->clk[CLK_APLL2_TUNER]); in mt8192_apll2_enable()
371 struct mt8192_afe_private *afe_priv = afe->platform_priv; in mt8192_apll2_disable() local
379 clk_disable_unprepare(afe_priv->clk[CLK_APLL2_TUNER]); in mt8192_apll2_disable()
380 clk_disable_unprepare(afe_priv->clk[CLK_APLL24M]); in mt8192_apll2_disable()
564 struct mt8192_afe_private *afe_priv = afe->platform_priv; in mt8192_mck_enable() local
574 ret = clk_prepare_enable(afe_priv->clk[m_sel_id]); in mt8192_mck_enable()
580 ret = clk_set_parent(afe_priv->clk[m_sel_id], in mt8192_mck_enable()
581 afe_priv->clk[apll_clk_id]); in mt8192_mck_enable()
591 ret = clk_prepare_enable(afe_priv->clk[div_clk_id]); in mt8192_mck_enable()
597 ret = clk_set_rate(afe_priv->clk[div_clk_id], rate); in mt8192_mck_enable()
610 struct mt8192_afe_private *afe_priv = afe->platform_priv; in mt8192_mck_disable() local
614 clk_disable_unprepare(afe_priv->clk[div_clk_id]); in mt8192_mck_disable()
616 clk_disable_unprepare(afe_priv->clk[m_sel_id]); in mt8192_mck_disable()
621 struct mt8192_afe_private *afe_priv = afe->platform_priv; in mt8192_init_clock() local
625 afe_priv->clk = devm_kcalloc(afe->dev, CLK_NUM, sizeof(*afe_priv->clk), in mt8192_init_clock()
627 if (!afe_priv->clk) in mt8192_init_clock()
631 afe_priv->clk[i] = devm_clk_get(afe->dev, aud_clks[i]); in mt8192_init_clock()
632 if (IS_ERR(afe_priv->clk[i])) { in mt8192_init_clock()
635 aud_clks[i], PTR_ERR(afe_priv->clk[i])); in mt8192_init_clock()
636 afe_priv->clk[i] = NULL; in mt8192_init_clock()
640 afe_priv->apmixedsys = syscon_regmap_lookup_by_phandle(of_node, in mt8192_init_clock()
642 if (IS_ERR(afe_priv->apmixedsys)) { in mt8192_init_clock()
644 __func__, PTR_ERR(afe_priv->apmixedsys)); in mt8192_init_clock()
645 return PTR_ERR(afe_priv->apmixedsys); in mt8192_init_clock()
648 afe_priv->topckgen = syscon_regmap_lookup_by_phandle(of_node, in mt8192_init_clock()
650 if (IS_ERR(afe_priv->topckgen)) { in mt8192_init_clock()
652 __func__, PTR_ERR(afe_priv->topckgen)); in mt8192_init_clock()
653 return PTR_ERR(afe_priv->topckgen); in mt8192_init_clock()
656 afe_priv->infracfg = syscon_regmap_lookup_by_phandle(of_node, in mt8192_init_clock()
658 if (IS_ERR(afe_priv->infracfg)) { in mt8192_init_clock()
660 __func__, PTR_ERR(afe_priv->infracfg)); in mt8192_init_clock()
661 return PTR_ERR(afe_priv->infracfg); in mt8192_init_clock()