Lines Matching refs:afe_priv
254 struct mt8188_afe_private *afe_priv = afe->platform_priv; in mt8188_afe_enable_tuner_clk() local
258 mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_APLL]); in mt8188_afe_enable_tuner_clk()
259 mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_APLL1_TUNER]); in mt8188_afe_enable_tuner_clk()
262 mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_APLL2]); in mt8188_afe_enable_tuner_clk()
263 mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_APLL2_TUNER]); in mt8188_afe_enable_tuner_clk()
275 struct mt8188_afe_private *afe_priv = afe->platform_priv; in mt8188_afe_disable_tuner_clk() local
279 mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_APLL1_TUNER]); in mt8188_afe_disable_tuner_clk()
280 mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_APLL]); in mt8188_afe_disable_tuner_clk()
283 mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_APLL2_TUNER]); in mt8188_afe_disable_tuner_clk()
284 mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_APLL2]); in mt8188_afe_disable_tuner_clk()
369 struct mt8188_afe_private *afe_priv = afe->platform_priv; in mt8188_afe_get_mclk_source_rate() local
377 return clk_get_rate(afe_priv->clk[clk_id]); in mt8188_afe_get_mclk_source_rate()
401 struct mt8188_afe_private *afe_priv = afe->platform_priv; in mt8188_afe_init_clock() local
410 afe_priv->clk = in mt8188_afe_init_clock()
411 devm_kcalloc(afe->dev, MT8188_CLK_NUM, sizeof(*afe_priv->clk), in mt8188_afe_init_clock()
413 if (!afe_priv->clk) in mt8188_afe_init_clock()
417 afe_priv->clk[i] = devm_clk_get(afe->dev, aud_clks[i]); in mt8188_afe_init_clock()
418 if (IS_ERR(afe_priv->clk[i])) { in mt8188_afe_init_clock()
421 PTR_ERR(afe_priv->clk[i])); in mt8188_afe_init_clock()
422 return PTR_ERR(afe_priv->clk[i]); in mt8188_afe_init_clock()
574 struct mt8188_afe_private *afe_priv = afe->platform_priv; in mt8188_afe_enable_reg_rw_clk() local
577 mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_TOP_AUDIO_LOCAL_BUS_SEL]); in mt8188_afe_enable_reg_rw_clk()
580 mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_TOP_AUD_INTBUS_SEL]); in mt8188_afe_enable_reg_rw_clk()
583 mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_ADSP_AUDIO_26M]); in mt8188_afe_enable_reg_rw_clk()
586 mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_AFE]); in mt8188_afe_enable_reg_rw_clk()
587 mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_A1SYS_HP]); in mt8188_afe_enable_reg_rw_clk()
588 mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_A1SYS]); in mt8188_afe_enable_reg_rw_clk()
595 struct mt8188_afe_private *afe_priv = afe->platform_priv; in mt8188_afe_disable_reg_rw_clk() local
597 mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_A1SYS]); in mt8188_afe_disable_reg_rw_clk()
598 mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_A1SYS_HP]); in mt8188_afe_disable_reg_rw_clk()
599 mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_AFE]); in mt8188_afe_disable_reg_rw_clk()
600 mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_ADSP_AUDIO_26M]); in mt8188_afe_disable_reg_rw_clk()
601 mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_TOP_AUD_INTBUS_SEL]); in mt8188_afe_disable_reg_rw_clk()
602 mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_TOP_AUDIO_LOCAL_BUS_SEL]); in mt8188_afe_disable_reg_rw_clk()
621 struct mt8188_afe_private *afe_priv = afe->platform_priv; in mt8188_afe_enable_a1sys() local
624 ret = mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_A1SYS]); in mt8188_afe_enable_a1sys()
633 struct mt8188_afe_private *afe_priv = afe->platform_priv; in mt8188_afe_disable_a1sys() local
636 mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_A1SYS]); in mt8188_afe_disable_a1sys()
642 struct mt8188_afe_private *afe_priv = afe->platform_priv; in mt8188_afe_enable_a2sys() local
645 ret = mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_A2SYS]); in mt8188_afe_enable_a2sys()
654 struct mt8188_afe_private *afe_priv = afe->platform_priv; in mt8188_afe_disable_a2sys() local
657 mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_A2SYS]); in mt8188_afe_disable_a2sys()
663 struct mt8188_afe_private *afe_priv = afe->platform_priv; in mt8188_apll1_enable() local
666 ret = mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_TOP_APLL1_D4]); in mt8188_apll1_enable()
670 ret = mt8188_afe_set_clk_parent(afe, afe_priv->clk[MT8188_CLK_TOP_A1SYS_HP_SEL], in mt8188_apll1_enable()
671 afe_priv->clk[MT8188_CLK_TOP_APLL1_D4]); in mt8188_apll1_enable()
688 mt8188_afe_set_clk_parent(afe, afe_priv->clk[MT8188_CLK_TOP_A1SYS_HP_SEL], in mt8188_apll1_enable()
689 afe_priv->clk[MT8188_CLK_XTAL_26M]); in mt8188_apll1_enable()
691 mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_TOP_APLL1_D4]); in mt8188_apll1_enable()
698 struct mt8188_afe_private *afe_priv = afe->platform_priv; in mt8188_apll1_disable() local
702 mt8188_afe_set_clk_parent(afe, afe_priv->clk[MT8188_CLK_TOP_A1SYS_HP_SEL], in mt8188_apll1_disable()
703 afe_priv->clk[MT8188_CLK_XTAL_26M]); in mt8188_apll1_disable()
704 mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_TOP_APLL1_D4]); in mt8188_apll1_disable()