Lines Matching refs:clk_set_parent
79 ret = clk_set_parent(afe_priv->clk[CLK_MUX_AUDIOINTBUS], in mt8186_set_audio_int_bus_parent()
103 ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_1], in apll1_mux_setting()
119 ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_ENG1], in apll1_mux_setting()
128 ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_ENG1], in apll1_mux_setting()
138 ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_1], in apll1_mux_setting()
164 ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_2], in apll2_mux_setting()
180 ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_ENG2], in apll2_mux_setting()
189 ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_ENG2], in apll2_mux_setting()
199 ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD_2], in apll2_mux_setting()
265 ret = clk_set_parent(afe_priv->clk[CLK_MUX_AUDIO], in mt8186_afe_enable_clock()
285 ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUDIO_H], in mt8186_afe_enable_clock()
558 ret = clk_set_parent(afe_priv->clk[m_sel_id], in mt8186_mck_enable()