Lines Matching +full:1 +full:- +full:3

1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3  * sma1303.h -- sma1303 ALSA SoC Audio driver
27 #define  SMA1303_I2C_RETRY_COUNT	3
109 #define SMA1303_RESETBYI2C_MASK (1<<1)
110 #define SMA1303_RESETBYI2C_NORMAL (0<<1)
111 #define SMA1303_RESETBYI2C_RESET (1<<1)
113 #define SMA1303_POWER_MASK (1<<0)
115 #define SMA1303_POWER_ON (1<<0)
118 #define SMA1303_CONTROLLER_DEVICE_MASK (1<<7)
120 #define SMA1303_CONTROLLER_MODE	(1<<7)
124 #define SMA1303_LJ		(1<<4)
130 #define SMA1303_LEFTPOL_MASK	(1<<3)
131 #define SMA1303_LOW_FIRST_CH	(0<<3)
132 #define SMA1303_HIGH_FIRST_CH	(1<<3)
134 #define SMA1303_SCK_RISING_MASK	(1<<2)
136 #define SMA1303_SCK_RISING_EDGE	(1<<2)
139 #define SMA1303_IMODE_MASK (3<<6)
141 #define SMA1303_PCM_SHORT (1<<6)
144 #define RSMA1303_IGHT_FIRST_MASK (1<<5)
146 #define SMA1303_RIGHT_INVERTED (1<<5)
148 #define SMA1303_PCM_ALAW_MASK (1<<4)
150 #define SMA1303_PCM_A_DECODING (1<<4)
152 #define SMA1303_PCM_COMP_MASK (1<<3)
153 #define SMA1303_PCM_LINEAR (0<<3)
154 #define SMA1303_PCM_COMPANDING (1<<3)
156 #define SMA1303_INPUTSEL_MASK (1<<2)
158 #define SMA1303_PCM_16KHZ (1<<2)
160 #define SMA1303_PCM_STEREO_MASK (1<<1)
161 #define SMA1303_PCM_MONO (0<<1)
162 #define SMA1303_PCM_STEREO (1<<1)
164 #define SMA1303_PCM_DL_MASK (1<<0)
166 #define SMA1303_PCM_16BIT (1<<0)
171 #define SMA1303_PCM_N_SLOT2 (1<<0)
173 #define SMA1303_PCM_N_SLOT4 (3<<0)
190 #define SMA1303_PCM1_SLOT2 (1<<4)
192 #define SMA1303_PCM1_SLOT4 (3<<4)
208 #define SMA1303_PCM2_SLOT2 (1<<0)
210 #define SMA1303_PCM2_SLOT4 (3<<0)
225 #define SMA1303_PORT_CONFIG_MASK (3<<5)
231 #define SMA1303_FORMAT_CONVERTER (1<<0)
233 #define SMA1303_SPEAKER_PATH (3<<0)
237 #define SMA1303_BST_OFF_SLOPE_MASK (3<<6)
239 #define SMA1303_BST_OFF_SLOPE_4_8ns (1<<6)
241 #define SMA1303_BST_OFF_SLOPE_1_2ns (3<<6)
243 #define SMA1303_OCP_TEST_MASK (1<<5)
245 #define SMA1303_OCP_TEST_MODE (1<<5)
247 #define SMA1303_BST_FAST_LEBN_MASK (1<<4)
249 #define SMA1303_BST_LONG_LEB (1<<4)
251 #define SMA1303_HIGH_PGAIN_MASK (1<<3)
252 #define SMA1303_NORMAL_P_GAIN (0<<3)
253 #define SMA1303_HIGH_P_GAIN (1<<3)
255 #define SMA1303_VCOMP_MASK (1<<2)
257 #define SMA1303_VCOMP_V_MON_MODE (1<<2)
259 #define SMA1303_PMOS_ON_MASK (1<<1)
260 #define SMA1303_PMOS_NORMAL_MODE (0<<1)
261 #define SMA1303_PMOS_TEST_MODE (1<<1)
263 #define SMA1303_NMOS_ON_MASK (1<<0)
265 #define SMA1303_NMOS_TEST_MODE (1<<0)
268 #define SMA1303_SET_OCP_H_MASK (3<<6)
270 #define SMA1303_HIGH_OCP_3_2_LVL (1<<6)
272 #define SMA1303_HIGH_OCP_0_9_LVL (3<<6)
274 #define SMA1303_OCL_TEST_MASK (1<<5)
276 #define SMA1303_OCL_TEST_MODE (1<<5)
278 #define SMA1303_LOOP_CHECK_MASK (1<<4)
280 #define SMA1303_BST_LOOP_CHECK_MODE (1<<4)
282 #define SMA1303_EN_SH_PRT_MASK (1<<3)
283 #define SMA1303_EN_SH_PRT_DISABLE (0<<3)
284 #define SMA1303_EN_SH_PRT_ENABLE (1<<3)
287 #define SMA1303_VREF_MON_MASK (1<<3)
288 #define SMA1303_VREF_NORMAL_MODE (0<<3)
289 #define SMA1303_VREF_V_MON_MODE (1<<3)
291 #define SMA1303_SPK_OCP_DLYN_MASK (1<<2)
293 #define SMA1303_SPK_OCP_NORMAL (1<<2)
295 #define SMA1303_SPK_OFF_SLOPE_MASK (3<<0)
297 #define SMA1303_SPK_OFF_SLOPE_FAST (3<<0)
300 #define SMA1303_VOL_SLOPE_MASK (3<<6)
302 #define SMA1303_VOL_SLOPE_SLOW (1<<6)
304 #define SMA1303_VOL_SLOPE_FAST (3<<6)
306 #define SMA1303_MUTE_SLOPE_MASK (3<<4)
308 #define SMA1303_MUTE_SLOPE_SLOW (1<<4)
310 #define SMA1303_MUTE_SLOPE_FAST (3<<4)
312 #define SMA1303_SPK_MUTE_MASK (1<<0)
314 #define SMA1303_SPK_MUTE (1<<0)
319 #define SMA1303_SPK_MONO (1<<2)
323 #define SMA1303_SPK_BS_MASK (1<<6)
325 #define SMA1303_SPK_BS_EN (1<<6)
326 #define SMA1303_SPK_LIM_MASK (1<<5)
328 #define SMA1303_SPK_LIM_EN (1<<5)
330 #define SMA1303_LR_DATA_SW_MASK (1<<4)
332 #define SMA1303_LR_DATA_SW_SWAP (1<<4)
334 #define SMA1303_MONOMIX_MASK (1<<0)
336 #define SMA1303_MONOMIX_ON (1<<0)
339 #define SMA1303_INPUT_MASK (3<<6)
341 #define SMA1303_INPUT_M6_DB (1<<6)
343 #define SMA1303_INPUT_INFI_DB (3<<6)
344 #define SMA1303_INPUT_R_MASK (3<<4)
346 #define SMA1303_INPUT_R_M6_DB (1<<4)
348 #define SMA1303_INPUT_R_INFI_DB (3<<4)
351 #define SMA1303_SPK_HYSFB_MASK (3<<6)
353 #define SMA1303_HYSFB_414K (1<<6)
355 #define SMA1303_HYSFB_226K (3<<6)
359 #define SMA1303_SDM_Q_SEL_MASK (1<<2)
361 #define SMA1303_QUART_SEL_1_DIV_8 (1<<2)
364 #define SMA1303_OTP_LVL_MASK (1<<5)
366 #define SMA1303_OTP_LVL_LOW (1<<5)
369 #define SMA1303_EDGE_DIS_MASK (1<<7)
371 #define SMA1303_EDGE_DIS_DISABLE (1<<7)
373 #define SMA1303_SPK_OCP_DIS_MASK (1<<3)
374 #define SMA1303_SPK_OCP_ENABLE (0<<3)
375 #define SMA1303_SPK_OCP_DISABLE (1<<3)
377 #define SMA1303_OCP_MODE_MASK (1<<2)
379 #define SMA1303_SHUT_DOWN_PERMANENT (1<<2)
381 #define SMA1303_OTP_MODE_MASK (3<<0)
383 #define SMA1303_IG_THR1_SHUT_THR2 (1<<0)
385 #define SMA1303_SHUT_THR1_SHUT_THR2 (3<<0)
388 #define SMA1303_SPK_HSDM_BP_MASK (1<<4)
390 #define SMA1303_SPK_HSDM_BYPASS (1<<4)
392 #define SMA1303_SDM_SYNC_DIS_MASK (1<<5)
394 #define SMA1303_SDM_SYNC_DISABLE (1<<5)
397 #define SMA1303_SPK_OUT_FREQ_MASK (1<<2)
399 #define SMA1303_SPK_OUT_FREQ_410K (1<<2)
401 #define SMA1303_LOW_POWER_MODE_MASK (1<<3)
402 #define SMA1303_LOW_POWER_MODE_DISABLE (0<<3)
403 #define SMA1303_LOW_POWER_MODE_ENABLE (1<<3)
405 #define SMA1303_THERMAL_ADJUST_MASK (3<<5)
407 #define SMA1303_THERMAL_160_120 (1<<5)
410 #define SMA1303_FAST_OFF_DRIVE_SPK_MASK (1<<0)
412 #define SMA1303_FAST_OFF_DRIVE_SPK_ENABLE (1<<0)
415 #define SMA1303_TRM_LVL_MASK (1<<4)
417 #define SMA1303_TRM_LVL_LOW (1<<4)
419 #define SMA1303_LOW_OCL_MODE_MASK (1<<3)
420 #define SMA1303_LOW_OCL_MODE (0<<3)
421 #define SMA1303_NORMAL_OCL_MODE (1<<3)
428 #define SMA1303_BYP_POST_MASK (1<<0)
430 #define SMA1303_BYP_POST_SCALER (1<<0)
435 #define SMA1303_FLT_VDD_GAIN_2P45 (1<<4)
437 #define SMA1303_FLT_VDD_GAIN_2P55 (3<<4)
451 #define SMA1303_DIS_FCHG_MASK (1<<2)
453 #define SMA1303_DIS_FAST_CHARGE (1<<2)
458 #define SMA1303_TRM_VBST_5P6 (1<<2)
460 #define SMA1303_TRM_VBST_5P8 (3<<2)
467 #define SMA1303_PLL_LOCK_SKIP_MASK (1<<7)
469 #define SMA1303_PLL_LOCK_DISABLE (1<<7)
471 #define SMA1303_PLL_PD_MASK (1<<6)
473 #define SMA1303_PLL_PD (1<<6)
475 #define SMA1303_PLL_DIV_MASK (3<<4)
477 #define SMA1303_PLL_OUT_2 (1<<4)
479 #define SMA1303_PLL_OUT_8 (3<<4)
481 #define SMA1303_PLL_REF_CLK_MASK (1<<3)
482 #define SMA1303_PLL_REF_CLK1 (0<<3)
483 #define SMA1303_PLL_SCK (1<<3)
485 #define SMA1303_DAC_DN_CONV_MASK (1<<2)
487 #define SMA1303_DAC_DN_CONV_ENABLE (1<<2)
489 #define SMA1303_SDO_IO_MASK (1<<1)
490 #define SMA1303_HIGH_Z_LRCK_H (0<<1)
491 #define SMA1303_HIGH_Z_LRCK_L (1<<1)
493 #define SMA1303_SDO_OUTPUT2_MASK (1<<0)
495 #define SMA1303_SDO_OUTPUT_ONLY (1<<0)
498 #define SMA1303_MON_OSC_PLL_MASK (1<<7)
500 #define SMA1303_OSC_SDO (1<<7)
502 #define SMA1303_TEST_CLKO_EN_MASK (1<<6)
504 #define SMA1303_CLK_OUT_SDO (1<<6)
506 #define SMA1303_SDO_OUTPUT_MASK (1<<3)
507 #define SMA1303_NORMAL_OUT (0<<3)
508 #define SMA1303_HIGH_Z_OUT (1<<3)
510 #define SMA1303_CLOCK_MON_MASK (1<<1)
511 #define SMA1303_CLOCK_MON (0<<1)
512 #define SMA1303_CLOCK_NOT_MON (1<<1)
514 #define SMA1303_OSC_PD_MASK (1<<0)
516 #define SMA1303_POWER_DOWN_OSC (1<<0)
520 #define SMA1303_O_FMT_LJ (1<<5)
524 #define SMA1303_SCK_RATE_MASK (1<<3)
525 #define SMA1303_SCK_64FS (0<<3)
526 #define SMA1303_SCK_32FS (2<<3)
528 #define SMA1303_LRCK_POL_MASK (1<<0)
530 #define SMA1303_R_VALID (1<<0)
533 #define SMA1303_TDM_CLK_POL_MASK (1<<7)
535 #define SMA1303_TDM_CLK_POL_FALL (1<<7)
537 #define SMA1303_TDM_TX_MODE_MASK (1<<6)
539 #define SMA1303_TDM_TX_STEREO (1<<6)
541 #define SMA1303_TDM_SLOT1_RX_POS_MASK (7<<3)
542 #define SMA1303_TDM_SLOT1_RX_POS_0 (0<<3)
543 #define SMA1303_TDM_SLOT1_RX_POS_1 (1<<3)
544 #define SMA1303_TDM_SLOT1_RX_POS_2 (2<<3)
545 #define SMA1303_TDM_SLOT1_RX_POS_3 (3<<3)
546 #define SMA1303_TDM_SLOT1_RX_POS_4 (4<<3)
547 #define SMA1303_TDM_SLOT1_RX_POS_5 (5<<3)
548 #define SMA1303_TDM_SLOT1_RX_POS_6 (6<<3)
549 #define SMA1303_TDM_SLOT1_RX_POS_7 (7<<3)
553 #define SMA1303_TDM_SLOT2_RX_POS_1 (1<<0)
555 #define SMA1303_TDM_SLOT2_RX_POS_3 (3<<0)
562 #define SMA1303_TDM_DL_MASK (1<<7)
564 #define SMA1303_TDM_DL_32 (1<<7)
566 #define SMA1303_TDM_N_SLOT_MASK (1<<6)
568 #define SMA1303_TDM_N_SLOT_8 (1<<6)
570 #define SMA1303_TDM_SLOT1_TX_POS_MASK (7<<3)
571 #define SMA1303_TDM_SLOT1_TX_POS_0 (0<<3)
572 #define SMA1303_TDM_SLOT1_TX_POS_1 (1<<3)
573 #define SMA1303_TDM_SLOT1_TX_POS_2 (2<<3)
574 #define SMA1303_TDM_SLOT1_TX_POS_3 (3<<3)
575 #define SMA1303_TDM_SLOT1_TX_POS_4 (4<<3)
576 #define SMA1303_TDM_SLOT1_TX_POS_5 (5<<3)
577 #define SMA1303_TDM_SLOT1_TX_POS_6 (6<<3)
578 #define SMA1303_TDM_SLOT1_TX_POS_7 (7<<3)
582 #define SMA1303_TDM_SLOT2_TX_POS_1 (1<<0)
584 #define SMA1303_TDM_SLOT2_TX_POS_3 (3<<0)
591 #define SMA1303_OT1_OK_STATUS (1<<7)
592 #define SMA1303_OT2_OK_STATUS (1<<6)
595 #define SMA1303_OCP_SPK_STATUS (1<<5)
596 #define SMA1303_OCP_BST_STATUS (1<<4)
597 #define SMA1303_OTP_STAT_OK_0 (5<<1)
600 #define SMA1303_CLK_MON_STATUS (1<<0)
603 #define SMA1303_DEVICE_ID (2<<3)
604 #define SMA1303_UVLO_BST_STATUS (1<<2)
605 #define SMA1303_REV_NUM_STATUS (3<<0)
607 #define SMA1303_REV_NUM_TV1 (1<<0)