Lines Matching +full:adc +full:- +full:mux
1 // SPDX-License-Identifier: GPL-2.0
3 * rt715.c -- rt715 ALSA SoC audio driver
30 #include <sound/soc-dapm.h>
113 ret = regmap_read(rt715->regmap, addr_l, r_val); in rt715_get_gain()
120 ret = regmap_read(rt715->regmap, addr_h, l_val); in rt715_get_gain()
125 /* For Verb-Set Amplifier Gain (Verb ID = 3h) */
133 (struct soc_mixer_control *)kcontrol->private_value; in rt715_set_amp_gain_put()
140 if (ucontrol->value.integer.value[i] != rt715->kctl_2ch_vol_ori[i]) { in rt715_set_amp_gain_put()
147 addr_h = mc->reg; in rt715_set_amp_gain_put()
148 addr_l = mc->rreg; in rt715_set_amp_gain_put()
150 if (mc->shift == RT715_DIR_OUT_SFT) /* output */ in rt715_set_amp_gain_put()
157 if (dapm->bias_level <= SND_SOC_BIAS_STANDBY) in rt715_set_amp_gain_put()
158 regmap_write(rt715->regmap, in rt715_set_amp_gain_put()
162 rt715->kctl_2ch_vol_ori[0] = ucontrol->value.integer.value[0]; in rt715_set_amp_gain_put()
164 val_ll = ((ucontrol->value.integer.value[0]) & 0x7f); in rt715_set_amp_gain_put()
165 if (val_ll > mc->max) in rt715_set_amp_gain_put()
166 val_ll = mc->max; in rt715_set_amp_gain_put()
171 rt715->kctl_2ch_vol_ori[1] = ucontrol->value.integer.value[1]; in rt715_set_amp_gain_put()
173 val_lr = ((ucontrol->value.integer.value[1]) & 0x7f); in rt715_set_amp_gain_put()
174 if (val_lr > mc->max) in rt715_set_amp_gain_put()
175 val_lr = mc->max; in rt715_set_amp_gain_put()
183 val_h = (1 << mc->shift) | (3 << 4); in rt715_set_amp_gain_put()
184 regmap_write(rt715->regmap, addr_h, in rt715_set_amp_gain_put()
186 regmap_write(rt715->regmap, addr_l, in rt715_set_amp_gain_put()
190 val_h = (1 << mc->shift) | (1 << 5); in rt715_set_amp_gain_put()
191 regmap_write(rt715->regmap, addr_h, in rt715_set_amp_gain_put()
194 val_h = (1 << mc->shift) | (1 << 4); in rt715_set_amp_gain_put()
195 regmap_write(rt715->regmap, addr_l, in rt715_set_amp_gain_put()
199 if (mc->shift == RT715_DIR_OUT_SFT) /* output */ in rt715_set_amp_gain_put()
211 if (dapm->bias_level <= SND_SOC_BIAS_STANDBY) in rt715_set_amp_gain_put()
212 regmap_write(rt715->regmap, in rt715_set_amp_gain_put()
223 (struct soc_mixer_control *)kcontrol->private_value; in rt715_set_amp_gain_get()
227 addr_h = mc->reg; in rt715_set_amp_gain_get()
228 addr_l = mc->rreg; in rt715_set_amp_gain_get()
229 if (mc->shift == RT715_DIR_OUT_SFT) /* output */ in rt715_set_amp_gain_get()
236 if (mc->invert) { in rt715_set_amp_gain_get()
245 ucontrol->value.integer.value[0] = read_ll; in rt715_set_amp_gain_get()
246 ucontrol->value.integer.value[1] = read_rl; in rt715_set_amp_gain_get()
269 if (ucontrol->value.integer.value[i] != rt715->kctl_8ch_switch_ori[i]) in rt715_set_main_switch_put()
279 if (dapm->bias_level <= SND_SOC_BIAS_STANDBY) in rt715_set_main_switch_put()
280 regmap_write(rt715->regmap, in rt715_set_main_switch_put()
285 rt715->kctl_8ch_switch_ori[j * 2] = in rt715_set_main_switch_put()
286 ucontrol->value.integer.value[j * 2]; in rt715_set_main_switch_put()
287 val_ll = (!ucontrol->value.integer.value[j * 2]) << 7; in rt715_set_main_switch_put()
293 rt715->kctl_8ch_switch_ori[j * 2 + 1] = in rt715_set_main_switch_put()
294 ucontrol->value.integer.value[j * 2 + 1]; in rt715_set_main_switch_put()
295 val_lr = (!ucontrol->value.integer.value[j * 2 + 1]) << 7; in rt715_set_main_switch_put()
304 regmap_write(rt715->regmap, addr_h, in rt715_set_main_switch_put()
306 regmap_write(rt715->regmap, addr_l, in rt715_set_main_switch_put()
311 regmap_write(rt715->regmap, addr_h, in rt715_set_main_switch_put()
315 regmap_write(rt715->regmap, addr_l, in rt715_set_main_switch_put()
327 if (dapm->bias_level <= SND_SOC_BIAS_STANDBY) in rt715_set_main_switch_put()
328 regmap_write(rt715->regmap, in rt715_set_main_switch_put()
352 ucontrol->value.integer.value[i * 2] = !(read_ll & 0x80); in rt715_set_main_switch_get()
353 ucontrol->value.integer.value[i * 2 + 1] = !(read_rl & 0x80); in rt715_set_main_switch_get()
377 if (ucontrol->value.integer.value[i] != rt715->kctl_8ch_vol_ori[i]) in rt715_set_main_vol_put()
386 if (dapm->bias_level <= SND_SOC_BIAS_STANDBY) in rt715_set_main_vol_put()
387 regmap_write(rt715->regmap, in rt715_set_main_vol_put()
392 rt715->kctl_8ch_vol_ori[j * 2] = ucontrol->value.integer.value[j * 2]; in rt715_set_main_vol_put()
393 val_ll = ((ucontrol->value.integer.value[j * 2]) & 0x7f); in rt715_set_main_vol_put()
401 rt715->kctl_8ch_vol_ori[j * 2 + 1] = in rt715_set_main_vol_put()
402 ucontrol->value.integer.value[j * 2 + 1]; in rt715_set_main_vol_put()
403 val_lr = ((ucontrol->value.integer.value[j * 2 + 1]) & 0x7f); in rt715_set_main_vol_put()
413 regmap_write(rt715->regmap, addr_h, in rt715_set_main_vol_put()
415 regmap_write(rt715->regmap, addr_l, in rt715_set_main_vol_put()
420 regmap_write(rt715->regmap, addr_h, in rt715_set_main_vol_put()
424 regmap_write(rt715->regmap, addr_l, in rt715_set_main_vol_put()
436 if (dapm->bias_level <= SND_SOC_BIAS_STANDBY) in rt715_set_main_vol_put()
437 regmap_write(rt715->regmap, in rt715_set_main_vol_put()
461 ucontrol->value.integer.value[i * 2] = read_ll & 0x7f; in rt715_set_main_vol_get()
462 ucontrol->value.integer.value[i * 2 + 1] = read_rl & 0x7f; in rt715_set_main_vol_get()
468 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -1725, 75, 0);
474 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; in rt715_switch_info()
475 uinfo->count = 8; in rt715_switch_info()
476 uinfo->value.integer.min = 0; in rt715_switch_info()
477 uinfo->value.integer.max = 1; in rt715_switch_info()
484 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; in rt715_vol_info()
485 uinfo->count = 8; in rt715_vol_info()
486 uinfo->value.integer.min = 0; in rt715_vol_info()
487 uinfo->value.integer.max = 0x3f; in rt715_vol_info()
562 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; in rt715_mux_get()
566 /* nid = e->reg, vid = 0xf01 */ in rt715_mux_get()
567 reg = RT715_VERB_SET_CONNECT_SEL | e->reg; in rt715_mux_get()
568 ret = regmap_read(rt715->regmap, reg, &val); in rt715_mux_get()
570 dev_err(component->dev, "%s: sdw read failed: %d\n", in rt715_mux_get()
576 * The first two indices of ADC Mux 24/25 are routed to the same in rt715_mux_get()
577 * hardware source. ie, ADC Mux 24 0/1 will both connect to MIC2. in rt715_mux_get()
580 if ((e->reg == RT715_MUX_IN3 || e->reg == RT715_MUX_IN4) && (val > 0)) in rt715_mux_get()
581 val -= 1; in rt715_mux_get()
582 ucontrol->value.enumerated.item[0] = val; in rt715_mux_get()
595 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; in rt715_mux_put()
596 unsigned int *item = ucontrol->value.enumerated.item; in rt715_mux_put()
600 if (item[0] >= e->items) in rt715_mux_put()
601 return -EINVAL; in rt715_mux_put()
603 /* Verb ID = 0x701h, nid = e->reg */ in rt715_mux_put()
604 val = snd_soc_enum_item_to_val(e, item[0]) << e->shift_l; in rt715_mux_put()
606 reg = RT715_VERB_SET_CONNECT_SEL | e->reg; in rt715_mux_put()
607 ret = regmap_read(rt715->regmap, reg, &val2); in rt715_mux_put()
609 dev_err(component->dev, "%s: sdw read failed: %d\n", in rt715_mux_put()
620 reg = RT715_VERB_SET_CONNECT_SEL | e->reg; in rt715_mux_put()
621 regmap_write(rt715->regmap, reg, val); in rt715_mux_put()
642 * Due to mux design for nid 24 (MUX_IN3)/25 (MUX_IN4), connection index 0 and
685 SOC_DAPM_ENUM_EXT("ADC 22 Mux", rt715_adc22_enum,
689 SOC_DAPM_ENUM_EXT("ADC 23 Mux", rt715_adc23_enum,
693 SOC_DAPM_ENUM_EXT("ADC 24 Mux", rt715_adc24_enum,
697 SOC_DAPM_ENUM_EXT("ADC 25 Mux", rt715_adc25_enum,
709 SND_SOC_DAPM_ADC("ADC 07", NULL, RT715_SET_STREAMID_MIC_ADC, 4, 0),
710 SND_SOC_DAPM_ADC("ADC 08", NULL, RT715_SET_STREAMID_LINE_ADC, 4, 0),
711 SND_SOC_DAPM_ADC("ADC 09", NULL, RT715_SET_STREAMID_MIX_ADC, 4, 0),
712 SND_SOC_DAPM_ADC("ADC 27", NULL, RT715_SET_STREAMID_MIX_ADC2, 4, 0),
713 SND_SOC_DAPM_MUX("ADC 22 Mux", SND_SOC_NOPM, 0, 0,
715 SND_SOC_DAPM_MUX("ADC 23 Mux", SND_SOC_NOPM, 0, 0,
717 SND_SOC_DAPM_MUX("ADC 24 Mux", SND_SOC_NOPM, 0, 0,
719 SND_SOC_DAPM_MUX("ADC 25 Mux", SND_SOC_NOPM, 0, 0,
726 {"DP6TX", NULL, "ADC 09"},
727 {"DP6TX", NULL, "ADC 08"},
728 {"DP4TX", NULL, "ADC 07"},
729 {"DP4TX", NULL, "ADC 27"},
730 {"ADC 09", NULL, "ADC 22 Mux"},
731 {"ADC 08", NULL, "ADC 23 Mux"},
732 {"ADC 07", NULL, "ADC 24 Mux"},
733 {"ADC 27", NULL, "ADC 25 Mux"},
734 {"ADC 22 Mux", "MIC1", "MIC1"},
735 {"ADC 22 Mux", "MIC2", "MIC2"},
736 {"ADC 22 Mux", "LINE1", "LINE1"},
737 {"ADC 22 Mux", "LINE2", "LINE2"},
738 {"ADC 22 Mux", "DMIC1", "DMIC1"},
739 {"ADC 22 Mux", "DMIC2", "DMIC2"},
740 {"ADC 22 Mux", "DMIC3", "DMIC3"},
741 {"ADC 22 Mux", "DMIC4", "DMIC4"},
742 {"ADC 23 Mux", "MIC1", "MIC1"},
743 {"ADC 23 Mux", "MIC2", "MIC2"},
744 {"ADC 23 Mux", "LINE1", "LINE1"},
745 {"ADC 23 Mux", "LINE2", "LINE2"},
746 {"ADC 23 Mux", "DMIC1", "DMIC1"},
747 {"ADC 23 Mux", "DMIC2", "DMIC2"},
748 {"ADC 23 Mux", "DMIC3", "DMIC3"},
749 {"ADC 23 Mux", "DMIC4", "DMIC4"},
750 {"ADC 24 Mux", "MIC2", "MIC2"},
751 {"ADC 24 Mux", "DMIC1", "DMIC1"},
752 {"ADC 24 Mux", "DMIC2", "DMIC2"},
753 {"ADC 24 Mux", "DMIC3", "DMIC3"},
754 {"ADC 24 Mux", "DMIC4", "DMIC4"},
755 {"ADC 25 Mux", "MIC1", "MIC1"},
756 {"ADC 25 Mux", "DMIC1", "DMIC1"},
757 {"ADC 25 Mux", "DMIC2", "DMIC2"},
758 {"ADC 25 Mux", "DMIC3", "DMIC3"},
759 {"ADC 25 Mux", "DMIC4", "DMIC4"},
771 if (dapm->bias_level == SND_SOC_BIAS_STANDBY) { in rt715_set_bias_level()
772 regmap_write(rt715->regmap, in rt715_set_bias_level()
780 regmap_write(rt715->regmap, in rt715_set_bias_level()
788 dapm->bias_level = level; in rt715_set_bias_level()
797 if (!rt715->first_hw_init) in rt715_probe()
800 ret = pm_runtime_resume(component->dev); in rt715_probe()
801 if (ret < 0 && ret != -EACCES) in rt715_probe()
839 struct snd_soc_component *component = dai->component; in rt715_pcm_hw_params()
850 return -EINVAL; in rt715_pcm_hw_params()
852 if (!rt715->slave) in rt715_pcm_hw_params()
853 return -EINVAL; in rt715_pcm_hw_params()
857 switch (dai->id) { in rt715_pcm_hw_params()
860 rt715_index_write(rt715->regmap, RT715_SDW_INPUT_SEL, 0xa500); in rt715_pcm_hw_params()
864 rt715_index_write(rt715->regmap, RT715_SDW_INPUT_SEL, 0xa000); in rt715_pcm_hw_params()
867 dev_err(component->dev, "Invalid DAI id %d\n", dai->id); in rt715_pcm_hw_params()
868 return -EINVAL; in rt715_pcm_hw_params()
871 retval = sdw_stream_add_slave(rt715->slave, &stream_config, in rt715_pcm_hw_params()
874 dev_err(dai->dev, "Unable to configure port\n"); in rt715_pcm_hw_params()
880 /* bit 15 Stream Type 0:PCM 1:Non-PCM, should always be PCM */ in rt715_pcm_hw_params()
888 dev_err(component->dev, "Unsupported sample rate %d\n", in rt715_pcm_hw_params()
890 return -EINVAL; in rt715_pcm_hw_params()
895 val |= (params_channels(params) - 1); in rt715_pcm_hw_params()
897 dev_err(component->dev, "Unsupported channels %d\n", in rt715_pcm_hw_params()
899 return -EINVAL; in rt715_pcm_hw_params()
919 return -EINVAL; in rt715_pcm_hw_params()
922 regmap_write(rt715->regmap, RT715_MIC_ADC_FORMAT_H, val); in rt715_pcm_hw_params()
923 regmap_write(rt715->regmap, RT715_MIC_LINE_FORMAT_H, val); in rt715_pcm_hw_params()
924 regmap_write(rt715->regmap, RT715_MIX_ADC_FORMAT_H, val); in rt715_pcm_hw_params()
925 regmap_write(rt715->regmap, RT715_MIX_ADC2_FORMAT_H, val); in rt715_pcm_hw_params()
933 struct snd_soc_component *component = dai->component; in rt715_pcm_hw_free()
938 if (!rt715->slave) in rt715_pcm_hw_free()
939 return -EINVAL; in rt715_pcm_hw_free()
941 sdw_stream_remove_slave(rt715->slave, sdw_stream); in rt715_pcm_hw_free()
958 .name = "rt715-aif1",
970 .name = "rt715-aif2",
996 clk_freq = (rt715->params.curr_dr_freq >> 1); in rt715_clock_config()
1018 return -EINVAL; in rt715_clock_config()
1021 regmap_write(rt715->regmap, 0xe0, value); in rt715_clock_config()
1022 regmap_write(rt715->regmap, 0xf0, value); in rt715_clock_config()
1035 return -ENOMEM; in rt715_init()
1038 rt715->slave = slave; in rt715_init()
1039 rt715->regmap = regmap; in rt715_init()
1040 rt715->sdw_regmap = sdw_regmap; in rt715_init()
1042 regcache_cache_only(rt715->regmap, true); in rt715_init()
1048 rt715->hw_init = false; in rt715_init()
1049 rt715->first_hw_init = false; in rt715_init()
1070 * fail with -EACCESS because of race conditions between card creation and enumeration in rt715_init()
1080 if (rt715->hw_init) in rt715_io_init()
1083 regcache_cache_only(rt715->regmap, false); in rt715_io_init()
1088 if (!rt715->first_hw_init) in rt715_io_init()
1090 pm_runtime_set_active(&slave->dev); in rt715_io_init()
1092 pm_runtime_get_noresume(&slave->dev); in rt715_io_init()
1094 rt715_reset(rt715->regmap); in rt715_io_init()
1097 regmap_write(rt715->regmap, RT715_SET_GAIN_LINE_ADC_H, 0xb080); in rt715_io_init()
1098 regmap_write(rt715->regmap, RT715_SET_GAIN_MIX_ADC_H, 0xb080); in rt715_io_init()
1100 regmap_write(rt715->regmap, RT715_SET_GAIN_MIC_ADC_H, 0xb080); in rt715_io_init()
1101 regmap_write(rt715->regmap, RT715_SET_GAIN_MIX_ADC2_H, 0xb080); in rt715_io_init()
1104 regmap_write(rt715->regmap, RT715_SET_PIN_DMIC1, 0x20); in rt715_io_init()
1105 regmap_write(rt715->regmap, RT715_SET_PIN_DMIC2, 0x20); in rt715_io_init()
1106 regmap_write(rt715->regmap, RT715_SET_PIN_DMIC3, 0x20); in rt715_io_init()
1107 regmap_write(rt715->regmap, RT715_SET_PIN_DMIC4, 0x20); in rt715_io_init()
1109 regmap_write(rt715->regmap, RT715_SET_STREAMID_LINE_ADC, 0x10); in rt715_io_init()
1110 regmap_write(rt715->regmap, RT715_SET_STREAMID_MIX_ADC, 0x10); in rt715_io_init()
1111 regmap_write(rt715->regmap, RT715_SET_STREAMID_MIC_ADC, 0x10); in rt715_io_init()
1112 regmap_write(rt715->regmap, RT715_SET_STREAMID_MIX_ADC2, 0x10); in rt715_io_init()
1114 regmap_write(rt715->regmap, RT715_SET_DMIC1_CONFIG_DEFAULT1, 0xd0); in rt715_io_init()
1115 regmap_write(rt715->regmap, RT715_SET_DMIC1_CONFIG_DEFAULT2, 0x11); in rt715_io_init()
1116 regmap_write(rt715->regmap, RT715_SET_DMIC1_CONFIG_DEFAULT3, 0xa1); in rt715_io_init()
1117 regmap_write(rt715->regmap, RT715_SET_DMIC1_CONFIG_DEFAULT4, 0x81); in rt715_io_init()
1118 regmap_write(rt715->regmap, RT715_SET_DMIC2_CONFIG_DEFAULT1, 0xd1); in rt715_io_init()
1119 regmap_write(rt715->regmap, RT715_SET_DMIC2_CONFIG_DEFAULT2, 0x11); in rt715_io_init()
1120 regmap_write(rt715->regmap, RT715_SET_DMIC2_CONFIG_DEFAULT3, 0xa1); in rt715_io_init()
1121 regmap_write(rt715->regmap, RT715_SET_DMIC2_CONFIG_DEFAULT4, 0x81); in rt715_io_init()
1122 regmap_write(rt715->regmap, RT715_SET_DMIC3_CONFIG_DEFAULT1, 0xd0); in rt715_io_init()
1123 regmap_write(rt715->regmap, RT715_SET_DMIC3_CONFIG_DEFAULT2, 0x11); in rt715_io_init()
1124 regmap_write(rt715->regmap, RT715_SET_DMIC3_CONFIG_DEFAULT3, 0xa1); in rt715_io_init()
1125 regmap_write(rt715->regmap, RT715_SET_DMIC3_CONFIG_DEFAULT4, 0x81); in rt715_io_init()
1126 regmap_write(rt715->regmap, RT715_SET_DMIC4_CONFIG_DEFAULT1, 0xd1); in rt715_io_init()
1127 regmap_write(rt715->regmap, RT715_SET_DMIC4_CONFIG_DEFAULT2, 0x11); in rt715_io_init()
1128 regmap_write(rt715->regmap, RT715_SET_DMIC4_CONFIG_DEFAULT3, 0xa1); in rt715_io_init()
1129 regmap_write(rt715->regmap, RT715_SET_DMIC4_CONFIG_DEFAULT4, 0x81); in rt715_io_init()
1132 regmap_write(rt715->regmap, RT715_SET_AUDIO_POWER_STATE, AC_PWRST_D3); in rt715_io_init()
1134 if (rt715->first_hw_init) in rt715_io_init()
1135 regcache_mark_dirty(rt715->regmap); in rt715_io_init()
1137 rt715->first_hw_init = true; in rt715_io_init()
1140 rt715->hw_init = true; in rt715_io_init()
1142 pm_runtime_mark_last_busy(&slave->dev); in rt715_io_init()
1143 pm_runtime_put_autosuspend(&slave->dev); in rt715_io_init()