Lines Matching +full:1 +full:- +full:3
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * max98926.h -- MAX98926 ALSA SoC Audio driver
4 * Copyright 2013-2015 Maxim Integrated Products
73 #define MAX98926_REG_CNT (MAX98926_R03A_BOOST_LIMITER+1)
75 #define MAX98926_PDM_CURRENT_MASK (1<<7)
77 #define MAX98926_PDM_VOLTAGE_MASK (1<<3)
78 #define MAX98926_PDM_VOLTAGE_SHIFT 3
79 #define MAX98926_PDM_CHANNEL_0_MASK (1<<2)
81 #define MAX98926_PDM_CHANNEL_1_MASK (1<<6)
84 #define MAX98926_PDM_CHANNEL_0_HIZ 1
86 #define MAX98926_PDM_SOURCE_0_MASK (1<<0)
87 #define MAX98926_PDM_SOURCE_1_MASK (1<<4)
93 #define MAX98926_THERMWARN_STATUS_MASK (1<<3)
94 #define MAX98926_THERMWARN_STATUS_SHIFT 3
95 #define MAX98926_THERMWARN_STATUS_WIDTH 1
96 #define MAX98926_THERMSHDN_STATUS_MASK (1<<1)
97 #define MAX98926_THERMSHDN_STATUS_SHIFT 1
98 #define MAX98926_THERMSHDN_STATUS_WIDTH 1
101 #define MAX98926_SPKCURNT_STATUS_MASK (1<<5)
103 #define MAX98926_SPKCURNT_STATUS_WIDTH 1
104 #define MAX98926_WATCHFAIL_STATUS_MASK (1<<4)
106 #define MAX98926_WATCHFAIL_STATUS_WIDTH 1
107 #define MAX98926_ALCINFH_STATUS_MASK (1<<3)
108 #define MAX98926_ALCINFH_STATUS_SHIFT 3
109 #define MAX98926_ALCINFH_STATUS_WIDTH 1
110 #define MAX98926_ALCACT_STATUS_MASK (1<<2)
112 #define MAX98926_ALCACT_STATUS_WIDTH 1
113 #define MAX98926_ALCMUT_STATUS_MASK (1<<1)
114 #define MAX98926_ALCMUT_STATUS_SHIFT 1
115 #define MAX98926_ALCMUT_STATUS_WIDTH 1
116 #define MAX98926_ACLP_STATUS_MASK (1<<0)
118 #define MAX98926_ACLP_STATUS_WIDTH 1
121 #define MAX98926_SLOTOVRN_STATUS_MASK (1<<6)
123 #define MAX98926_SLOTOVRN_STATUS_WIDTH 1
124 #define MAX98926_INVALSLOT_STATUS_MASK (1<<5)
126 #define MAX98926_INVALSLOT_STATUS_WIDTH 1
127 #define MAX98926_SLOTCNFLT_STATUS_MASK (1<<4)
129 #define MAX98926_SLOTCNFLT_STATUS_WIDTH 1
130 #define MAX98926_VBSTOVFL_STATUS_MASK (1<<3)
131 #define MAX98926_VBSTOVFL_STATUS_SHIFT 3
132 #define MAX98926_VBSTOVFL_STATUS_WIDTH 1
133 #define MAX98926_VBATOVFL_STATUS_MASK (1<<2)
135 #define MAX98926_VBATOVFL_STATUS_WIDTH 1
136 #define MAX98926_IMONOVFL_STATUS_MASK (1<<1)
137 #define MAX98926_IMONOVFL_STATUS_SHIFT 1
138 #define MAX98926_IMONOVFL_STATUS_WIDTH 1
139 #define MAX98926_VMONOVFL_STATUS_MASK (1<<0)
141 #define MAX98926_VMONOVFL_STATUS_WIDTH 1
144 #define MAX98926_THERMWARN_END_STATE_MASK (1<<3)
145 #define MAX98926_THERMWARN_END_STATE_SHIFT 3
146 #define MAX98926_THERMWARN_END_STATE_WIDTH 1
147 #define MAX98926_THERMWARN_BGN_STATE_MASK (1<<2)
148 #define MAX98926_THERMWARN_BGN_STATE_SHIFT 1
149 #define MAX98926_THERMWARN_BGN_STATE_WIDTH 1
150 #define MAX98926_THERMSHDN_END_STATE_MASK (1<<1)
151 #define MAX98926_THERMSHDN_END_STATE_SHIFT 1
152 #define MAX98926_THERMSHDN_END_STATE_WIDTH 1
153 #define MAX98926_THERMSHDN_BGN_STATE_MASK (1<<0)
155 #define MAX98926_THERMSHDN_BGN_STATE_WIDTH 1
158 #define MAX98926_SPRCURNT_STATE_MASK (1<<5)
160 #define MAX98926_SPRCURNT_STATE_WIDTH 1
161 #define MAX98926_WATCHFAIL_STATE_MASK (1<<4)
163 #define MAX98926_WATCHFAIL_STATE_WIDTH 1
164 #define MAX98926_ALCINFH_STATE_MASK (1<<3)
165 #define MAX98926_ALCINFH_STATE_SHIFT 3
166 #define MAX98926_ALCINFH_STATE_WIDTH 1
167 #define MAX98926_ALCACT_STATE_MASK (1<<2)
169 #define MAX98926_ALCACT_STATE_WIDTH 1
170 #define MAX98926_ALCMUT_STATE_MASK (1<<1)
171 #define MAX98926_ALCMUT_STATE_SHIFT 1
172 #define MAX98926_ALCMUT_STATE_WIDTH 1
173 #define MAX98926_ALCP_STATE_MASK (1<<0)
175 #define MAX98926_ALCP_STATE_WIDTH 1
178 #define MAX98926_SLOTOVRN_STATE_MASK (1<<6)
180 #define MAX98926_SLOTOVRN_STATE_WIDTH 1
181 #define MAX98926_INVALSLOT_STATE_MASK (1<<5)
183 #define MAX98926_INVALSLOT_STATE_WIDTH 1
184 #define MAX98926_SLOTCNFLT_STATE_MASK (1<<4)
186 #define MAX98926_SLOTCNFLT_STATE_WIDTH 1
187 #define MAX98926_VBSTOVFL_STATE_MASK (1<<3)
188 #define MAX98926_VBSTOVFL_STATE_SHIFT 3
189 #define MAX98926_VBSTOVFL_STATE_WIDTH 1
190 #define MAX98926_VBATOVFL_STATE_MASK (1<<2)
192 #define MAX98926_VBATOVFL_STATE_WIDTH 1
193 #define MAX98926_IMONOVFL_STATE_MASK (1<<1)
194 #define MAX98926_IMONOVFL_STATE_SHIFT 1
195 #define MAX98926_IMONOVFL_STATE_WIDTH 1
196 #define MAX98926_VMONOVFL_STATE_MASK (1<<0)
198 #define MAX98926_VMONOVFL_STATE_WIDTH 1
201 #define MAX98926_THERMWARN_END_FLAG_MASK (1<<3)
202 #define MAX98926_THERMWARN_END_FLAG_SHIFT 3
203 #define MAX98926_THERMWARN_END_FLAG_WIDTH 1
204 #define MAX98926_THERMWARN_BGN_FLAG_MASK (1<<2)
206 #define MAX98926_THERMWARN_BGN_FLAG_WIDTH 1
207 #define MAX98926_THERMSHDN_END_FLAG_MASK (1<<1)
208 #define MAX98926_THERMSHDN_END_FLAG_SHIFT 1
209 #define MAX98926_THERMSHDN_END_FLAG_WIDTH 1
210 #define MAX98926_THERMSHDN_BGN_FLAG_MASK (1<<0)
212 #define MAX98926_THERMSHDN_BGN_FLAG_WIDTH 1
215 #define MAX98926_SPKCURNT_FLAG_MASK (1<<5)
217 #define MAX98926_SPKCURNT_FLAG_WIDTH 1
218 #define MAX98926_WATCHFAIL_FLAG_MASK (1<<4)
220 #define MAX98926_WATCHFAIL_FLAG_WIDTH 1
221 #define MAX98926_ALCINFH_FLAG_MASK (1<<3)
222 #define MAX98926_ALCINFH_FLAG_SHIFT 3
223 #define MAX98926_ALCINFH_FLAG_WIDTH 1
224 #define MAX98926_ALCACT_FLAG_MASK (1<<2)
226 #define MAX98926_ALCACT_FLAG_WIDTH 1
227 #define MAX98926_ALCMUT_FLAG_MASK (1<<1)
228 #define MAX98926_ALCMUT_FLAG_SHIFT 1
229 #define MAX98926_ALCMUT_FLAG_WIDTH 1
230 #define MAX98926_ALCP_FLAG_MASK (1<<0)
232 #define MAX98926_ALCP_FLAG_WIDTH 1
235 #define MAX98926_SLOTOVRN_FLAG_MASK (1<<6)
237 #define MAX98926_SLOTOVRN_FLAG_WIDTH 1
238 #define MAX98926_INVALSLOT_FLAG_MASK (1<<5)
240 #define MAX98926_INVALSLOT_FLAG_WIDTH 1
241 #define MAX98926_SLOTCNFLT_FLAG_MASK (1<<4)
243 #define MAX98926_SLOTCNFLT_FLAG_WIDTH 1
244 #define MAX98926_VBSTOVFL_FLAG_MASK (1<<3)
245 #define MAX98926_VBSTOVFL_FLAG_SHIFT 3
246 #define MAX98926_VBSTOVFL_FLAG_WIDTH 1
247 #define MAX98926_VBATOVFL_FLAG_MASK (1<<2)
249 #define MAX98926_VBATOVFL_FLAG_WIDTH 1
250 #define MAX98926_IMONOVFL_FLAG_MASK (1<<1)
251 #define MAX98926_IMONOVFL_FLAG_SHIFT 1
252 #define MAX98926_IMONOVFL_FLAG_WIDTH 1
253 #define MAX98926_VMONOVFL_FLAG_MASK (1<<0)
255 #define MAX98926_VMONOVFL_FLAG_WIDTH 1
258 #define MAX98926_THERMWARN_END_EN_MASK (1<<3)
259 #define MAX98926_THERMWARN_END_EN_SHIFT 3
260 #define MAX98926_THERMWARN_END_EN_WIDTH 1
261 #define MAX98926_THERMWARN_BGN_EN_MASK (1<<2)
263 #define MAX98926_THERMWARN_BGN_EN_WIDTH 1
264 #define MAX98926_THERMSHDN_END_EN_MASK (1<<1)
265 #define MAX98926_THERMSHDN_END_EN_SHIFT 1
266 #define MAX98926_THERMSHDN_END_EN_WIDTH 1
267 #define MAX98926_THERMSHDN_BGN_EN_MASK (1<<0)
269 #define MAX98926_THERMSHDN_BGN_EN_WIDTH 1
272 #define MAX98926_SPKCURNT_EN_MASK (1<<5)
274 #define MAX98926_SPKCURNT_EN_WIDTH 1
275 #define MAX98926_WATCHFAIL_EN_MASK (1<<4)
277 #define MAX98926_WATCHFAIL_EN_WIDTH 1
278 #define MAX98926_ALCINFH_EN_MASK (1<<3)
279 #define MAX98926_ALCINFH_EN_SHIFT 3
280 #define MAX98926_ALCINFH_EN_WIDTH 1
281 #define MAX98926_ALCACT_EN_MASK (1<<2)
283 #define MAX98926_ALCACT_EN_WIDTH 1
284 #define MAX98926_ALCMUT_EN_MASK (1<<1)
285 #define MAX98926_ALCMUT_EN_SHIFT 1
286 #define MAX98926_ALCMUT_EN_WIDTH 1
287 #define MAX98926_ALCP_EN_MASK (1<<0)
289 #define MAX98926_ALCP_EN_WIDTH 1
292 #define MAX98926_SLOTOVRN_EN_MASK (1<<6)
294 #define MAX98926_SLOTOVRN_EN_WIDTH 1
295 #define MAX98926_INVALSLOT_EN_MASK (1<<5)
297 #define MAX98926_INVALSLOT_EN_WIDTH 1
298 #define MAX98926_SLOTCNFLT_EN_MASK (1<<4)
300 #define MAX98926_SLOTCNFLT_EN_WIDTH 1
301 #define MAX98926_VBSTOVFL_EN_MASK (1<<3)
302 #define MAX98926_VBSTOVFL_EN_SHIFT 3
303 #define MAX98926_VBSTOVFL_EN_WIDTH 1
304 #define MAX98926_VBATOVFL_EN_MASK (1<<2)
306 #define MAX98926_VBATOVFL_EN_WIDTH 1
307 #define MAX98926_IMONOVFL_EN_MASK (1<<1)
308 #define MAX98926_IMONOVFL_EN_SHIFT 1
309 #define MAX98926_IMONOVFL_EN_WIDTH 1
310 #define MAX98926_VMONOVFL_EN_MASK (1<<0)
312 #define MAX98926_VMONOVFL_EN_WIDTH 1
315 #define MAX98926_THERMWARN_END_CLR_MASK (1<<3)
316 #define MAX98926_THERMWARN_END_CLR_SHIFT 3
317 #define MAX98926_THERMWARN_END_CLR_WIDTH 1
318 #define MAX98926_THERMWARN_BGN_CLR_MASK (1<<2)
320 #define MAX98926_THERMWARN_BGN_CLR_WIDTH 1
321 #define MAX98926_THERMSHDN_END_CLR_MASK (1<<1)
322 #define MAX98926_THERMSHDN_END_CLR_SHIFT 1
323 #define MAX98926_THERMSHDN_END_CLR_WIDTH 1
324 #define MAX98926_THERMSHDN_BGN_CLR_MASK (1<<0)
326 #define MAX98926_THERMSHDN_BGN_CLR_WIDTH 1
329 #define MAX98926_SPKCURNT_CLR_MASK (1<<5)
331 #define MAX98926_SPKCURNT_CLR_WIDTH 1
332 #define MAX98926_WATCHFAIL_CLR_MASK (1<<4)
334 #define MAX98926_WATCHFAIL_CLR_WIDTH 1
335 #define MAX98926_ALCINFH_CLR_MASK (1<<3)
336 #define MAX98926_ALCINFH_CLR_SHIFT 3
337 #define MAX98926_ALCINFH_CLR_WIDTH 1
338 #define MAX98926_ALCACT_CLR_MASK (1<<2)
340 #define MAX98926_ALCACT_CLR_WIDTH 1
341 #define MAX98926_ALCMUT_CLR_MASK (1<<1)
342 #define MAX98926_ALCMUT_CLR_SHIFT 1
343 #define MAX98926_ALCMUT_CLR_WIDTH 1
344 #define MAX98926_ALCP_CLR_MASK (1<<0)
346 #define MAX98926_ALCP_CLR_WIDTH 1
349 #define MAX98926_SLOTOVRN_CLR_MASK (1<<6)
351 #define MAX98926_SLOTOVRN_CLR_WIDTH 1
352 #define MAX98926_INVALSLOT_CLR_MASK (1<<5)
354 #define MAX98926_INVALSLOT_CLR_WIDTH 1
355 #define MAX98926_SLOTCNFLT_CLR_MASK (1<<4)
357 #define MAX98926_SLOTCNFLT_CLR_WIDTH 1
358 #define MAX98926_VBSTOVFL_CLR_MASK (1<<3)
359 #define MAX98926_VBSTOVFL_CLR_SHIFT 3
360 #define MAX98926_VBSTOVFL_CLR_WIDTH 1
361 #define MAX98926_VBATOVFL_CLR_MASK (1<<2)
363 #define MAX98926_VBATOVFL_CLR_WIDTH 1
364 #define MAX98926_IMONOVFL_CLR_MASK (1<<1)
365 #define MAX98926_IMONOVFL_CLR_SHIFT 1
366 #define MAX98926_IMONOVFL_CLR_WIDTH 1
367 #define MAX98926_VMONOVFL_CLR_MASK (1<<0)
369 #define MAX98926_VMONOVFL_CLR_WIDTH 1
372 #define MAX98926_ER_THERMWARN_EN_MASK (1<<7)
374 #define MAX98926_ER_THERMWARN_EN_WIDTH 1
377 #define MAX98926_ER_THERMWARN_MAP_WIDTH 3
380 #define MAX98926_ER_ALCMUT_EN_MASK (1<<7)
382 #define MAX98926_ER_ALCMUT_EN_WIDTH 1
385 #define MAX98926_ER_ALCMUT_MAP_WIDTH 3
386 #define MAX98926_ER_ALCP_EN_MASK (1<<3)
387 #define MAX98926_ER_ALCP_EN_SHIFT 3
388 #define MAX98926_ER_ALCP_EN_WIDTH 1
391 #define MAX98926_ER_ALCP_MAP_WIDTH 3
394 #define MAX98926_ER_ALCINFH_EN_MASK (1<<7)
396 #define MAX98926_ER_ALCINFH_EN_WIDTH 1
399 #define MAX98926_ER_ALCINFH_MAP_WIDTH 3
400 #define MAX98926_ER_ALCACT_EN_MASK (1<<3)
401 #define MAX98926_ER_ALCACT_EN_SHIFT 3
402 #define MAX98926_ER_ALCACT_EN_WIDTH 1
405 #define MAX98926_ER_ALCACT_MAP_WIDTH 3
408 #define MAX98926_ER_SPKCURNT_EN_MASK (1<<7)
410 #define MAX98926_ER_SPKCURNT_EN_WIDTH 1
413 #define MAX98926_ER_SPKCURNT_MAP_WIDTH 3
419 #define MAX98926_ER_IMONOVFL_EN_MASK (1<<7)
421 #define MAX98926_ER_IMONOVFL_EN_WIDTH 1
424 #define MAX98926_ER_IMONOVFL_MAP_WIDTH 3
425 #define MAX98926_ER_VMONOVFL_EN_MASK (1<<3)
426 #define MAX98926_ER_VMONOVFL_EN_SHIFT 3
427 #define MAX98926_ER_VMONOVFL_EN_WIDTH 1
430 #define MAX98926_ER_VMONOVFL_MAP_WIDTH 3
433 #define MAX98926_ER_VBSTOVFL_EN_MASK (1<<7)
435 #define MAX98926_ER_VBSTOVFL_EN_WIDTH 1
438 #define MAX98926_ER_VBSTOVFL_MAP_WIDTH 3
439 #define MAX98926_ER_VBATOVFL_EN_MASK (1<<3)
440 #define MAX98926_ER_VBATOVFL_EN_SHIFT 3
441 #define MAX98926_ER_VBATOVFL_EN_WIDTH 1
444 #define MAX98926_ER_VBATOVFL_MAP_WIDTH 3
447 #define MAX98926_ER_INVALSLOT_EN_MASK (1<<7)
449 #define MAX98926_ER_INVALSLOT_EN_WIDTH 1
452 #define MAX98926_ER_INVALSLOT_MAP_WIDTH 3
453 #define MAX98926_ER_SLOTCNFLT_EN_MASK (1<<3)
454 #define MAX98926_ER_SLOTCNFLT_EN_SHIFT 3
455 #define MAX98926_ER_SLOTCNFLT_EN_WIDTH 1
458 #define MAX98926_ER_SLOTCNFLT_MAP_WIDTH 3
461 #define MAX98926_ER_SLOTOVRN_EN_MASK (1<<3)
462 #define MAX98926_ER_SLOTOVRN_EN_SHIFT 3
463 #define MAX98926_ER_SLOTOVRN_EN_WIDTH 1
466 #define MAX98926_ER_SLOTOVRN_MAP_WIDTH 3
469 #define MAX98926_DAI_CLK_SOURCE_MASK (1<<6)
471 #define MAX98926_DAI_CLK_SOURCE_WIDTH 1
483 #define MAX98926_DAI_MAS_MASK (1<<3)
484 #define MAX98926_DAI_MAS_SHIFT 3
485 #define MAX98926_DAI_MAS_WIDTH 1
488 #define MAX98926_DAI_BSEL_WIDTH 3
491 #define MAX98926_DAI_BSEL_48 (1 << MAX98926_DAI_BSEL_SHIFT)
519 #define MAX98926_DAI_INTERLEAVE_MASK (1<<5)
521 #define MAX98926_DAI_INTERLEAVE_WIDTH 1
522 #define MAX98926_DAI_EXTBCLK_HIZ_MASK (1<<4)
524 #define MAX98926_DAI_EXTBCLK_HIZ_WIDTH 1
525 #define MAX98926_DAI_WCI_MASK (1<<3)
526 #define MAX98926_DAI_WCI_SHIFT 3
527 #define MAX98926_DAI_WCI_WIDTH 1
528 #define MAX98926_DAI_BCI_MASK (1<<2)
530 #define MAX98926_DAI_BCI_WIDTH 1
531 #define MAX98926_DAI_DLY_MASK (1<<1)
532 #define MAX98926_DAI_DLY_SHIFT 1
533 #define MAX98926_DAI_DLY_WIDTH 1
534 #define MAX98926_DAI_TDM_MASK (1<<0)
536 #define MAX98926_DAI_TDM_WIDTH 1
538 #define MAX98926_DAI_CHANSZ_16 (1 << MAX98926_DAI_CHANSZ_SHIFT)
540 #define MAX98926_DAI_CHANSZ_32 (3 << MAX98926_DAI_CHANSZ_SHIFT)
543 #define MAX98926_DAI_DO_EN_MASK (1<<7)
545 #define MAX98926_DAI_DO_EN_WIDTH 1
546 #define MAX98926_DAI_DIN_EN_MASK (1<<6)
548 #define MAX98926_DAI_DIN_EN_WIDTH 1
549 #define MAX98926_DAI_INR_SOURCE_MASK (0x07<<3)
550 #define MAX98926_DAI_INR_SOURCE_SHIFT 3
551 #define MAX98926_DAI_INR_SOURCE_WIDTH 3
554 #define MAX98926_DAI_INL_SOURCE_WIDTH 3
557 #define MAX98926_DAI_VMON_EN_MASK (1<<5)
559 #define MAX98926_DAI_VMON_EN_WIDTH 1
565 #define MAX98926_DAI_VMON_SLOT_01_02 (1 << MAX98926_DAI_VMON_SLOT_SHIFT)
567 #define MAX98926_DAI_VMON_SLOT_03_04 (3 << MAX98926_DAI_VMON_SLOT_SHIFT)
597 #define MAX98926_DAI_IMON_EN_MASK (1<<5)
599 #define MAX98926_DAI_IMON_EN_WIDTH 1
605 #define MAX98926_DAI_IMON_SLOT_01_02 (1 << MAX98926_DAI_IMON_SLOT_SHIFT)
607 #define MAX98926_DAI_IMON_SLOT_03_04 (3 << MAX98926_DAI_IMON_SLOT_SHIFT)
642 #define MAX98926_DAI_VBST_EN_MASK (1<<5)
644 #define MAX98926_DAI_VBST_EN_WIDTH 1
650 #define MAX98926_DAI_FLAG_EN_MASK (1<<5)
652 #define MAX98926_DAI_FLAG_EN_WIDTH 1
683 #define MAX98926_ADC_DITHER_EN_MASK (1<<7)
685 #define MAX98926_ADC_DITHER_EN_WIDTH 1
686 #define MAX98926_IV_DCB_EN_MASK (1<<6)
688 #define MAX98926_IV_DCB_EN_WIDTH 1
689 #define MAX98926_DAC_DITHER_EN_MASK (1<<4)
691 #define MAX98926_DAC_DITHER_EN_WIDTH 1
692 #define MAX98926_DAC_FILTER_MODE_MASK (1<<3)
693 #define MAX98926_DAC_FILTER_MODE_SHIFT 3
694 #define MAX98926_DAC_FILTER_MODE_WIDTH 1
697 #define MAX98926_DAC_HPF_WIDTH 3
699 #define MAX98926_DAC_HPF_DC_BLOCK (1 << MAX98926_DAC_HPF_SHIFT)
701 #define MAX98926_DAC_HPF_EN_200 (3 << MAX98926_DAC_HPF_SHIFT)
714 #define MAX98926_DAC_IN_SEL_RIGHT_DAI (1 << MAX98926_DAC_IN_SEL_SHIFT)
716 #define MAX98926_DAC_IN_SEL_DIV2_SUMMED_DAI (3 << MAX98926_DAC_IN_SEL_SHIFT)
719 #define MAX98926_SPK_RMP_EN_MASK (1<<1)
720 #define MAX98926_SPK_RMP_EN_SHIFT 1
721 #define MAX98926_SPK_RMP_EN_WIDTH 1
722 #define MAX98926_SPK_ZCD_EN_MASK (1<<0)
724 #define MAX98926_SPK_ZCD_EN_WIDTH 1
727 #define MAX98926_SPK_MODE_MASK (1<<0)
729 #define MAX98926_SPK_MODE_WIDTH 1
730 #define MAX98926_INSELECT_MODE_MASK (1<<1)
731 #define MAX98926_INSELECT_MODE_SHIFT 1
732 #define MAX98926_INSELECT_MODE_WIDTH 1
735 #define MAX98926_ALC_EN_MASK (1<<5)
737 #define MAX98926_ALC_EN_WIDTH 1
748 #define MAX98926_ALC_ATK_RATE_WIDTH 3
756 #define MAX98926_ALC_RLS_RATE_WIDTH 3
759 #define MAX98926_ALC_RLS_TGR_MASK (1<<0)
761 #define MAX98926_ALC_RLS_TGR_WIDTH 1
764 #define MAX98926_ALC_MUTE_EN_MASK (1<<7)
766 #define MAX98926_ALC_MUTE_EN_WIDTH 1
769 #define MAX98926_ALC_MUTE_DLY_WIDTH 3
772 #define MAX98926_ALC_RLS_DBT_WIDTH 3
775 #define MAX98926_BST_SYNC_MASK (1<<7)
777 #define MAX98926_BST_SYNC_WIDTH 1
786 #define MAX98926_BST_EN_MASK (1<<7)
788 #define MAX98926_BST_EN_WIDTH 1
789 #define MAX98926_WATCH_EN_MASK (1<<6)
791 #define MAX98926_WATCH_EN_WIDTH 1
792 #define MAX98926_CLKMON_EN_MASK (1<<5)
794 #define MAX98926_CLKMON_EN_WIDTH 1
795 #define MAX98926_SPK_EN_MASK (1<<4)
797 #define MAX98926_SPK_EN_WIDTH 1
798 #define MAX98926_ADC_VBST_EN_MASK (1<<3)
799 #define MAX98926_ADC_VBST_EN_SHIFT 3
800 #define MAX98926_ADC_VBST_EN_WIDTH 1
801 #define MAX98926_ADC_VBAT_EN_MASK (1<<2)
803 #define MAX98926_ADC_VBAT_EN_WIDTH 1
804 #define MAX98926_ADC_IMON_EN_MASK (1<<1)
805 #define MAX98926_ADC_IMON_EN_SHIFT 1
806 #define MAX98926_ADC_IMON_EN_WIDTH 1
807 #define MAX98926_ADC_VMON_EN_MASK (1<<0)
809 #define MAX98926_ADC_VMON_EN_WIDTH 1
823 #define MAX98926_EN_MASK (1<<7)
825 #define MAX98926_EN_WIDTH 1